📄 w77e58.h
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/*--------------------------------------------------------------------------
w77e58.H
Header file for Winbond Electronics Corp. w77e58(a fast 8051 compatible microcontroller)
--------------------------------------------------------------------------*/
#ifndef W77E58_HEADER_FILE
#define W77E58_HEADER_FILE 1
#define uchar unsigned char
#define uint unsigned int
#define ulong unsigned long
/*------------------------------------------------
W77E58'S SFRS ADDRESSES
------------------------------------------------*/
sfr P0 = 0x80;
sfr SP = 0x81;
sfr DPL = 0x82;
sfr DPH = 0x83;
sfr DPL1 = 0x84;
sfr DPH1 = 0x85;
sfr DPS = 0x86;
sfr PCON = 0x87;
sfr TCON = 0x88;
sfr TMOD = 0x89;
sfr TL0 = 0x8A;
sfr TL1 = 0x8B;
sfr TH0 = 0x8C;
sfr TH1 = 0x8D;
sfr CKCON = 0x8E;
sfr P1 = 0x90;
sfr EXIF = 0x91;
sfr SCON = 0x98;
sfr SCON0 = 0x98; /* Alternate name */
sfr SBUF = 0x99;
sfr SBUF0 = 0x99; /* Alternate name */
sfr P2 = 0xA0;
/**********************************************/
sfr P4 = 0xA5; /* PORT 4 :SFR FOR W77E58 */
/**********************************************/
sfr IE = 0xA8;
sfr SADDR0 = 0xA9;
sfr SADDR1 = 0xAA;
sfr P3 = 0xB0;
sfr IP = 0xB8;
sfr SADEN0 = 0xB9;
sfr SADEN1 = 0xBA;
sfr SCON1 = 0xC0;
sfr SBUF1 = 0xC1;
sfr ROMMAP = 0xC2;
sfr PMR = 0xC4;
sfr STATUS = 0xC5;
sfr TA = 0xC7;
sfr T2CON = 0xC8;
sfr T2MOD = 0xC9;
sfr RCAP2L = 0xCA;
sfr RCAP2H = 0xCB;
sfr TL2 = 0xCC;
sfr TH2 = 0xCD;
sfr PSW = 0xD0;
sfr WDCON = 0xD8;
sfr ACC = 0xE0;
sfr EIE = 0xE8;
sfr B = 0xF0;
sfr EIP = 0xF8;
/*------------------------------------------------
W77E58 P0 Bit Registers
------------------------------------------------*/
sbit P0_0 = 0x80;
sbit P0_1 = 0x81;
sbit P0_2 = 0x82;
sbit P0_3 = 0x83;
sbit P0_4 = 0x84;
sbit P0_5 = 0x85;
sbit P0_6 = 0x86;
sbit P0_7 = 0x87;
/*------------------------------------------------
W77E58 DPS Bit Registers
------------------------------------------------*/
#define SEL_ 0x01
/*------------------------------------------------
W77E58 PCON Bit Values
------------------------------------------------*/
#define IDLE_ 0x01
#define STOP_ 0x02
#define GF0_ 0x04
#define GF1_ 0x08
#define SMOD0_ 0x40
#define SMOD_ 0x80
#define SMOD_0_ 0x80
/*------------------------------------------------
W77E58 TCON Bit Registers
------------------------------------------------*/
sbit IT0 = 0x88;
sbit IE0 = 0x89;
sbit IT1 = 0x8A;
sbit IE1 = 0x8B;
sbit TR0 = 0x8C;
sbit TF0 = 0x8D;
sbit TR1 = 0x8E;
sbit TF1 = 0x8F;
/*------------------------------------------------
W77E58 TMOD Bit Values
------------------------------------------------*/
#define T0_M0_ 0x01
#define T0_M1_ 0x02
#define T0_CT_ 0x04
#define T0_GATE_ 0x08
#define T1_M0_ 0x10
#define T1_M1_ 0x20
#define T1_CT_ 0x40
#define T1_GATE_ 0x80
#define T0_MASK_ 0x0F
#define T1_MASK_ 0xF0
/*------------------------------------------------
W77E58 CKCON Bit Values
------------------------------------------------*/
#define MD0_ 0x01
#define MD1_ 0x02
#define MD2_ 0x04
#define T0M_ 0x08
#define T1M_ 0x10
#define T2M_ 0x20
#define WD0_ 0x40
#define WD1_ 0x80
/*------------------------------------------------
W77E58 P1 Bit Registers
------------------------------------------------*/
sbit P1_0 = 0x90;
sbit P1_1 = 0x91;
sbit P1_2 = 0x92;
sbit P1_3 = 0x93;
sbit P1_4 = 0x94;
sbit P1_5 = 0x95;
sbit P1_6 = 0x96;
sbit P1_7 = 0x97;
sbit T2 = 0x90;
sbit T2EX = 0x91;
sbit RXD1 = 0x92;
sbit TXD1 = 0x93;
sbit INT2 = 0x94;
sbit INT3 = 0x95;
sbit INT4 = 0x96;
sbit INT5 = 0x97;
/*------------------------------------------------
W77E58 EXIF Bit Values
------------------------------------------------*/
#define BGS_ 0x01 /* Timed-Access protected */
#define RGSL_ 0x02
#define RGMD_ 0x04
#define XT_ 0x08
#define RG_ 0x08
#define IE2_ 0x10
#define IE3_ 0x20
#define IE4_ 0x40
#define IE5_ 0x80
/*------------------------------------------------
W77E58 SCON0 Bit Registers
------------------------------------------------*/
sbit RI = 0x98;
sbit RI_0 = 0x98;
sbit TI = 0x99;
sbit TI_0 = 0x99;
sbit RB8 = 0x9A;
sbit RB8_0= 0x9A;
sbit TB8 = 0x9B;
sbit TB8_0= 0x9B;
sbit REN = 0x9C;
sbit REN_0= 0x9C;
sbit SM2 = 0x9D;
sbit SM2_0= 0x9D;
sbit SM1 = 0x9E;
sbit SM1_0= 0x9E;
sbit SM0 = 0x9F;
sbit SM0_0 = 0x9F;
sbit FE_0 = 0x9F;
sbit SM0_FE_0 = 0x9F;
/*------------------------------------------------
W77E58 P2 Bit Registers
------------------------------------------------*/
sbit P2_0 = 0xA0;
sbit P2_1 = 0xA1;
sbit P2_2 = 0xA2;
sbit P2_3 = 0xA3;
sbit P2_4 = 0xA4;
sbit P2_5 = 0xA5;
sbit P2_6 = 0xA6;
sbit P2_7 = 0xA7;
/*------------------------------------------------
W77E58 IE Bit Registers
------------------------------------------------*/
sbit EX0 = 0xA8;
sbit ET0 = 0xA9;
sbit EX1 = 0xAA;
sbit ET1 = 0xAB;
sbit ES = 0xAC;
sbit ES0 = 0xAC;
sbit ET2 = 0xAD;
sbit ES1 = 0xAE;
sbit EA = 0xAF;
sbit IE_0 = 0xA8;
sbit IE_1 = 0xA9;
sbit IE_2 = 0xAA;
sbit IE_3 = 0xAB;
sbit IE_4 = 0xAC;
sbit IE_5 = 0xAD;
sbit IE_6 = 0xAE;
sbit IE_7 = 0xAF;
/*------------------------------------------------
W77E58 P3 Bit Registers (Mnemonics & Ports)
------------------------------------------------*/
sbit P3_0 = 0xB0;
sbit P3_1 = 0xB1;
sbit P3_2 = 0xB2;
sbit P3_3 = 0xB3;
sbit P3_4 = 0xB4;
sbit P3_5 = 0xB5;
sbit P3_6 = 0xB6;
sbit P3_7 = 0xB7;
sbit RXD = 0xB0;
sbit RXD0 = 0xB0;
sbit TXD = 0xB1;
sbit TXD0 = 0xB1;
sbit INT0 = 0xB2;
sbit INT1 = 0xB3;
sbit T0 = 0xB4;
sbit T1 = 0xB5;
sbit WR = 0xB6;
sbit RD = 0xB7;
/*------------------------------------------------
W77E58 IP Bit Registers
------------------------------------------------*/
sbit PX0 = 0xB8;
sbit PT0 = 0xB9;
sbit PX1 = 0xBA;
sbit PT1 = 0xBB;
sbit PS = 0xBC;
sbit PS0 = 0xBC;
sbit PT2 = 0xBD;
sbit PS1 = 0xBE;
sbit IP_0 = 0xB8;
sbit IP_1 = 0xB9;
sbit IP_2 = 0xBA;
sbit IP_3 = 0xBB;
sbit IP_4 = 0xBC;
sbit IP_5 = 0xBD;
sbit IP_6 = 0xBE;
sbit IP_7 = 0xBF;
/*------------------------------------------------
W77E58 SCON1 Bit Registers
------------------------------------------------*/
sbit RI_1 = 0xC0;
sbit TI_1 = 0xC1;
sbit RB8_1 = 0xC2;
sbit TB8_1 = 0xC3;
sbit REN_1 = 0xC4;
sbit SM2_1 = 0xC5;
sbit SM1_1 = 0xC6;
sbit SM0_1 = 0xC7;
sbit FE_1 = 0xC7;
sbit SM0_FE_1 = 0xC7;
/*------------------------------------------------
W77E58 ROMSIZE Bit Values
------------------------------------------------*/
#define RMS0_ 0x01 /* Timed-Access protected */
#define RMS1_ 0x02 /* Timed-Access protected */
#define RMS2_ 0x04 /* Timed-Access protected */
/*------------------------------------------------
W77E58 PMR Bit Values
------------------------------------------------*/
#define DME0_ 0x01
#define DME1_ 0x02
#define ALEOFF_ 0x04
#define XTOFF_ 0x08
#define SWB_ 0x20
#define CD0_ 0x40
#define CD1_ 0x80
/*------------------------------------------------
W77E58 STATUS Bit Values
------------------------------------------------*/
#define SPRA0_ 0x01
#define SPTA0_ 0x02
#define SPRA1_ 0x04
#define SPTA1_ 0x08
#define XTUP_ 0x10
#define LIP_ 0x20
#define HIP_ 0x40
#define PIP_ 0x80
/*------------------------------------------------
W77E58 T2CON Bit Registers
------------------------------------------------*/
sbit CP_RL2 = 0xC8;
sbit C_T2 = 0xC9;
sbit TR2 = 0xCA;
sbit EXEN2 = 0xCB;
sbit TCLK = 0xCC;
sbit RCLK = 0xCD;
sbit EXF2 = 0xCE;
sbit TF2 = 0xCF;
/*------------------------------------------------
W77E58 T2MOD Bit Values
------------------------------------------------*/
#define DCEN_ 0x01
#define T2OE_ 0x02
/*------------------------------------------------
W77E58 PSW Bit Registers
------------------------------------------------*/
sbit P = 0xD0;
sbit FL = 0xD1;
sbit OV = 0xD2;
sbit RS0 = 0xD3;
sbit RS1 = 0xD4;
sbit F0 = 0xD5;
sbit AC = 0xD6;
sbit CY = 0xD7;
/*------------------------------------------------
W77E58 WDCON Bit Values
------------------------------------------------*/
#define RWT_ 0x01 /* Timed-Access protected */
#define EWT_ 0x02 /* Timed-Access protected */
#define WTRF_ 0x04
#define WDIF_ 0x08 /* Timed-Access protected */
#define PFI_ 0x10
#define EPFI_ 0x20
#define POR_ 0x40 /* Timed-Access protected */
#define SMOD_1_ 0x80
/*------------------------------------------------
W77E58 EIE Bit Registers
------------------------------------------------*/
sbit EX2 = 0xE8;
sbit EX3 = 0xE9;
sbit EX4 = 0xEA;
sbit EX5 = 0xEB;
sbit EWDI = 0xEC;
/*------------------------------------------------
W77E58 EIP Bit Registers
------------------------------------------------*/
sbit PX2 = 0xF8;
sbit PX3 = 0xF9;
sbit PX4 = 0xFA;
sbit PX5 = 0xFB;
sbit PWDI = 0xFC;
/*------------------------------------------------
Interrupt Vectors: Interrupt Address = (Number * 8) + 3
------------------------------------------------*/
#define IE0_VECTOR 0 /* 0x03 */
#define TF0_VECTOR 1 /* 0x0B */
#define IE1_VECTOR 2 /* 0x13 */
#define TF1_VECTOR 3 /* 0x1B */
#define SIO_VECTOR 4 /* 0x23 */
#define TF2_VECTOR 5 /* 0x2B */
#define PFI_VECTOR 6 /* 0x33 */
#define SIO1_VECTOR 7 /* 0x3B */
#define IE2_VECTOR 8 /* 0x43 */
#define IE3_VECTOR 9 /* 0x4B */
#define IE4_VECTOR 10 /* 0x53 */
#define IE5_VECTOR 11 /* 0x5B */
#define WDI_VECTOR 12 /* 0x63 */
/*------------------------------------------------
W77e58 P1 port Define OF MAIN FUNCTION
-------------------------------------------------*/
/* sbit READY=P3^3;
sbit SCL=P3^4;
sbit SDA=P3^5;
sbit CLK=P1^0;
sbit SI=P1^1;
sbit SO=P3^2;
sbit STR1=P1^4;
sbit STR2=P1^5;
sbit IC_DATA=P1^6;
sbit REQ=P1^7; */
/************************************************/
/* #define ENQ 0x05
#define ACK 0x06
#define STX 0x02
#define ETX 0x03
#define NAK 0x15
#define OVER_TIME 0xaa
#define TH0_10ms 0xb8
#define TL0_10ms 0x00
#define TH0_30ms 0x28
#define TL0_30ms 0x00
#define TH0_35ms 0x00
#define TL0_35ms 0x00
#define Baud9600 0x01
#define DOG_1400ms 0x00
#define DOG_600ms 0x10
#define DOG_200ms 0x20
#define DOG_disabled 0x30 */
/*************************************/
/* #define T_RECORD 0x01
#define M_RECORD 0x02
#define C_RECORD 0x03
#define P_BLACKLIST 0x04
#define L_BLACKLIST 0x05 */
/*------------------------------------------------
------------------------------------------------*/
#endif
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