mfucfunc.c

此程序为13.56MHz的RFID底层读写卡程序

#include <string.h>
#include <intrins.h>
#include <MfRc500.h>
#include <PcdShare.h>
#include <RcComm.h>
#include <PcdUtils.h>
#include <MfErrNo.h>

#include "Hardware.h"
#include "MfReg.h"

//unsigned char MSndBuffer[MAX_RF_BUF_SIZE];// = 0; ///< pointer to the transmit buffer
//unsigned char MRcvBuffer[MAX_RF_BUF_SIZE];// = 0; ///< pointer to the receive buffer
//volatile unsigned char * MSndBuffer;// = 0; ///< pointer to the transmit buffer
volatile unsigned char * MRcvBuffer;// = 0; ///< pointer to the receive buffer

volatile MfCmdInfo MInfo;

unsigned char idata MLastSelectedSnr[5];
unsigned char idata RicRxTxBuffer[26];   // idata
extern uchar Block_Index;            //test        202.11.26

#define TCLFSDSNDMAX   8   ///< max. frame size send
#define TCLFSDRECMAX   8   ///< max. frame size rcv
#define TCLDSMAX       3   ///< max. baudrate divider PICC --> PCD
#define TCLDRMAX       3   ///< max. baudrate divider PCD --> PICC

#define TCLDSDFLT      0   ///< default baudrate divider PICC --> PCD
#define TCLDRDFLT      0   ///< default baudrate divider PCD --> PICC


char Mf500PcdConfig(void);
char Mf500ActiveAntennaSlaveConfig(void);
char Mf500ActiveAntennaMasterConfig(void);
char Mf500PiccRequest(unsigned char req_code, // request code ALL = 0x52
                                           // or IDLE = 0x26
                   unsigned char *atq);     // answer to request
char Mf500PiccCommonRequest(unsigned char req_code,
                         unsigned char *atq);
char Mf500PiccAnticoll (unsigned char bcnt,
                     unsigned char *snr);
char Mf500PiccCascAnticoll (unsigned char select_code,
                         unsigned char bcnt,
                         unsigned char *snr);
char Mf500PiccSelect(unsigned char *snr,
                  unsigned char   *sak);
char Mf500PiccCascSelect(unsigned char   select_code,
                        unsigned char   *snr,
                        unsigned char   *sak);
char Mf500PiccActivateIdle(unsigned char   br,
                           unsigned char   *atq,
                           unsigned char   *sak,
                           unsigned char   *uid,
                           unsigned char   *uid_len);
char Mf500PiccActivateWakeup(unsigned char   br,
                             unsigned char   *atq,
                             unsigned char   *sak,
                             unsigned char   *uid,
                             unsigned char   uid_len);
char Mf500PiccAuth(unsigned char   key_type,    // PICC_AUTHENT1A or PICC_AUTHENT1B
                   unsigned char   key_addr,    // key address in reader storage
                   unsigned char   block);       // block number which should be
                                              // authenticated
char Mf500PiccAuthE2(   unsigned char   auth_mode,   // PICC_AUTHENT1A or PICC_AUTHENT1B
                     unsigned char   *snr,        // 4 bytes card serial number
                     unsigned char   key_sector,  // 0 <= key_sector <= 15
                     unsigned char   block);      //  0 <= block <= 256
char Mf500HostCodeKey(  unsigned char   *uncoded, // 6 bytes key value uncoded
                     unsigned char   *coded);   // 12 bytes key value coded
char Mf500PiccAuthKey(  unsigned char   auth_mode,
                     unsigned char   *snr,
                     unsigned char   *keys,
                     unsigned char   block);
char Mf500PcdLoadKeyE2(unsigned char   key_type,
                       unsigned char   sector,
                       unsigned char   *uncoded_keys);
char Mf500PiccAuthState(   unsigned char   auth_mode,
                        unsigned char   *snr,
                        unsigned char   block);

char Mf500PiccRead(  unsigned char   addr,
                  unsigned char   * DataTemp);
char Mf500PiccWrite( unsigned char   addr,
                  unsigned char   *DataTemp);
char Mf500PiccValue(unsigned char   dd_mode,
                   unsigned char   addr,
                   unsigned char   *value,
                   unsigned char   trans_addr);
char Mf500PiccValueDebit(unsigned char   dd_mode,
                         unsigned char   addr,
                         unsigned char   *value);
char Mf500PiccHalt(void);
char Mf500PcdSetDefaultAttrib(void);
char Mf500PiccExchangeBlock(unsigned char    *send_data,
                           unsigned char   send_bytelen,
                           unsigned char    *rec_data,
                           unsigned char    *rec_bytelen,
                           unsigned char   append_crc,
                           unsigned long   timeout );

char Mf500LoadConfig(void);
//////////////////////////////////////////////////////////////////////
//        S E T   D E F A U L T    C O M M   A T T R I B S
///////////////////////////////////////////////////////////////////////
char Mf500PcdSetDefaultAttrib(void)
{
   //char status = MI_OK;
   //Mf500ActiveAntennaMasterConfig();
   //WriteRC(RegControl,0x00);//////////by allen
   //WriteRC(RegTxControl,0x10);
   //WriteRC(RegMfOutSelect,0x00);
   return MI_OK;
}


///////////////////////////////////////////////////////////////////////
//      M I F A R E   M O D U L E   C O N F I G U R A T I O N
///////////////////////////////////////////////////////////////////////
/*char Mf500LoadConfig(void)
{
   char  status = MI_OK;
   unsigned char code InitRegValue[32]={
        0x00,0x58,0x3f,0x3f,0x19,0x13,0x00,0x00,
        0x00,0x73,0x08,0xad,0xff,0x00,0x41,0x00,
        0x00,0x06,0x03,0x63,0x63,0x00,0x00,0x00,
        0x00,0x08,0x07,0x06,0x0a,0x02,0x00,0x00
        };

   FlushFIFO();    // empty FIFO
   ResetInfo(MInfo);
   MRcvBuffer[0]=0x10; // addr low byte
   MRcvBuffer[1]=0x00; // addr high byte

   memcpy(MRcvBuffer+2,InitRegValue,32);

   MInfo.nBytesToSend=34;

   status = PcdSingleResponseCmd(PCD_WRITEE2,
                   MRcvBuffer,
                   MRcvBuffer,
                   &MInfo); // write e2
   return status;

} */
/********************************************************************
/*                  Mf500PcdConfig                                  *
********************************************************************/
char Mf500PcdConfig(void)
{
   char   status = MI_RESETERR;
   unsigned short   RstLoopCnt = 0;
   unsigned short   CmdWaitCnt = 0;

   // global initialisation
   MRcvBuffer  = RicRxTxBuffer;  // initialise send buffer
   MRcvBuffer  = RicRxTxBuffer;  // initialise receive buffer

   status = PcdReset();        ///////////////////

   if (status == MI_OK)
   {

     // test clock Q calibration - value in the range of 0x46 expected
     WriteRC(RegClockQControl,0x0);
     WriteRC(RegClockQControl,0x40);
//     SleepUs(24);  // wait approximately 100 us - calibration in progress
     SleepMs(1);
    ClearBitMask(RegClockQControl,0x40); // clear bit ClkQCalib for
                                          // further calibration

     // The following values for RegBitPhase and
     // RegRxThreshold represents an optimal
     // value for our demo package. For user
     // implementation some changes could be
     // necessary
     // initialize bit phase
     WriteRC(RegBitPhase,0xad);//0xad

     // initialize minlevel
     WriteRC(RegRxThreshold,0xff);//0xff   YinHan

     // disable auto power down
     WriteRC(RegRxControl2,0x01);//0x01

     // Depending on the processing speed of the
     // operation environment, the waterlevel
     // can be adapted. (not very critical for
     // mifare applications)
     // initialize waterlevel to value 4
     WriteRC(RegFIFOLevel,0x1a); // initialize to 26d//0x1a

     //Timer Konfiguration
     WriteRC(RegTimerControl,0x02);  // TStopRxEnd=0,TStopRxBeg=0,////////0x02
                                   // TStartTxEnd=1,TStartTxBeg=0
                                   // timer must be stopped manually

     WriteRC(RegIRqPinConfig,0x02); //delete allen 6.06 interrupt active low enable//03

     WriteRC(RegRxWait,0x06);// WriteRC(RegRxWait,0x06);  change for YinHan
     //WriteRC(RegCwConductance,0xf0);//////////by allen
     //WriteRC(RegTxControl,0x53);
     //WriteRC(RegMfOutSelect,0x00);
     PcdRfReset(10);//10ms            // Rf - reset and enable output driver

   }

   return status;
}

///////////////////////////////////////////////////////////////////////
//          M I F A R E   R E M O T E   A N T E N N A
//  Configuration of slave module
///////////////////////////////////////////////////////////////////////
/*char Mf500ActiveAntennaSlaveConfig(void)
{
   char  status = MI_OK;

   FlushFIFO();    // empty FIFO
   ResetInfo(MInfo);
   MRcvBuffer[0] = 0x10; // addr low byte
   MRcvBuffer[1] = 0x00; // addr high byte

   MRcvBuffer[2] = 0x00; // Page
   MRcvBuffer[3] = 0x7B; // RegTxControl modsource 11,InvTx2,Tx2RFEn,TX1RFEn
   MRcvBuffer[4] = 0x3F; // RegCwConductance
   MRcvBuffer[5] = 0x3F; // RFU13
   MRcvBuffer[6] = 0x19; // RFU14
   MRcvBuffer[7] = 0x13; // RegModWidth
   MRcvBuffer[8] = 0x00; // RFU16
   MRcvBuffer[9] = 0x00; // RFU17

   MRcvBuffer[10] = 0x00; // Page
   MRcvBuffer[11] = 0x73; // RegRxControl1
   MRcvBuffer[12] = 0x08; // RegDecoderControl
   MRcvBuffer[13] = 0x6c; // RegBitPhase
   MRcvBuffer[14] = 0xFF; // RegRxThreshold
   MRcvBuffer[15] = 0x00; // RFU1D
   MRcvBuffer[16] = 0x00; // RegRxControl2
   MRcvBuffer[17] = 0x00; // RegClockQControl

   MRcvBuffer[18] = 0x00; // Page
   MRcvBuffer[19] = 0x06; // RegRxWait
   MRcvBuffer[20] = 0x03; // RegChannelRedundancy
   MRcvBuffer[21] = 0x63; // RegCRCPresetLSB
   MRcvBuffer[22] = 0x63; // RegCRCPresetMSB
   MRcvBuffer[23] = 0x0;  // RFU25
   MRcvBuffer[24] = 0x04; // RegMfOutSelect enable mfout = manchester HT
   MRcvBuffer[25] = 0x00; // RFU27

   // PAGE 5      FIFO, Timer and IRQ-Pin Configuration
   MRcvBuffer[26] = 0x00; // Page
   MRcvBuffer[27] = 0x08; // RegFIFOLevel
   MRcvBuffer[28] = 0x07; // RegTimerClock
   MRcvBuffer[29] = 0x06; // RegTimerControl
   MRcvBuffer[30] = 0x0A; // RegTimerReload
   MRcvBuffer[31] = 0x02; // RegIRqPinConfig
   MRcvBuffer[32] = 0x00; // RFU
   MRcvBuffer[33] = 0x00; // RFU
   MInfo.nBytesToSend   = 34;

   status = PcdSingleResponseCmd(PCD_WRITEE2,
                   MRcvBuffer,
                   MRcvBuffer,
                   &MInfo); // write e2
   return status;
}
  */
///////////////////////////////////////////////////////////////////////
//          M I F A R E   R E M O T E   A N T E N N A
//  Configuration of master module
///////////////////////////////////////////////////////////////////////
/*char Mf500ActiveAntennaMasterConfig(void)
{
   char  status = MI_OK;

   WriteRC(RegRxControl2,0x42);
   WriteRC(RegTxControl,0x10);
   WriteRC(RegBitPhase,0x11);
//WriteRC(RegControl,0x00);//////by allen
   return status;
}
*/
///////////////////////////////////////////////////////////////////////
//          M I F A R E    R E Q U E S T
///////////////////////////////////////////////////////////////////////
char Mf500PiccRequest(unsigned char req_code, // request code ALL = 0x52
                                           // or IDLE = 0x26
                   unsigned char *atq)     // answer to request
{
  return Mf500PiccCommonRequest(req_code,atq);
}

///////////////////////////////////////////////////////////////////////
//          M I F A R E   C O M M O N   R E Q U E S T
///////////////////////////////////////////////////////////////////////
char Mf500PiccCommonRequest(unsigned char req_code,
                         unsigned char *atq)
{
   char status = MI_OK;
   //unsigned char  nByte;
   //unsigned char  Temp;
   //unsigned char  Temp1;
    //************* initialize ******************************
   if ((status = Mf500PcdSetDefaultAttrib()) == MI_OK)
   {

      PcdSetTmo(106);//allen 10.23//106

      WriteRC(RegChannelRedundancy,0x03); // RxCRC and TxCRC disable, parity enable
      ClearBitMask(RegControl,0x08);      // disable crypto 1 unit
      WriteRC(RegBitFraming,0x07);        // set TxLastBits to 7////0x07