dm9000x.c

S3C2410硬件平台下的UBOOT下的DM9000E驱动

		        for (i = 0, oft = 0x10; i < 6; i++, oft++)
			                iow(db, oft, dev->enetaddr[i]);
			dmfe_init_dm9000(dev);
//			dmfe_init_dm9000
//			eth_register(dev);
		}
//	}while(iobase <= DM9000_MAX_IO);

	if (dm9000_count) {
		//request_irq(db->irq, &dmfe_interrupt,0,"DM9000 device",dev);
		/* Enable interrupts for GPIO6 */
//H--->L

	}

	return dm9000_count ? 0:-1;
}
extern int eth_send(volatile void *packet, int len)
{
//	board_info_t *db = (board_info_t *)(dev->priv);
	volatile unsigned short * data_ptr;
	int i, tmplen,tmo,s;
//	unsigned long flags;

//	printk("Enter eth_send\n");

	/* Disable all interrupt */
	iow(db, 0xff, 0x80);

	/* Move data to DM9000 TX RAM */
	data_ptr = packet;
	outb(0xf8, DM9000_MIN_IO/*db->ioaddr*/);

	/* Word mode */
	tmplen = (len + 1) / 2;
	//printf("Sending: ");
	for (i = 0; i < tmplen; i++){
       		outw(((u16 *)data_ptr)[i],DM9000_MIN_IO + 4);
//		printf("%04x ",((u16 *)data_ptr)[i]);
//		if(i%10==0)printf("\n");
	}
		/* Set TX length to DM9000 */
		iow(db,0xfc, len & 0xff);
		iow(db,0xfd, (len >> 8) & 0xff);

		/* Issue TX polling command */
		iow(db,0x2, 0x1);	/* Cleared after TX complete */
		

//		dev->trans_start = jiffies;	/* saved the time stamp */
	    /* wait for transfer to succeed */
	    tmo = get_timer(0) + 5 * CFG_HZ;
    	    while((s = ior(db, 0x01) & 0xc) ==0) /* Got TX complete status */
   		{
	            if (get_timer(0) >= tmo)
			            break;
	        }
	
    	if (s & 0xc != 0) {
        	printf("\n------- transmission error %#x\n", s);
	    }
    
	//		tx_status = ior(db, 0x01);
 
	/* Re-enable interrupt mask */ 
//	restore_flags(flags);
	iow(db, 0xff, 0x83);
//	printk("Finished send packet\n");

	return 0;
}
extern int eth_rx(void) /*static void dmfe_packet_receive (DEVICE *dev)*/
{
	int i;
    	unsigned short RxLen,rxlen,tmplen;    
    	unsigned short *addr;
        unsigned short RxStatus,status;
	u8 rxbyte;
	int int_status;
//	printk("eth_rx called\n");
        /* Disable all interrupt */
        iow(db, 0xff, 0x80);
        /* Got DM9000 interrupt status */
        int_status = ior(db, 0xfe);             /* Got ISR */
        iow(db, 0xfe, int_status);              /* Clear ISR status */
        if (!(int_status & 1))
//		printf("Receive interrupt\n");
//	else
	{	
		goto jump_next;		
//		return 0;	
	}	
           rxbyte = ior(db, 0xf0); /* Dummy read */
                rxbyte = ior(db, 0xf0); /* Got most updated data */
	if (rxbyte != DM9000_PKT_RDY) 				
	{	
		goto jump_next;
//		return 0;	
	}	
					
//	status = get_reg(PP_RER);
//        if ((status & PP_RER_RxOK) == 0)
//	      return 0;
	outb(0xf2, db->ioaddr);	      
	RxStatus = inw(DM9000_MIN_IO + 4);
	RxLen = inw(DM9000_MIN_IO + 4);
	
//	status = CS8900_RTDATA;       /* stat */
  // 	rxlen = CS8900_RTDATA;        /* len */
//    	if(rxlen > PKTSIZE_ALIGN + PKTALIGN)
  //       	printf("packet too big!\n");
	if (RxLen > DM9000_PKT_MAX){ 
		printk("<DM9000> RST: RX Len:%x\n", RxLen);
		goto jump_next;
//		return 0;
	}
	if (RxLen < 0x40) {
		printk("DM9000> RST: RX Len:%x\n", RxLen);
		goto jump_next;
//		return 0;
	}	
	tmplen = (RxLen + 1) / 2;
	//printf("Received:");
	addr = (unsigned short *)NetRxPackets[0];
	for (i = 0; i < tmplen; i++){
		    ((u16 *)addr)[i] = inw(DM9000_MIN_IO + 4);
		    //printf("%04x ",((u16 *)rdptr)[i]);
	}

//       	for(addr = (unsigned short *)NetRxPackets[0], i = rxlen >> 1; i > 0; i-- )
//	      *addr++ = CS8900_RTDATA;
//	if(rxlen & 1)
//	          *addr++ = CS8900_RTDATA;
        /* Pass the packet up to the protocol layers. */
        NetReceive(NetRxPackets[0], RxLen);
	iow(db, 0xff, 0x83); 
	return RxLen;
jump_next:
        /* Re-enable interrupt mask */
	iow(db, 0xff, 0x83);
	return 0;
}



/*
  Open the interface.
  The interface is opened whenever "ifconfig" actives it.
*/
static int dmfe_open( DEVICE *dev)
{
	board_info_t * db = (board_info_t *)(dev->priv);

	DMFE_DBUG(0, "dmfe_open", 0);


	printk("***open\n");
	/* Initilize DM910X board */
	dmfe_init_dm9000(dev);
 
	/* Init driver variable */
	db->dbug_cnt = 0;
	db->runt_length_counter = 0;
	db->long_length_counter = 0;
	db->reset_counter = 0;
	db->rx_pkt_count = 0;
	//memset(rx_pkt,0,sizeof(rx_pkt)); //note by HHTECH
	printf("Waiting for link up ...");
	while(!(ior(db,0x01) & 0x40))
		udelay(100);
	switch(ior(db,0x01) & 0x80)
	{
		case 0:
			printf("100M\n");
			break;
		case 1:
			printf("10M\n");
			break;
	}
	/* Active System Interface */
	//dev->tbusy = 0;	/* Can transmit packet */
	//dev->start = 1;	/* interface ready */
	//mark above for kernel 2.4

	/* set and active a timer process */
//	init_timer(&db->timer);
//	db->timer.expires = DMFE_TIMER_WUT * 2;
//	db->timer.data = (unsigned long)dev;
//	db->timer.function = &dmfe_timer;
//	add_timer(&db->timer);
	
	return 1;
}

/* Set PHY operationg mode
*/
static void set_PHY_mode(board_info_t *db)
{
	u16 phy_reg4 = 0x01e1, phy_reg0=0x1000;

	if ( !(db->op_mode & DM9000_AUTO) ) {
		switch(db->op_mode) {
		case DM9000_10MHD: phy_reg4 = 0x21; 
                             phy_reg0 = 0x0000; break;
		case DM9000_10MFD: phy_reg4 = 0x41; 
                             //phy_reg0 = 0x0100; 
                               phy_reg0 = 0x1100; //add by simon 2001.11.8
                              break;
                       
		case DM9000_100MHD: phy_reg4 = 0x81; phy_reg0 = 0x2000; break;
		case DM9000_100MFD: phy_reg4 = 0x101; 
				//phy_reg0 = 0x2100; 
				  phy_reg0 =0x3100; //add by simon 2001.11.8
                                break;
		}
		phy_write(db, 4, phy_reg4);	/* Set PHY media mode */
		phy_write(db, 0, phy_reg0);	/*  Tmp */
	}

	iow(db, 0x1e, 0x01);		/* Let GPIO0 output */
	iow(db, 0x1f, 0x00);		/* Enable PHY */
}

/*
	Init HomeRun DM9801
*/
static void program_dm9801(board_info_t *db, u16 HPNA_rev)
{
	u16 reg16, reg17, reg24, reg25;

	if ( !nfloor ) nfloor = DM9801_NOISE_FLOOR;

	reg16 = phy_read(db, 16);
	reg17 = phy_read(db, 17);
	reg24 = phy_read(db, 24);
	reg25 = phy_read(db, 25);

	switch(HPNA_rev) {
	case 0xb900: /* DM9801 E3 */
		reg16 |= 0x1000;
		reg25 = ( (reg24 + nfloor) & 0x00ff) | 0xf000;
		break;
	case 0xb901: /* DM9801 E4 */
		reg25 = ( (reg24 + nfloor) & 0x00ff) | 0xc200;
		reg17 = (reg17 & 0xfff0) + nfloor + 3;
		break;
	case 0xb902: /* DM9801 E5 */
	case 0xb903: /* DM9801 E6 */
	default:
		reg16 |= 0x1000;
		reg25 = ( (reg24 + nfloor - 3) & 0x00ff) | 0xc200;
		reg17 = (reg17 & 0xfff0) + nfloor;
		break;
	}

	phy_write(db, 16, reg16);
	phy_write(db, 17, reg17);
	phy_write(db, 25, reg25);
}

/*
	Init LongRun DM9802
*/
static void program_dm9802(board_info_t *db)
{
	u16 reg25;

	if ( !nfloor ) nfloor = DM9802_NOISE_FLOOR;

	reg25 = phy_read(db, 25);
	reg25 = (reg25 & 0xff00) + nfloor;
	phy_write(db, 25, reg25);
}

/* Identify NIC type
*/
static void identify_nic(board_info_t *db)
{
	u16 phy_reg3;

	iow(db, 0, DM9000_EXT_MII);
	phy_reg3 = phy_read(db, 3);
	switch(phy_reg3 & 0xfff0) {
	case 0xb900:
		if (phy_read(db, 31) == 0x4404) {
			db->nic_type =  HOMERUN_NIC;
			program_dm9801(db, phy_reg3);
		} else {
			db->nic_type = LONGRUN_NIC;
			program_dm9802(db);
		}
		break;
	default: db->nic_type = FASTETHER_NIC; break;
	}
	iow(db, 0, DM9000_INT_MII);	
}

/* Initilize dm9000 board
*/
static void dmfe_init_dm9000(DEVICE *dev)
{
	board_info_t *db = (board_info_t *)dev->priv;
 
	DMFE_DBUG(0, "dmfe_init_dm9000()", 0);

	/* RESET device */
	iow(db, 0, 1);
	udelay(100);	/* delay 100us */

	/* I/O mode */
	db->io_mode = ior(db, 0xfe) >> 6; 	/* ISR bit7:6 keeps I/O mode */

	/* NIC Type: FASTETHER, HOMERUN, LONGRUN */
	identify_nic(db);	

	/* Set PHY */
	db->op_mode = media_mode;
	set_PHY_mode(db);

	/* Init needed register value */
	db->reg0 = DM9000_REG00;
	if ( (db->nic_type != FASTETHER_NIC) && (db->op_mode & DM9000_1M_HPNA) )
		db->reg0 |= DM9000_EXT_MII;
	
	/* User passed argument */
	db->reg5 = reg5;
	db->reg8 = reg8;
	db->reg9 = reg9;
	db->rega = rega;

	/* Program operating register */
	iow(db, 0x00, db->reg0);
	iow(db, 0x02, 0);	/* TX Polling clear */
	iow(db, 0x08, 0x3f);	/* Less 3Kb, 200us */
	iow(db, 0x09, db->reg9);/* Flow Control : High/Low Water */
	iow(db, 0x0a, db->rega);/* Flow Control */
	iow(db, 0x2f, 0);	/* Special Mode */
	iow(db, 0x01, 0x2c);	/* clear TX status */
	iow(db, 0xfe, 0x0f); 	/* Clear interrupt status */
 
	/* Set address filter table */
	dm9000_hash_table(dev);

	/* Activate DM9000 */
	iow(db, 0x05, db->reg5 | 1);	/* RX enable */
	iow(db, 0xff, DM9000_REGFF); 	/* Enable TX/RX interrupt mask */
 
	/* Init Driver variable */
	db->link_failed = 1;
	db->tx_pkt_cnt = 0;
	db->queue_pkt_len = 0;
}

/*
  Hardware start transmission.
  Send a packet to media from the upper layer.
*/
static int dmfe_start_xmit(DEVICE *dev, volatile void* packet, int len)
{
	board_info_t *db = (board_info_t *)(dev->priv);
	char * data_ptr;
	int i, tmplen;
	unsigned long flags;

	printk("Enter dmfe_start_xmit\n");
	DMFE_DBUG(0, "dmfe_start_xmit", 0);

	/* Resource flag check */
	//if ( test_and_set_bit(0, (void *)&dev->tbusy) || (db->tx_pkt_cnt > 1) )
	//	return 1;
	//mark above by simon 2001.9.4 for kernel 2.4
//	if (db->tx_pkt_cnt > 1) {
//		printf("db->tx_pkt_cnt > 1\n");
//		return 1; //add by simon 2001.9.4
//	}

	/* Disable all interrupt */
	iow(db, 0xff, 0x80);
//	save_and_cli(flags);

	/* Move data to DM9000 TX RAM */
	data_ptr = (char*)packet;
	outb(0xf8, db->ioaddr);

	/* Word mode */
	tmplen = (len + 1) / 2;
	//printf("Sending: ");
	for (i = 0; i < tmplen; i++){
       		outw(((u16 *)data_ptr)[i], db->io_data);
		printf("%04x ",((u16 *)data_ptr)[i]);
		if(i%10==0)printf("\n");
	}
	//printf("\n");
	/* TX control: First packet immediately send, second packet queue */
	if (db->tx_pkt_cnt == 0) {
		/* First Packet */
		db->tx_pkt_cnt++;

		/* Set TX length to DM9000 */
		iow(db, 0xfc, len & 0xff);
		iow(db, 0xfd, (len >> 8) & 0xff);

		/* Issue TX polling command */
		iow(db, 0x2, 0x1);	/* Cleared after TX complete */

//		dev->trans_start = jiffies;	/* saved the time stamp */
	} else {
		/* Second packet */
		db->tx_pkt_cnt++;
		db->queue_pkt_len = len;
	}
 
	/* free this SKB */

	/* Re-enable resource check */
//	if (db->tx_pkt_cnt == 1)
	        //clear_bit(0, (void*)&dev->tbusy); //mark by simon 2001.9.4 for kernel 2.4
		
	/* Re-enable interrupt mask */ 
//	restore_flags(flags);
	iow(db, 0xff, 0x83);

	return 0;
}

/*
  Stop the interface.
  The interface is stopped when it is brought.
*/
void eth_halt( void )
/*static void dmfe_stop( DEVICE *dev)*/
{
//	board_info_t *db = (board_info_t *)dev->priv;

		/* Init network device */
			dev =malloc(sizeof( *dev)); 
			//memset(dev,0,sizeof(dev_t));
			memset(dev,0,sizeof(*dev));

			/* Allocated board information structure */
			db = malloc(sizeof(*db));
			memset(db, 0, sizeof(*db));
			dev->priv = db;	/* link device and board info */
			db->next_dev = dmfe_root_dev;
			dmfe_root_dev = dev;
			db->ioaddr = iobase;
			db->io_data = iobase + 4;
			db->irq = 0;

			/* driver system function */
			dev->iobase = iobase;
			dev->init = dmfe_open;
			dev->send = dmfe_start_xmit;
			//dev->halt = dmfe_stop;
			dev->recv = dmfe_recv;



	//	DMFE_DBUG(0, "dmfe_stop", 0);

	/* deleted timer */
//	del_timer(&db->timer);

	/* disable system */
	//dev->start = 0;	/* interface disable */
	//dev->tbusy = 1;	/* can't transmit */
	//mark above by simon 2001.9.4


	/* RESET devie */
	phy_write(db, 0x00, 0x8000);	/* PHY RESET */
	iow(db, 0x1f, 0x01);	/* Power-Down PHY */
	iow(db, 0xff, 0x80);	/* Disable all interrupt */
	iow(db, 0x05, 0x00);	/* Disable RX */