system.h

S3C4510的LCD測試程式(含源碼,可以順利修改自己的功能)

/*  ks32c5000/ES0 : d:/ks32c5000/program/BDTest/cache.h     98/02/13  */
/***********************************************************************/
/*                                                                     */
/*   MODULE:  BDTest/cache.h                                           */
/*   DATE:    98/02/13                                                 */
/*   PURPOSE: Cache & internal SRAM test module header file            */
/*                                                                     */
/*---------------------------------------------------------------------*/
/*      Copyright (C) 1997 Samsung Electronics.                        */
/*                                                                     */
/*      programmed by Young-sun kim                                    */
/***********************************************************************/

#ifndef  _SYSTEM_H
#define  _SYSTEM_H


/* 
 *   SYSTEM CONFIGURATION REGISTER 
 */
#define STALL            0x00000001 
#define CACHE            0x00000002
#define WRITE_BUFF  	 0x00000004
#define CACHE_MODE       0x00000030
#define CACHE_MODE_00    0x00000000
#define CACHE_MODE_01    0x00000010
#define CACHE_MODE_10    0x00000020
#define CACHE_CONF_ON    0x0000003f


/* 
 *  Cache memory direct access address
 */
#define Set0BaseAddress 0x10000000
#define Set1BaseAddress 0x10800000
#define Set0CacheRAM   0x10000000  // Set 0 Cache ram address
#define Set1CacheRAM   0x10800000  // Set 1 Cache ram address
#define TagRAM         0x11000000  // Tag ram address
#define NonCacheArea   0x04000000  // ADDR[26] NonCacheable control bit

/* Check Cache Mode */
#define CACHE_ENABLED 	(SYSCFG & CACHE)

extern void RefreshCycle(unsigned int /*refresh cycle */);
extern void RefCycleCal(void);

extern unsigned int fCPU_c(int /*devider*/); 
/* 
 * Calculate CPU Clock from arqument divider value
 */


extern unsigned int fCPU_r(void);
/* 
 * Get CPU Clock from CLKCON divider value
 */


extern void CpuClockCon(void);                 //SetUp CPU clock
/*
 * CPU clock control function
 * ~~~~~~~~~~~~~~~~~~~~~~~~~~
 * CPU clock will be changed to fMCLK/(devider+1).
 * where, devider value get from keyboard.
 * return value is changed CPU clock
 */


extern void CacheTest(void);
/* 
 * Cache  test top module 
 */

extern void CacheStartUpDialog(void);
/*
 *  StartUp diaglog for test Cache & SRAM
 */

extern void CacheConfig(void);
/*
 * Cache & SRAM control status
 */ 

extern void CacheFlush(void);
extern void CacheClear(void);
/*
 * Cache flush function for re-configuration cache modes
 */ 


extern void PrintCacheItems(void);
/* 
 * Display Cache & SRAM test items 
 */

extern void InterSramTest(void);
extern void SelfTestMem(unsigned int * /* address*/, int /*unit*/);
/*
 * Internal SRAM read & write test with option input pattern
 */

extern void TagMarch10(void);
extern void SramMarch10_4k(void);
extern void SramMarch10_8k(void);
extern void Set0March10(void);
extern void Set1March10(void);
/*
 *  Cache Memory(256 word Tag RAM, 4kbytes set0, 4kbytes set1 
 *  Cache memory test use by 10N march algorithm
 *  ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 *  - Cache memory address range
 *     Tag  = 0x11000000~0x11000400 (256word)
 *  
 *     . at Cache Mode : 8kb SRAM, 0kb Cache
 *        SRAM = 0x3fe0000~0x3fe02000  (8k bytes)
 */

extern int March10NAllTest(void) ;
/*
 *  All 10N March Test
 *  March-10N Test for Tag-RAM, 4K-SRAM, 8K-SRAM, Set0, Set1
 */

extern int March10N32(unsigned int */*addr*/,int /*unit*/,unsigned int /*pattern*/, int /*delay*/);
/*
 *  Main 10N March Algorithm
 *  ~~~~~~~~~~~~~~~~~~~~~~~~
 *  March10N32(base address, word size, pattern)
 */

extern int MarchSub1(unsigned int */*addr*/,int /*unit*/,unsigned int /*pattern*/,int /*dir*/, int /*delay*/);
/*
 *  This function is parts of 10N march Algorithms
 *  Memory  read[pattern] & write[~pattern] or 
 *          read[~pattern] & write[~pattern] 
 *  on increment or decrement address.
 *
 *  _MarchSub1(base or end address, word size, pattern, address direction)
 */

extern void CycleDelay(int /*delay*/);
/* 
 * delay time function with CPU clock cycle
 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 */

extern void SearchPattern(void);
extern void SyscfgInit(int /*cm*/);

#endif  /*  _SYSTEM_H  */