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ucos基于motorola经典的龙珠系列的移植代码

                         uC/OS-II, The Real-Time Kernel

                              Motorola 683xx Port
                                     V1.05
                                 READ ME FILE


------------------------------ COSMIC C COMPILER ------------------------------
1) The  current  version  of  the Motorola 683xx port is based on the COSMIC C
   Compiler V4.1c:

    COSMIC Software
    400 West Cummings Park, Suite 6000
    Woburn, MA 01801-6512
    USA
    
    781-932-2556
    781-932-2557 (FAX)
    
    www.cosmic-us.com
    [e-mail]
    
2) The C compiler is assumed to reside in the F:\C683xx directory.

3) The code was tested using the COSMIC ZAP V3.11a Instruction Set Simulator.

4) The ZAP debugger is assumed to reside in the F:\ZAP-300 directory.


-------------------------------- 683xx PORT NOTES ------------------------------

1) The port installation batch file (INSTALL.BAT) places the 683xx port in the
   following directory of the selected drive:
   
   \SOFTWARE\uCOS-II\M683xx\COSMIC
   
   This directory contains the following sub-directories:
   
   \SOFTWARE\uCOS-II\M683xx\COSMIC\SOURCE
       This directory contains the port source files as well as the sample test
       code (i.e. TEST.C).
   
   \SOFTWARE\uCOS-II\M683xx\COSMIC\TEST
       This directory contains BUILD.BAT which is used to compile, assemble and
       link the test code.
       
   \SOFTWARE\uCOS-II\M683xx\COSMIC\WORK
       This is the directory in which the test code is built from.
       
   \SOFTWARE\uCOS-II\M683xx\COSMIC\OBJ
       This  directory  contains the  object files produced by the compiler and
       assembler.
       
   \SOFTWARE\uCOS-II\M683xx\COSMIC\LST
       This directory contains the 'listing' files produced by the compiler and
       the assembler.  For the C compiler, these files contain the  interleaved
       C  source  along  with  the  assembly  language  code  generated  by the 
       compiler.

2) TRAP #15 is used to perform 'task level' context switches.  The TRAP handler
   needs to point to OSCtxSw() (see VECTORS.C).
   
3) All tasks execute in  SUPERVISOR  mode and thus, each task has an initial SR
   set to 0x2000.   
      
4) The port assumes a  CPU32 or a 68020, 68030 or 68040  because the  exception
   stack frame contains a FORMAT/VECTOR OFFSET.
   
5) IMPORTANT: Some compilers will keep track of 'global' variables by using the
   processor's  A5  register.   If your compiler makes use of this feature then
   you will  need to load each task's  A5  register with this  GLOBAL  variable 
   pointer.   You can do this in 'OSTaskStkInit()', see OS_CPU_C.C.   Note that
   the  COSMIC  compiler doesn't use A5 and thus there was no need to implement
   this feature in this port.
   

------------------------------ REPORTING PROBLEMS -----------------------------

If  you find a problem (i.e. bug) in uC/OS-II or this port,  do not hesitate to
report the problem to me:

 1) Through e-mail:

        My e-mail address is:   [e-mail]

 2) By writing to me:

        Jean J. Labrosse
        949 Crestview Circle
        Weston, FL 33327
        U.S.A.

 3) By calling me (after 8PM Eastern time, US):

        [phone]
        [phone], FAX

Make sure that the problem you are  reporting is in  uC/OS-II or this port and
not your application.    

------------------------------- M683xx RELEASE NOTES -------------------------

July 3, 1999: V1.05
-------------------

 1) Added function OSIntExit68K() (see OS_CPU_A.S) which must now be JUMPed to
    at the end of ALL ISRs.  Your ISR code MUST now look as follows:
  
    _YourISR:
        ADDQ.B    #1,_OSIntNesting       ; OSIntNesting++
        MOVEM.L   A0-A6/D0-D7,-(A7)      ; Save ALL registers 
        ;   CLEAR the INTERRUPT source!
        JSR       _YourISRHandler
        JMP       _OSIntExit68K          ; Exit through uC/OS-II at end of ISR

    As you can see, you MUST increment OSIntNesting at the beginning of the ISR
    and NOT call OSIntExit(). OSIntExit68K() knows to return to task level code
    because it examines the stack frame for the contents of the Status register 
    (SR) that is pushed onto the stack when the CPU recognizes an interrupt.

  2) Included MAKETEST.BAT and TEST.MAK to build the test code.   It is assumed
     that you have a MAKE utility and a TOUCH utility.

  3) Skipped  Version 1.03 and 1.04  to have the same revision level as the SDS
     port.


January 11, 1999: V1.02
-----------------------

 1) The  macros  OS_ENTER_CRITICAL()  and  OS_EXIT_CRITICAL()  were implemented
    incorrectly.  These functions were saving the CCR register (8-bits) instead
    of the SR register (16-bits).   This means that the  critical sections were
    not protected as they should have.
    
 
December 15, 1998: V1.01
------------------------

 1) OSCtxSw() had an extra MOVE.L (A1),A7  instruction which was not necessary.
    The extra instruction has been removed.
 
 2) OSIntCtxSw() had an extra  'MOVEM.L A0-A6/D0-D7,-(A7)'  which would cause a
    crash. This instruction was located immediately after the ADDA instruction.
    The extra instruction has been removed.


November 17, 1998: V1.00
------------------------

 1) First release of the M683xx port.