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<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7X256_PMC.html#PMC_PCDR">PMC_PCDR</a>; <font color=#B22222>// Peripheral Clock Disable Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7X256_PMC.html#PMC_PCSR">PMC_PCSR</a>; <font color=#B22222>// Peripheral Clock Status Register</font>
<a href="#AT91_REG">AT91_REG</a> Reserved21[1]; <font color=#B22222>// </font>
<a href="#AT91_REG">AT91_REG</a> PMC_MOR; <font color=#B22222>// Main Oscillator Register</font>
<a href="#AT91_REG">AT91_REG</a> PMC_MCFR; <font color=#B22222>// Main Clock Frequency Register</font>
<a href="#AT91_REG">AT91_REG</a> Reserved22[1]; <font color=#B22222>// </font>
<a href="#AT91_REG">AT91_REG</a> PMC_PLLR; <font color=#B22222>// PLL Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7X256_PMC.html#PMC_MCKR">PMC_MCKR</a>; <font color=#B22222>// Master Clock Register</font>
<a href="#AT91_REG">AT91_REG</a> Reserved23[3]; <font color=#B22222>// </font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7X256_PMC.html#PMC_PCKR">PMC_PCKR</a>[4]; <font color=#B22222>// Programmable Clock Register</font>
<a href="#AT91_REG">AT91_REG</a> Reserved24[4]; <font color=#B22222>// </font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7X256_PMC.html#PMC_IER">PMC_IER</a>; <font color=#B22222>// Interrupt Enable Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7X256_PMC.html#PMC_IDR">PMC_IDR</a>; <font color=#B22222>// Interrupt Disable Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7X256_PMC.html#PMC_SR">PMC_SR</a>; <font color=#B22222>// Status Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7X256_PMC.html#PMC_IMR">PMC_IMR</a>; <font color=#B22222>// Interrupt Mask Register</font>
<a href="#AT91_REG">AT91_REG</a> Reserved25[36]; <font color=#B22222>// </font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7X256_RSTC.html#RSTC_RCR">RSTC_RCR</a>; <font color=#B22222>// Reset Control Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7X256_RSTC.html#RSTC_RSR">RSTC_RSR</a>; <font color=#B22222>// Reset Status Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7X256_RSTC.html#RSTC_RMR">RSTC_RMR</a>; <font color=#B22222>// Reset Mode Register</font>
<a href="#AT91_REG">AT91_REG</a> Reserved26[5]; <font color=#B22222>// </font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7X256_RTTC.html#RTTC_RTMR">RTTC_RTMR</a>; <font color=#B22222>// Real-time Mode Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7X256_RTTC.html#RTTC_RTAR">RTTC_RTAR</a>; <font color=#B22222>// Real-time Alarm Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7X256_RTTC.html#RTTC_RTVR">RTTC_RTVR</a>; <font color=#B22222>// Real-time Value Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7X256_RTTC.html#RTTC_RTSR">RTTC_RTSR</a>; <font color=#B22222>// Real-time Status Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7X256_PITC.html#PITC_PIMR">PITC_PIMR</a>; <font color=#B22222>// Period Interval Mode Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7X256_PITC.html#PITC_PISR">PITC_PISR</a>; <font color=#B22222>// Period Interval Status Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7X256_PITC.html#PITC_PIVR">PITC_PIVR</a>; <font color=#B22222>// Period Interval Value Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7X256_PITC.html#PITC_PIIR">PITC_PIIR</a>; <font color=#B22222>// Period Interval Image Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7X256_WDTC.html#WDTC_WDCR">WDTC_WDCR</a>; <font color=#B22222>// Watchdog Control Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7X256_WDTC.html#WDTC_WDMR">WDTC_WDMR</a>; <font color=#B22222>// Watchdog Mode Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7X256_WDTC.html#WDTC_WDSR">WDTC_WDSR</a>; <font color=#B22222>// Watchdog Status Register</font>
<a href="#AT91_REG">AT91_REG</a> Reserved27[5]; <font color=#B22222>// </font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7X256_VREG.html#VREG_MR">VREG_MR</a>; <font color=#B22222>// Voltage Regulator Mode Register</font>
} <b><a name="AT91S_SYS">AT91S_SYS</a></b>, *<b><a name="AT91PS_SYS">AT91PS_SYS</a></b>;
<font color=#B22222>// *****************************************************************************</font>
<font color=#B22222>// SOFTWARE API DEFINITION FOR Advanced Interrupt Controller</font>
<font color=#B22222>// *****************************************************************************</font>
<font color=#0000FF>typedef</font> <font color=#0000FF>struct</font> <b><a name="_AT91S_AIC">_AT91S_AIC</a></b> {
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7X256_AIC.html#AIC_SMR">AIC_SMR</a>[32]; <font color=#B22222>// Source Mode Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7X256_AIC.html#AIC_SVR">AIC_SVR</a>[32]; <font color=#B22222>// Source Vector Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7X256_AIC.html#AIC_IVR">AIC_IVR</a>; <font color=#B22222>// IRQ Vector Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7X256_AIC.html#AIC_FVR">AIC_FVR</a>; <font color=#B22222>// FIQ Vector Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7X256_AIC.html#AIC_ISR">AIC_ISR</a>; <font color=#B22222>// Interrupt Status Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7X256_AIC.html#AIC_IPR">AIC_IPR</a>; <font color=#B22222>// Interrupt Pending Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7X256_AIC.html#AIC_IMR">AIC_IMR</a>; <font color=#B22222>// Interrupt Mask Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7X256_AIC.html#AIC_CISR">AIC_CISR</a>; <font color=#B22222>// Core Interrupt Status Register</font>
<a href="#AT91_REG">AT91_REG</a> Reserved0[2]; <font color=#B22222>// </font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7X256_AIC.html#AIC_IECR">AIC_IECR</a>; <font color=#B22222>// Interrupt Enable Command Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7X256_AIC.html#AIC_IDCR">AIC_IDCR</a>; <font color=#B22222>// Interrupt Disable Command Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7X256_AIC.html#AIC_ICCR">AIC_ICCR</a>; <font color=#B22222>// Interrupt Clear Command Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7X256_AIC.html#AIC_ISCR">AIC_ISCR</a>; <font color=#B22222>// Interrupt Set Command Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7X256_AIC.html#AIC_EOICR">AIC_EOICR</a>; <font color=#B22222>// End of Interrupt Command Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7X256_AIC.html#AIC_SPU">AIC_SPU</a>; <font color=#B22222>// Spurious Vector Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7X256_AIC.html#AIC_DCR">AIC_DCR</a>; <font color=#B22222>// Debug Control Register (Protect)</font>
<a href="#AT91_REG">AT91_REG</a> Reserved1[1]; <font color=#B22222>// </font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7X256_AIC.html#AIC_FFER">AIC_FFER</a>; <font color=#B22222>// Fast Forcing Enable Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7X256_AIC.html#AIC_FFDR">AIC_FFDR</a>; <font color=#B22222>// Fast Forcing Disable Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7X256_AIC.html#AIC_FFSR">AIC_FFSR</a>; <font color=#B22222>// Fast Forcing Status Register</font>
} <b><a name="AT91S_AIC">AT91S_AIC</a></b>, *<b><a name="AT91PS_AIC">AT91PS_AIC</a></b>;
<font color=#B22222>// -------- <a href="AT91SAM7X256_AIC.html#AIC_SMR">AIC_SMR</a> : (<a href="AT91SAM7X256_AIC.html#AIC">AIC</a> Offset: 0x0) Control Register -------- </font>
<font color=#008200>#define</font> <b><a name="AT91C_AIC_PRIOR">AT91C_AIC_PRIOR</a></b> ((<font color=#0000FF>unsigned</font> <font color=#0000FF>int</font>) 0x7 << 0) <font color=#B22222>// (<a href="AT91SAM7X256_AIC.html#AIC">AIC</a>) Priority Level</font>
<font color=#008200>#define</font> <b><a name="AT91C_AIC_PRIOR_LOWEST">AT91C_AIC_PRIOR_LOWEST</a></b> ((<font color=#0000FF>unsigned</font> <font color=#0000FF>int</font>) 0x0) <font color=#B22222>// (<a href="AT91SAM7X256_AIC.html#AIC">AIC</a>) Lowest priority level</font>
<font color=#008200>#define</font> <b><a name="AT91C_AIC_PRIOR_HIGHEST">AT91C_AIC_PRIOR_HIGHEST</a></b> ((<font color=#0000FF>unsigned</font> <font color=#0000FF>int</font>) 0x7) <font color=#B22222>// (<a href="AT91SAM7X256_AIC.html#AIC">AIC</a>) Highest priority level</font>
<font color=#008200>#define</font> <b><a name="AT91C_AIC_SRCTYPE">AT91C_AIC_SRCTYPE</a></b> ((<font color=#0000FF>unsigned</font> <font color=#0000FF>int</font>) 0x3 << 5) <font color=#B22222>// (<a href="AT91SAM7X256_AIC.html#AIC">AIC</a>) Interrupt Source Type</font>
<font color=#008200>#define</font> <b><a name="AT91C_AIC_SRCTYPE_EXT_LOW_LEVEL">AT91C_AIC_SRCTYPE_EXT_LOW_LEVEL</a></b> ((<font color=#0000FF>unsigned</font> <font color=#0000FF>int</font>) 0x0 << 5) <font color=#B22222>// (<a href="AT91SAM7X256_AIC.html#AIC">AIC</a>) External Sources Code Label Low-level Sensitive</font>
<font color=#008200>#define</font> <b><a name="AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL">AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL</a></b> ((<font color=#0000FF>unsigned</font> <font color=#0000FF>int</font>) 0x0 << 5) <font color=#B22222>// (<a href="AT91SAM7X256_AIC.html#AIC">AIC</a>) Internal Sources Code Label High-level Sensitive</font>
<font color=#008200>#define</font> <b><a name="AT91C_AIC_SRCTYPE_INT_POSITIVE_EDGE">AT91C_AIC_SRCTYPE_INT_POSITIVE_EDGE</a></b> ((<font color=#0000FF>unsigned</font> <font color=#0000FF>int</font>) 0x1 << 5) <font color=#B22222>// (<a href="AT91SAM7X256_AIC.html#AIC">AIC</a>) Internal Sources Code Label Positive Edge triggered</font>
<font color=#008200>#define</font> <b><a name="AT91C_AIC_SRCTYPE_EXT_NEGATIVE_EDGE">AT91C_AIC_SRCTYPE_EXT_NEGATIVE_EDGE</a></b> ((<font color=#0000FF>unsigned</font> <font color=#0000FF>int</font>) 0x1 << 5) <font color=#B22222>// (<a href="AT91SAM7X256_AIC.html#AIC">AIC</a>) External Sources Code Label Negative Edge triggered</font>
<font color=#008200>#define</font> <b><a name="AT91C_AIC_SRCTYPE_HIGH_LEVEL">AT91C_AIC_SRCTYPE_HIGH_LEVEL</a></b> ((<font color=#0000FF>unsigned</font> <font color=#0000FF>int</font>) 0x2 << 5) <font color=#B22222>// (<a href="AT91SAM7X256_AIC.html#AIC">AIC</a>) Internal Or External Sources Code Label High-level Sensitive</font>
<font color=#008200>#define</font> <b><a name="AT91C_AIC_SRCTYPE_POSITIVE_EDGE">AT91C_AIC_SRCTYPE_POSITIVE_EDGE</a></b> ((<font color=#0000FF>unsigned</font> <font color=#0000FF>int</font>) 0x3 << 5) <font color=#B22222>// (<a href="AT91SAM7X256_AIC.html#AIC">AIC</a>) Internal Or External Sources Code Label Positive Edge triggered</font>
<font color=#B22222>// -------- <a href="AT91SAM7X256_AIC.html#AIC_CISR">AIC_CISR</a> : (<a href="AT91SAM7X256_AIC.html#AIC">AIC</a> Offset: 0x114) <a href="AT91SAM7X256_AIC.html#AIC">AIC</a> Core Interrupt Status Register -------- </font>
<font color=#008200>#define</font> <b><a name="AT91C_AIC_NFIQ">AT91C_AIC_NFIQ</a></b> ((<font color=#0000FF>unsigned</font> <font color=#0000FF>int</font>) 0x1 << 0) <font color=#B22222>// (<a href="AT91SAM7X256_AIC.html#AIC">AIC</a>) NFIQ Status</font>
<font color=#008200>#define</font> <b><a name="AT91C_AIC_NIRQ">AT91C_AIC_NIRQ</a></b> ((<font color=#0000FF>unsigned</font> <font color=#0000FF>int</font>) 0x1 << 1) <font color=#B22222>// (<a href="AT91SAM7X256_AIC.html#AIC">AIC</a>) NIRQ Status</font>
<font color=#B22222>// -------- <a href="AT91SAM7X256_AIC.html#AIC_DCR">AIC_DCR</a> : (<a href="AT91SAM7X256_AIC.html#AIC">AIC</a> Offset: 0x138) <a href="AT91SAM7X256_AIC.html#AIC">AIC</a> Debug Control Register (Protect) -------- </font>
<font color=#008200>#define</font> <b><a name="AT91C_AIC_DCR_PROT">AT91C_AIC_DCR_PROT</a></b> ((<font color=#0000FF>unsigned</font> <font color=#0000FF>int</font>) 0x1 << 0) <font color=#B22222>// (<a href="AT91SAM7X256_AIC.html#AIC">AIC</a>) Protection Mode</font>
<font color=#008200>#define</font> <b><a name="AT91C_AIC_DCR_GMSK">AT91C_AIC_DCR_GMSK</a></b> ((<font color=#0000FF>unsigned</font> <font color=#0000FF>int</font>) 0x1 << 1) <font color=#B22222>// (<a href="AT91SAM7X256_AIC.html#AIC">AIC</a>) General Mask</font>
<font color=#B22222>// *****************************************************************************</font>
<font color=#B22222>// SOFTWARE API DEFINITION FOR Peripheral DMA Controller</font>
<font color=#B22222>// *****************************************************************************</font>
<font color=#0000FF>typedef</font> <font color=#0000FF>struct</font> <b><a name="_AT91S_PDC">_AT91S_PDC</a></b> {
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7X256_PDC.html#PDC_RPR">PDC_RPR</a>; <font color=#B22222>// Receive Pointer Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7X256_PDC.html#PDC_RCR">PDC_RCR</a>; <font color=#B22222>// Receive Counter Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7X256_PDC.html#PDC_TPR">PDC_TPR</a>; <font color=#B22222>// Transmit Pointer Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7X256_PDC.html#PDC_TCR">PDC_TCR</a>; <font color=#B22222>// Transmit Counter Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7X256_PDC.html#PDC_RNPR">PDC_RNPR</a>; <font color=#B22222>// Receive Next Pointer Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7X256_PDC.html#PDC_RNCR">PDC_RNCR</a>; <font color=#B22222>// Receive Next Counter Register</font>
<a href="#AT91_REG">AT91_REG</a> <a href="AT91SAM7X256_PDC.html#PDC_TNPR">PDC_TNPR</a>; <font color=#B22222>// Transmit Next Pointer Register</font>
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