📄 fw_usb.h
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// ----------------------------------------------------------------------------
// ATMEL Microcontroller Software Support - ROUSSET -
// ----------------------------------------------------------------------------
// DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
// IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
// DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
// OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
// EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// ----------------------------------------------------------------------------
// File Name : fw_usb.h
// Object : header file
// Creation :
// Modif :
// ----------------------------------------------------------------------------
#ifndef FW_USB_H
#define FW_USB_H
#include "board.h"
#include "Usb100.h"
// USB define for different project
#ifndef AT91SAM9265
#define USBDEV_BASE_UDP AT91C_BASE_UDP
#define USBDEV_UDP_EP1 AT91C_UDP_EP1
#define USBDEV_UDP_EP2 AT91C_UDP_EP2
#define USBDEV_UDP_TXCOMP AT91C_UDP_TXCOMP
#define USBDEV_UDP_CONFG AT91C_UDP_CONFG
#define USBDEV_UDP_RX_DATA_BK0 AT91C_UDP_RX_DATA_BK0
#define USBDEV_UDP_RX_DATA_BK1 AT91C_UDP_RX_DATA_BK1
#else // AT91SAM9265
// remove VREG:
#define AT91F_VREG_Disable_LowPowerMode(...)
#define AT91C_BASE_VREG
#define USBDEV_BASE_UDP AT91C_BASE_UDPHS
#define AT91F_UDP_DisableIt AT91F_UDPHS_DisableIt
#define AT91F_UDP_EnableIt AT91F_UDPHS_EnableIt
#define AT91F_UDP_InterruptClearRegister AT91F_UDPHS_ITClearRegister
#define AT91F_UDP_ResetEp AT91F_UDPHS_ResetEp
#define AT91F_UDP_EnableEp AT91F_UDPHS_EnableEp
#define AT91F_UDP_EpStatus AT91F_UDPHS_EpStatus
#define AT91F_UDP_SetAddress AT91F_UDPHS_SetAddress
#define AT91F_UDP_SetState AT91F_UDPHS_SetState
#define AT91F_UDP_InterruptStatusRegister AT91F_UDPHS_INTStatusRegister
#define AT91F_UDP_GetInterruptMaskStatus AT91F_UDPHS_GetInterruptMaskStatus
#define AT91F_UDP_EpSet AT91F_UDPHS_EpSet
#define AT91F_UDP_EpClear AT91F_UDPHS_EpClear
#define AT91F_UDP_EpRead AT91F_UDPHS_EpRead
#define AT91F_UDP_EpWrite AT91F_UDPHS_EpWrite
#define USBDEV_UDP_EP1 AT91C_RESET_EPT_1
#define USBDEV_UDP_EP2 AT91C_RESET_EPT_2
#define USBDEV_UDP_TXCOMP AT91C_EN_HIGH_BD_ISO_EPT_1
#define USBDEV_UDP_CONFG AT91C_EN_HIGH_BD_ISO_EPT_1
#define USBDEV_UDP_RX_DATA_BK0 AT91C_CURRENT_BANK_CONTROL_DIR_00
#define USBDEV_UDP_RX_DATA_BK1 AT91C_CURRENT_BANK_CONTROL_DIR_01
// INTERRUPT ENABLE
#define AT91C_UDP_EPINT0 AT91C_EPT_INT_0
#define AT91C_UDP_EPINT1 AT91C_EPT_INT_1
#define AT91C_UDP_EPINT2 AT91C_EPT_INT_2
#define AT91C_UDP_EPINT3 AT91C_EPT_INT_3
#define AT91C_UDP_RXSUSP AT91C_DET_SUSPEND
#define AT91C_UDP_RXRSM AT91C_END_OF_RESUME
#define AT91C_UDP_EXTRSM AT91C_UPSTREAM_RESUME
#define AT91C_UDP_SOFINT AT91C_IEN_SOF
#define AT91C_UDP_ENDBUSRES AT91C_END_OF_RESET
#define AT91C_UDP_WAKEUP AT91C_WAKE_UP
#define AT91C_UDP_FADDEN AT91C_FADDR_EN
// CONTROL
#define AT91C_UDP_DIR AT91C_EPT_DIR // 3
#define AT91C_UDP_EPTYPE_CTRL AT91C_EPT_TYPE_CTL_EPT // 4
#define AT91C_UDP_EPTYPE_BULK_IN ( AT91C_EPT_TYPE_BUL_EPT | AT91C_EPT_DIR ) // 3+4
#define AT91C_UDP_EPTYPE_BULK_OUT ( AT91C_EPT_TYPE_BUL_EPT ) // 3+4
// Set Status Register
#define AT91C_UDP_FORCESTALL AT91C_FORCE_STALL // 5
#define AT91C_UDP_TXPKTRDY AT91C_TX_BK_RDY // 11
// EPT Enable
#define AT91C_UDP_EPEDS AT91C_EPT_ENABLE // 0
#define AT91C_UDP_ISOERROR AT91C_RX_SETUP_ERROR_FLOW_ISO // 12
#define AT91C_UDP_RXSETUP AT91C_RX_SETUP_ERROR_FLOW_ISO // 12
// OTHERS
#define AT91C_CKGR_DIV AT91C_CKGR_DIVA
#define AT91C_CKGR_PLLCOUNT AT91C_CKGR_PLLACOUNT
#define AT91C_CKGR_MUL AT91C_CKGR_MULA
#define AT91C_PMC_LOCK AT91C_PMC_LOCKA
#define AT91C_PMC_CSS_PLL_CLK AT91C_PMC_CSS_PLLA_CLK
#endif
#ifndef AT91SAM9265
#define DISABLE_ALL_IT 0x00002F0F
#define STATUS_ALL_IT 0x00003F0F
#define CLEAR_ALL_IT 0x00003F00
#else
#define DISABLE_ALL_IT 0xFEFFFFFE
#define STATUS_ALL_IT 0xFEFFFFFE
#define CLEAR_ALL_IT 0x000000FE
#endif
typedef enum
{
USBMS_OK = 0,
USBMS_ERROR =-1
}USBMS_RETURN;
/**********************/
/* CONFIGURABLE ITEMS */
/**********************/
/* buffer definitions */
#define FW_EP0_MAXPACKET_SIZE 8 /* fixed by firmware, USB_FDRx (USB FIFO Data Register */
#define FW_MAIN_EP_MAXPACKET_SIZE 64
/* Size of the output FIFO at least one FLASH block */
#ifndef NANDFLASH
#define FW_TB_NUM 8
#define FW_FIFO_SIZE 8*FW_MAIN_EP_MAXPACKET_SIZE // be carreful with MAX_TRANSFER_SIZE
#define FW_TB_SIZE FW_MAIN_EP_MAXPACKET_SIZE
#define FW_IN_FIFO_EMPTY ((FW_FIFO_SIZE * 20) /100) // 20%
#define FW_IN_FIFO_FULL ((FW_FIFO_SIZE * 80) /100) // 80%
#else
#define FW_TB_NUM 8
#define FW_FIFO_SIZE 256*FW_MAIN_EP_MAXPACKET_SIZE // be carreful with MAX_TRANSFER_SIZE
#define FW_TB_SIZE FW_MAIN_EP_MAXPACKET_SIZE
#define FW_IN_FIFO_EMPTY ((FW_FIFO_SIZE * 20) /100) // 20%
#define FW_IN_FIFO_FULL ((FW_FIFO_SIZE * 80) /100) // 80%
#endif
/* TB status */
#define FW_EBIT 0x40 /* E bit = empty TB = 1 if the TB is free */
#define FW_VBIT 0x80 /* V bit = validate TB = 1 when the TB is filled */
/*****************************************************
FIRMWARE DEFINITIONS
*****************************************************/
#define AT91C_AIC_PRIOR_MIDDLE 4
#define FW_STATE_START 0x01
#define FW_STATE_END 0x00
#define FW_VENDOR_ID 0x03EB
#define FW_PRODUCT_ID 0x6125
#define FW_BCDDEVICE 0x0000
#define FW_MANUFACTURER 0x00
#define FW_PRODUCT 0x00
#define FW_SERIALNUMBER 0x00
#define FW_NUMCONFIGURATION 0x01
typedef enum
{
FW_EP_CTRL = 0x00,
FW_EP_BULK_IN = 0x01,
FW_EP_BULK_OUT = 0x02
}EPx;
typedef struct _config_descriptor
{
USB_CONFIGURATION_DESCRIPTOR cfg;
USB_INTERFACE_DESCRIPTOR ifc1;
USB_ENDPOINT_DESCRIPTOR ep1;
USB_ENDPOINT_DESCRIPTOR ep2;
} FW_FULL_CONFIG_DESCRIPTOR;
/* fw_deviceState bitmap for different device states */
#define FW_DS_CONFIG 0x01 // bit0 device configured
#define FW_DS_TX 0x02 // bit1 TX on EP2
#define FW_DS_SETUP 0x04 // bit2 SETUP packet
#define FW_DS_RX 0x08 // bit3 RX on EP2
#define FW_DS_TB_FULL 0x10 // bit4 TB Pool full
#define FW_DS_INISR 0x20 // bit5 In ISR
#define FW_DS_FIFO_FULL 0x40 // bit6 IN FIFO full
#define FW_DS_COMHANG 0x80 // bit7 Com hang
// bit 4 and 3 are fully link : when the TB pool is full, these two bits are set,
// when the TB isn't full anymore the bit4 is clear and the bit3 is tested in the ISR
/*************************************************************************
MASKS
*************************************************************************/
#define FW_USB_RECIPIENT (UCHAR)0x1F
#define FW_USB_RECIPIENT_DEVICE (UCHAR)0x00
#define FW_USB_RECIPIENT_INTERFACE (UCHAR)0x01
#define FW_USB_RECIPIENT_ENDPOINT (UCHAR)0x02
#define FW_USB_REQUEST_TYPE_MASK (UCHAR)0x60
#define FW_USB_STANDARD_REQUEST (UCHAR)0x00
#define FW_USB_CLASS_REQUEST (UCHAR)0x20
#define FW_USB_REQUEST_MASK (UCHAR)0x0F
#define FW_DEVICE_ADDRESS_MASK 0x7F
/************************************************************
STRUCTURE DEFINITIONS
************************************************************/
/* Table 9-2. Format of Setup Data */
#ifdef ADS_COMPIL
__packed typedef struct
#else
#pragma pack(1)
typedef struct
#endif
{
UCHAR bmRequestType;
UCHAR bRequest;
USHORT wValue;
USHORT wIndex;
USHORT wLength;
} FW_DEVICE_REQUEST;
#ifndef ADS_COMPIL
#pragma pack()
#endif
typedef struct
{
FW_DEVICE_REQUEST DeviceRequest;
USHORT wLength;
USHORT wCount;
UCHAR state;
UCHAR* pData;
} FW_CONTROL_XFER;
typedef struct
{
ULONG dwDTERate;
UCHAR bCharFormat;
UCHAR bParityType;
UCHAR bDataBits;
} FW_LINE_CODING;
/*-------------------------------------------*/
/* USB User Interface Structure Definition */
/*-------------------------------------------*/
#ifndef ADS_COMPIL
#pragma pack(4)
typedef struct
#else
typedef struct
#endif
{
long status;
long length;
long index;
char data[FW_TB_SIZE];
} structTB;
#ifndef ADS_COMPIL
#pragma pack()
#endif
typedef struct
{
ULONG BaseAdr;
ULONG Length;
//InterruptVector : The device's bus-specific interrupt vector (if appropriate for the platform and bus).
ULONG InterruptVector;
ULONG InterruptLevel;
} USB_CONTEXT;
/* global variables */
extern FW_CONTROL_XFER fw_controlData;
extern volatile UCHAR fw_deviceState;
extern structTB *fw_TB[FW_TB_NUM];
extern structTB **fw_writeTB;
extern structTB **fw_readTB;
//extern ULONG fw_IsrCount;
extern volatile unsigned int fw_IsrCount;
extern UCHAR fw_lastTxPacket;
extern int fw_databk; /* for reading alternatively on BULK_OUT */
extern UCHAR fw_AskValidateAddress; /* stock address before to validate it */
// Flags set by ISR: USB_EVENT, USB_RX, USB_TX
extern volatile UCHAR USB_EVENT;
#define USB_EVENT_MASK_SUSPEND (0x01 << 0)
#define USB_EVENT_MASK_RESUME (0x01 << 1)
#define USB_EVENT_MASK_PLUG (0x01 << 2)
#define USB_EVENT_MASK_UNPLUG (0x01 << 3)
#define USB_EVENT_MASK_OUT_STALL_CLEARED (0x01 << 4)
#define USB_EVENT_MASK_IN_STALL_CLEARED (0x01 << 5)
extern ULONG USB_RX;
extern ULONG USB_TX;
#define FW_HOST_TO_DEVICE 0
#define FW_DEVICE_TO_HOST 1
/* bit for register USB_CSR */
/* macro to get the number of bytes receive on the ED */
#define FW_RXBYTESED(x) ((x >> 16) &0x7f)
// States of ms_auto
#define NUMBER_STATE1 7
#define IDLE 0
#define GET_FROM_USB 1
#define SEND_TO_USB 2
#define USB_SEND_NO_FLASH 3
#define RESET_IN_PROGRESS 4
#define PROCESS_CSW 5 // Command Status Wrapper (CSW)
#define INIT 6
// Messages for automate
#define NUMBER_STATE2 6
#define MS_PLUG 0
#define MS_UNPLUG 1
#define MS_STALL_IN 2
#define MS_STALL_OUT 3
#define MS_USB_RX 4
#define MS_USB_TX 5
/************************************************************
FUNCTION HEADERS
************************************************************/
extern void fw_getStatus(void);
extern void fw_clearFeature(void);
extern void fw_setFeature(void);
extern void fw_setAddress(void);
extern void fw_getDescriptor(void);
extern void fw_getConfiguration(void);
extern void fw_setConfiguration(void);
extern void fw_getInterface(void);
extern void fw_setInterface(void);
extern void fw_reserved(void);
extern void fw_stallEp0(void);
extern void fw_suspendChange(void);
extern void fw_singleTransmit(UCHAR * buf, UCHAR len);
extern void fw_codeTransmit(UCHAR * pData, USHORT len);
extern void fw_setAddressEnable(UCHAR bAddress);
extern void fw_setEndpointEnable(UCHAR bEnable);
extern void fw_setDMA(UCHAR bMode);
#ifdef ADS_COMPIL
extern ULONG fw_readInterruptRegister(void);
extern void fw_busReset(void);
extern void fw_isr(void);
#else
extern __ramfunc ULONG fw_readInterruptRegister(void);
extern __ramfunc void fw_busReset(void);
extern __ramfunc void fw_isr(void);
#endif
extern void fw_setEndpointStatus(EPx bEndp, UCHAR bStalled);
extern long fw_readEndpoint(EPx endp, UCHAR * buf);
extern long fw_writeEndpoint(EPx endp, UCHAR * buf, UCHAR len);
extern void fw_activateEP(EPx bEndp);
extern void fw_acknowledgeSetup(EPx bEndp);
extern int fw_IsSetupPacket(EPx bEndp);
extern void fw_ep0RxDone(void);
extern void fw_processCommand(void);
extern void fw_ep0TxDone(void);
extern void fw_mainRxDone(void);
extern void fw_mainTxDone(void);
extern int fw_writeRxData(int length,UCHAR *dataBuffer);
extern void fw_changedir(int dir);
extern void fw_init( void );
#ifdef ADS_COMPIL
extern void fw_resetEP(EPx bEndp);
extern void usb_task( void );
#else
extern __ramfunc void fw_resetEP(EPx bEndp);
extern __ramfunc void usb_task( void );
#endif
extern void fw_ep0RxTxDone(void);
extern void (*ms_auto[NUMBER_STATE1][NUMBER_STATE2])(void);
extern ULONG ms_retreiveTb(char *DataBuffer,ULONG length);
extern USHORT usb_send(char *DataBuffer, USHORT Length);
extern USBMS_RETURN usbms_init( void );
#endif /*FW_USB_H*/
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