mc68hc908ql4.lst

汽车电子上现在最火热的总线之一LIN总线的单片机实现。

ANSI-C/cC++ Compiler for HC08 V-5.0.17, Apr 22 2003

    1:  /*
    2:  ** ###################################################################
    3:  **
    4:  **	MODIFIED FOR APP NOTE ON MC68HC908QL4 - NOT THE OFFICIAL BEAN MODULE
    5:  **     Filename  : MC68HC908QL4.C
    6:  **     Processor : MC68HC908QL4CP
    7:  **     Version   : Driver 00.01
    8:  **     Compiler  : Metrowerks HC08 C Compiler V-5.0.13
    9:  **     Date      :  8 Aug 2003
   10:  **     Author	 : Matt Ruff
   11:  **  Based on QY4 header file (info below)
   12:  **
   13:  **     THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
   14:  **
   15:  **     Filename  : M68HC908QY4.C
   16:  **
   17:  **     Processor : MC68HC908QY4CP
   18:  **
   19:  **     Version   : Driver 01.02
   20:  **
   21:  **     Compiler  : Metrowerks HC08 C Compiler V-5.0.13
   22:  **
   23:  **     Date/Time : 05.08.2002, 06:24
   24:  **
   25:  **     Abstract  :
   26:  **
   27:  **         This implements an IO devices mapping.
   28:  **
   29:  **     Settings  :
   30:  **
   31:  **
   32:  **
   33:  **     Contents  :
   34:  **
   35:  **         No public methods
   36:  **
   37:  **
   38:  **     (c) Copyright UNIS, spol. s r.o. 1997-2002
   39:  **
   40:  **     UNIS, spol. s r.o.
   41:  **     Jundrovska 33
   42:  **     624 00 Brno
   43:  **     Czech Republic
   44:  **
   45:  **     http      : www.processorexpert.com
   46:  **     mail      : [e-mail]
   47:  **
   48:  ** ###################################################################
   49:  */
   50:  /* Based on CPU DB MC68HC908QY4_P_DW, version 2.87.063 */
   51:  //#include <MC68HC908QY4.h>
   52:  
   53:  #include "MC68HC908QL4.h"
   54:  
   55:  volatile ADCLKSTR _ADCLK;        /* ADC Input Clock Register -MBR */
   56:  volatile ADRHSTR _ADRH;          /* ADC Data Register High   -MBR */
   57:  volatile ADRLSTR _ADRL;          /* ADC Data Register Low    -MBR */
   58:  volatile ADSCRSTR _ADSCR;      /* ADC Status and Control Register */
   59:  volatile BFCRSTR _BFCR;        /* SIM Break Flag Control Register */
   60:  volatile BRKARSTR _BRKAR;      /* Break Auxiliary Register */
   61:  volatile BRKHSTR _BRKH;        /* Break Address Register High */
   62:  volatile BRKLSTR _BRKL;        /* Break Address Register Low */
   63:  volatile BRKSCRSTR _BRKSCR;    /* Break Status and Control Register */
   64:  volatile CONFIG1STR _CONFIG1;  /* Configuration Register 1 */
   65:  volatile CONFIG2STR _CONFIG2;  /* Configuration Register 2 */
   66:  volatile COPCTLSTR _COPCTL;    /* COP Control Register */
   67:  volatile DDRASTR _DDRA;        /* Data Direction Register A */
   68:  volatile DDRBSTR _DDRB;        /* Data Direction Register B */
   69:  volatile FLBPRSTR _FLBPR;      /* FLASH Block Protect Register */
   70:  volatile FLCRSTR _FLCR;        /* FLASH Control Register */
   71:  volatile INT1STR _INT1;        /* Interrupt Statuts Register 1 */
   72:  volatile INT2STR _INT2;        /* Interrupt Statuts Register 2 */
   73:  volatile INT3STR _INT3;        /* Interrupt Statuts Register 3 */
   74:  volatile INTSCRSTR _INTSCR;    /* IRQ Status and Control Register */
   75:  volatile KBIERSTR _KBIER;      /* Keyboard Interrrupt Enable Register KBIER */
   76:  volatile KBSCRSTR _KBSCR;      /* Keyboard Status and Control Register */
   77:  volatile LVISRSTR _LVISR;      /* LVI Status Register */
   78:  volatile OptionalSTR _Optional; /* Internal Oscillator Trim */
   79:  volatile OSCSTATSTR _OSCSTAT;  /* Oscillator Status Register */
   80:  volatile OSCTRIMSTR _OSCTRIM;  /* Oscillator Trim Register */
   81:  volatile PTASTR _PTA;          /* Port A Data Register */
   82:  volatile PTAPUESTR _PTAPUE;    /* Input Pull-Up Enable Register PTAPUE */
   83:  volatile PTBSTR _PTB;          /* Port B Data Register */
   84:  volatile PTBPUESTR _PTBPUE;    /* Input Pull-Up Enable Register PTBPUE */
   85:  volatile BSRSTR _BSR;            /* Break Status Register     -MBR */
   86:  volatile SLCC1STR _SLCC1;
   87:  volatile SLCC2STR _SLCC2;
   88:  volatile SLCSSTR _SLCS;
   89:  volatile SLCPSTR _SLCP;
   90:  volatile SLCBTHSTR _SLCBTH;
   91:  volatile SLCBTLSTR _SLCBTL;
   92:  volatile SLCSVSTR _SLCSV;
   93:  volatile SLCDLCSTR _SLCDLC;
   94:  volatile SLCDSTR _SLCID;
   95:  volatile SLCDSTR _SLCD7;
   96:  volatile SLCDSTR _SLCD6;
   97:  volatile SLCDSTR _SLCD5;
   98:  volatile SLCDSTR _SLCD4;
   99:  volatile SLCDSTR _SLCD3;
  100:  volatile SLCDSTR _SLCD2;
  101:  volatile SLCDSTR _SLCD1;
  102:  volatile SLCDSTR _SLCD0;
  103:  volatile SRSRSTR _SRSR;        /* SIM Reset Status Register */
  104:  volatile TCNTHSTR _TCNTH;      /* TIM Counter Register Low */
  105:  volatile TCNTLSTR _TCNTL;      /* TIM Counter Register Low */
  106:  volatile TCH0HSTR _TCH0H;      /* TIM Channel 0 Register High */
  107:  volatile TCH0LSTR _TCH0L;      /* TIM Channel 0 Register Low */
  108:  volatile TCH1HSTR _TCH1H;      /* TIM Channel 1 Register High */
  109:  volatile TCH1LSTR _TCH1L;      /* TIM Channel 1 Register Low */
  110:  volatile TMODHSTR _TMODH;      /* TIM Counter Modulo Register High */
  111:  volatile TMODLSTR _TMODL;      /* TIM Counter Modulo Register Low */
  112:  volatile TSCSTR _TSC;          /* TIM Status and Control Register TSC */
  113:  volatile TSC0STR _TSC0;        /* TIM Channel 0 Status and Control Register */
  114:  volatile TSC1STR _TSC1;        /* TIM Channel 1 Status and Control Register */
  115:  volatile BRKSTR _BRK;          /* Break Address Register */
  116:  volatile TCNTSTR _TCNT;        /* TIM Counter Register */
  117:  volatile TCH0STR _TCH0;        /* TIM Channel 0 Register */
  118:  volatile TCH1STR _TCH1;        /* TIM Channel 1 Register */
  119:  volatile TMODSTR _TMOD;        /* TIM Counter Modulo Register */
  120:  /*
  121:  ** ###################################################################
  122:  **
  123:  **     This file was created by UNIS Processor Expert 02.90 for 
  124:  **     the Motorola HC08 series of microcontrollers.
  125:  **
  126:  ** ###################################################################
  127:  */
  128: