config.h

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/*****************************************
 Copyright (c) 2001-2002  
 Sigma Designs, Inc. All Rights Reserved
 Proprietary and Confidential
 *****************************************/

#ifndef __JASPERBOOT_CONFIG_H
#define __JASPERBOOT_CONFIG_H

#include "version.h"

// Configuration file for the bootloader

#define SYSTEM_MEMORY_SIZE		64

/*
// CPU CLOCK = 135MHZ
#define PLLREG_MULT			48
#define PLLREG_DIV			3
#if (SYSTEM_MEMORY_SIZE == 64)
#define MAC_REFRESH			0x4070
#else
#define MAC_REFRESH			0x6070
#endif
#define PLLREG_VALUE		((PLLREG_DIV<<8)+(PLLREG_MULT<<2)+2)
#define CPU_CLK_SPEED		((27000000*(PLLREG_MULT+2))/((PLLREG_DIV+2)*2))
*/
/*
// CPU CLOCK = 162MHZ
#define PLLREG_MULT			58
#define PLLREG_DIV			3
#if (SYSTEM_MEMORY_SIZE == 64)
#define MAC_REFRESH			0x4070
#else
#define MAC_REFRESH			0x6070
#endif
#define PLLREG_VALUE		((PLLREG_DIV<<8)+(PLLREG_MULT<<2)+2)
#define CPU_CLK_SPEED		((27000000*(PLLREG_MULT+2))/((PLLREG_DIV+2)*2))
*/
/*
// CPU CLOCK = 198MHZ
#define PLLREG_MULT			20
#define PLLREG_DIV			1
#if (SYSTEM_MEMORY_SIZE == 64)
#define MAC_REFRESH			0x40b0
#else
#define MAC_REFRESH			0x60b0
#endif
#define PLLREG_VALUE		((PLLREG_DIV<<8)+(PLLREG_MULT<<2))
#define CPU_CLK_SPEED		((27000000*(PLLREG_MULT+2))/((PLLREG_DIV+2)))
*/

// CPU CLOCK = 216MHZ
#define PLLREG_MULT			22
#define PLLREG_DIV			1
#if (SYSTEM_MEMORY_SIZE == 64)
#define MAC_REFRESH			0x40d0
#else
#define MAC_REFRESH			0x60d0
#endif
#define PLLREG_VALUE		((PLLREG_DIV<<8)+(PLLREG_MULT<<2))
#define CPU_CLK_SPEED		((27000000*(PLLREG_MULT+2))/((PLLREG_DIV+2)))

// Map of Flash
#define BOOT_START_ADDRESS		0x00000000
#define BOOT_END_ADDRESS		0x00006000
#define ROMFS_START_ADDRESS		0x00006000
#define ROM_END_ADDRESS			0x00400000

// Addresses of stage1 bootloader (aka main.bin) image:
// Address of stage1 in FLASH
#define STAGE1_IMAGE_START		0x0200
#define STAGE1_IMAGE_END		0xffff

// Start address of the SDRAM
#define SDRAM_BASE_ADDRESS              0x04000000

#if (SYSTEM_MEMORY_SIZE == 64)
#define MAC_CONFIG			0x1300349D	//64MB setting
#elif (SYSTEM_MEMORY_SIZE == 32)
#define MAC_CONFIG			0x1300249D	//32MB setting
#elif (SYSTEM_MEMORY_SIZE == 16)
#define MAC_CONFIG			0x1300248D	//16MB setting
#elif (SYSTEM_MEMORY_SIZE == 8)
#define MAC_CONFIG			0x1300148D	//8MB setting
#endif

// Address odf stage1 in SDRAM
#define STAGE1_LOAD_ADDRESS  (SDRAM_BASE_ADDRESS + 0x00300000)
#define STAGE1_START_ADDRESS (SDRAM_BASE_ADDRESS + 0x00300000)

// Address where to laod the kernel
#define KERNEL_LOAD_ADDRESS  (SDRAM_BASE_ADDRESS + 0x00008000)
// Address odf stage1 in SDRAM
// #define STAGE1_LOAD_ADDRESS		0x01300000
// #define STAGE1_START_ADDRESS	0x01300000
//
// Address where to laod the kernel
// #define KERNEL_LOAD_ADDRESS		0x01008000

//Size of the boot loader stack
#define STACK_SIZE				0x80000

#define KERNEL_FILENAME			"linux.bin"
#define GZ_KERNEL_FILENAME		"linux.bin.gz"

//
// (Un)Comment (un)wanted option here
//
// Enable booting from a gz kernel in flash
#define SUPPORT_GZ_KERNEL_IN_ROMFS
// Enable uart debug output during boot
#define ENABLE_UART
// Comment to disable any cache in bootloader
#define ENABLE_CACHE
// Comment to disable data cache only
#define ENABLE_CACHE_DATA
// Comment to not use writeback mode
#define ENABLE_CACHE_DATA_WRITEBACK

#endif