filtref.csf

Altare公司训练新人的练习题下载.rar FPGA/CPLD

DEFAULT_DEVICE_OPTIONS
{
	RESERVE_PIN = "AS INPUT TRI-STATED";
	RESERVE_ALL_UNUSED_PINS = "AS OUTPUT DRIVING GROUND";
	HEXOUT_FILE_COUNT_DIRECTION = UP;
	HEXOUT_FILE_START_ADDRESS = 0;
	GENERATE_HEX_FILE = OFF;
	GENERATE_RBF_FILE = OFF;
	GENERATE_TTF_FILE = OFF;
	RESERVE_DATA7_THROUGH_DATA1_AFTER_CONFIGURATION = OFF;
	RESERVE_RDYNBUSY_AFTER_CONFIGURATION = OFF;
	RESERVE_NWS_NRS_NCS_CS_AFTER_CONFIGURATION = OFF;
	DISABLE_CONF_DONE_AND_NSTATUS_PULLUPS_ON_CONFIG_DEVICE = OFF;
	AUTO_INCREMENT_CONFIG_DEVICE_JTAG_USER_CODE = ON;
	EPROM_USE_CHECKSUM_AS_USERCODE = OFF;
	FLEX10K_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF;
	MERCURY_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF;
	APEX20K_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF;
	FLEX10K_CONFIGURATION_DEVICE = EPC2LC20;
	FLEX6K_CONFIGURATION_DEVICE = EPC1PC8;
	MERCURY_CONFIGURATION_DEVICE = EPC2LC20;
	EXCALIBUR_CONFIGURATION_DEVICE = EPC2LC20;
	APEX20K_CONFIGURATION_DEVICE = EPC2LC20;
	USE_CONFIGURATION_DEVICE = ON;
	ENABLE_INIT_DONE_OUTPUT = OFF;
	FLEX10K_ENABLE_LOCK_OUTPUT = OFF;
	ENABLE_DEVICE_WIDE_OE = OFF;
	ENABLE_DEVICE_WIDE_RESET = OFF;
	RELEASE_CLEARS_BEFORE_TRI_STATES = OFF;
	AUTO_RESTART_CONFIGURATION = OFF;
	USER_START_UP_CLOCK = OFF;
	APEX_II_CONFIGURATION_SCHEME = "PASSIVE SERIAL";
	FLEX10K_CONFIGURATION_SCHEME = "PASSIVE SERIAL";
	FLEX6K_CONFIGURATION_SCHEME = "PASSIVE SERIAL";
	MERCURY_CONFIGURATION_SCHEME = "PASSIVE SERIAL";
	EXCALIBUR_CONFIGURATION_SCHEME = "PASSIVE SERIAL";
	APEX20K_CONFIGURATION_SCHEME = "PASSIVE SERIAL";
	USE_CHECKSUM_AS_USERCODE = OFF;
	MAX7000_JTAG_USER_CODE = FFFFFFFF;
	FLEX10K_JTAG_USER_CODE = 7F;
	MERCURY_JTAG_USER_CODE = FFFE7FFF;
	APEX20K_JTAG_USER_CODE = FFFFFFFF;
	RESERVE_NCEO_AFTER_CONFIGURATION = OFF;
	FLEX10K_ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE = ON;
	FLEX6K_ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE = OFF;
	ENABLE_JTAG_BST_SUPPORT = OFF;
}
CHIP(filtref)
{
	DEVICE = AUTO;
}
COMPILER_SETTINGS
{
	RUN_TIMING_ANALYSES = ON;
	MERGE_HEX_FILE = OFF;
	FOCUS_ENTITY_NAME = |filtref;
	FAMILY = APEX20KE;
	EXC_FLP_LAYOUT_RAM_INPUT = NOT_SWAPPED;
	EXC_FLP_LAYOUT_RAM_OUTPUT = BOTH_LEFT;
	EXC_FLP_LAYOUT_MASTER_SLAVE = MASTER_ON_RIGHT;
	OPTIMIZE_IOC_REGISTER_PLACEMENT_FOR_TIMING = ON;
	OPTIMIZE_TIMING = NORMAL_COMPILATION;
	COMPILATION_LEVEL = FULL;
	SAVE_DISK_SPACE = ON;
	SPEED_DISK_USAGE_TRADEOFF = NORMAL;
	LOGICLOCK_INCREMENTAL_COMPILE_ASSIGNMENT = OFF;
}