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📄 ad6650.h

📁 这是单板上DPRAM的驱动程序
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#ifndef _AD6650_H
#define _AD6650_H

#define SDB_AD6650    	240000
#define AD6650_ADR_ERR 	0x10000000
#define REGDATAERR 		0x10000001
#define REGDATAOK 		0x10000002

/* AD6650 Control Code */
#define SDC_REINIT_6650                 (SDB_AD6650+0)
#define SDC_GET_REG_6650                 (SDB_AD6650+1)
#define SDC_SET_PLL					(SDB_AD6650+2)
#define SDC_SET_CIC4_SCA			(SDB_AD6650+3)
#define SDC_SET_CLAMP				(SDB_AD6650+4)
#define SDC_SET_DC_CORRECTION_BW	(SDB_AD6650+5)
#define SDC_SET_RCF_SCA				(SDB_AD6650+6)
#define SDC_SET_RCF_PHASE			(SDB_AD6650+7)
#define SDC6650_INIT_STATUS				(SDB_AD6650+8)
#define SDC_SET_SERIAL				(SDB_AD6650+9)
#define SDC_SET_AGC					(SDB_AD6650+10)
/* AD6650 INTERNAL REGISTER */
#define AD6650_CDC               (unsigned short)0x00
#define AD6650_PLLR0             (unsigned short)0x01
#define AD6650_PLLR1             (unsigned short)0x02
#define AD6650_PLLR2       		 (unsigned short)0x03
#define AD6650_PLLR3       		 (unsigned short)0x04
#define AD6650_Clamp_CTRL        (unsigned short)0x05
#define AD6650_AUX_DACA          (unsigned short)0x06
#define AD6650_AUX_DACB          (unsigned short)0x07
#define AD6650_AUX_CTRL          (unsigned short)0x08
#define AD6650_ADC_DITHER_CTRL   (unsigned short)0x09
#define AD6650_DC_CORRECT_BW     (unsigned short)0x0a 
#define AD6650_DC_CORRECT_CTRL   (unsigned short)0x0b
#define AD6650_AGC_CTRL0         (unsigned short)0x0c
#define AD6650_AGC_CTRL1         (unsigned short)0x0d
#define AD6650_AGC_CTRL2         (unsigned short)0x0e
#define AD6650_AGC_CTRL3         (unsigned short)0x0f
#define AD6650_AGC_CTRL4         (unsigned short)0x10
#define AD6650_AGC_CTRL5         (unsigned short)0x11
#define AD6650_AGC_CTRL6         (unsigned short)0x12
#define AD6650_AGC_CTRL7         (unsigned short)0x13
#define AD6650_START_CNT         (unsigned short)0x14
#define AD6650_CIC4_DEC          (unsigned short)0x15
#define AD6650_CIC4_SCALE        (unsigned short)0x16
#define AD6650_REV1              (unsigned short)0x17
#define AD6650_RCF_DEC           (unsigned short)0x18
#define AD6650_RCF_DEC_PH        (unsigned short)0x19
#define AD6650_RCF_CO_OFFSET     (unsigned short)0x1A
#define AD6650_RCF_TAPS          (unsigned short)0x1B
#define AD6650_RCF_SCALE         (unsigned short)0x1C
#define AD6650_REV2              (unsigned short)0x1D
#define AD6650_REV3              (unsigned short)0x1E
#define AD6650_REV4              (unsigned short)0x1F
#define AD6650_REV5              (unsigned short)0x20
#define AD6650_SER_CTL           (unsigned short)0x21
#define AD6650_ACCR              (unsigned short)0x22
#define AD6650_CO_MEM            (unsigned short)0x40

/* AD6650 EXTERNAL REGISTER */
#define AD6650_DATA0             (unsigned char)0x000   /* D7-D0   */
#define AD6650_DATA1             (unsigned char)0x001   /* D15-D8  */
#define AD6650_DATA2             (unsigned char)0x002   /* D21-D16 */
#define AD6650_SF0               (unsigned char)0x003   /* Special Function Register 0 */
#define AD6650_SF1               (unsigned char)0x004   /* Special Function Register 1 */
#define AD6650_SF2               (unsigned char)0x005   /* Special Function Register 2 */
#define AD6650_CAR               (unsigned char)0x006   /* Channel Address Register */ 
#define AD6650_ACR               (unsigned char)0x007   /* Access Control Register */

typedef struct{
	unsigned char ClkDiv;		/*clock divider control*/
    ULONG PLLReg0;             /* PLL Register0 */
    ULONG PLLReg1;             /* PLL Register1 */
    ULONG PLLReg2;             /* PLL Register2 */
    ULONG PLLReg3;             /* PLL Register3 */
    unsigned char ClampCtl;   /*               */
    unsigned char Aux_DACA;   /*  */
    unsigned char Aux_DACB;    /*  */
    unsigned char Aux_DACCtl;   /* 0:Enable DAC A;3-1:FS Current Adjust A;4:Enalbe DAC B;7-5:FS Current Adjust B */
    unsigned char ADC_DitherCtl;   /* 0:Enable Dither; 1:High Dither Power */
    unsigned short DC_CorrectionBW;   /* 15-0:Correction BW-1 */
    unsigned long  DC_CorrectionCtl;    /* 0:Enable;1:PN_EN;2-5:Scalar */
    unsigned char AGC_Ctl0;    /* 1:FA_Enable;2:FD_Enable;3:Force VGA Gain */
    unsigned short AGC_Ctl1;    /* 0-8:VGA Gain */
    unsigned short AGC_Ctl2;    /* 0-7:Requested Level;8-15:Hysterisis */
    unsigned short AGC_Ctl3;      /* 0-7:Loop Gain-Mant;8-10:Loop Gain-Exp*/
    unsigned short AGC_Ctl4;      /* 0-3:FA_Step;4-7:FA_Count;8-9:FA_Thresh;10-12:FD_Step */
    unsigned short AGC_Ctl5;   /* 0-7:S Peak Detect Period;8-15:Spb pEAK dETECT Period */   
    unsigned char AGC_Ctl6;         /* 0-6:FD_S Threshold*/
    unsigned short AGC_Ctl7;   /* 0-8:FD_SpB Threshold */
    unsigned short Start_HoldOff_Cnt;   
    unsigned char CIC4_Decimation;   /*Mcic4-1*/
    unsigned char CIC4_Scale;   /* CIC4_scale-12 */ 
    unsigned char Reserved0;
    unsigned char RCF_Decimation;   /* Mrcf-1*/   
    unsigned char RCF_Decimation_Ph;   /* Prcf*/
    unsigned char RCF_Coeff_Offset;   /* COrcf*/  
    unsigned char RCF_Taps;   /* Ntaps-1*/  
    unsigned char RCF_Scale;   /* 00:-18dB;01:-12dB;10:-6dB;11:0dB*/ 
    ULONG Reserved[4];            
    unsigned short Serial_ctl; /*0-2:SDIV[2:0];3:Reserved ,must be set High;4:SOWL,0:16-bit words,1:24-bit words;5-6:I_SDFS Contrl*/
    unsigned char  ACCR;
    }AD6650RegValue;

typedef struct{
    unsigned char MemAdd;      /* Data Memory Address */
    ULONG MemDat;             /* Data Value */
    }AD6650MemValue;

typedef struct{
    AD6650RegValue RegValue;
    long Coefficient[48];
    }AD6650CfgStruct;

char *AD6650BspInit(int DEV, char *FreeMemPtr, AD6650CfgStruct *pCfg);

#endif /* _AD6650_H */

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