peb2254.c

这是单板上DPRAM的驱动程序

#include <psos.h>
#include "board.h"
#include "bspcomm.h"
#include "bspspec.h"

/************************************/
/* PEB2254 控制寄存器地址           */
/************************************/
#define E1_XFIFOH   0x00
#define E1_XFIFOL   0x01
#define E1_MODE     0x03 
#define E1_IPC      0x08 
#define E1_CCR1     0x09 
#define E1_IMR0     0x14 
#define E1_IMR1     0x15 
#define E1_IMR2     0x16 
#define E1_IMR3     0x17 
#define E1_IMR4     0x18 
#define E1_FMR0     0x1A 
#define E1_FMR1     0x1B 
#define E1_FMR2     0x1C 
#define E1_LOOP     0x1D
#define E1_XSW      0x1E 
#define E1_XSP      0x1F 
#define E1_XC0      0x20 
#define E1_XC1      0x21 
#define E1_RC0      0x22 
#define E1_RC1      0x23 
#define E1_XPM0     0x24 
#define E1_XPM1     0x25 
#define E1_XPM2     0x26 
#define E1_TSWM     0x27 
#define E1_IDLE     0x29 
#define E1_ICB1     0x30 
#define E1_ICB2     0x31 
#define E1_ICB3     0x32 
#define E1_ICB4     0x33 
#define E1_LIM0     0x34 
#define E1_LIM1     0x35
#define E1_PCD      0x36 
#define E1_PCR      0x37 
#define E1_DEC      0x60 

/**********************************/
/* PEB2254 状态寄存器地址         */
/**********************************/
#define E1_RFIFOH     0x00
#define E1_RFIFOL     0x01
#define E1_FRS0       0x4C
#define E1_FRS1       0x4D
#define E1_RSW        0x4E
#define E1_RSP        0x4F
#define E1_FECL       0x50
#define E1_FECH       0x51
#define E1_CVCL       0x52
#define E1_CVCH       0x53
#define E1_CEC1L      0x54
#define E1_CEC1H      0x55
#define E1_EBCL       0x56
#define E1_EBCH       0x57
#define E1_CEC2L      0x58
#define E1_CEC2H      0x59
#define E1_CEC3L      0x5A
#define E1_CEC3H      0x5B
#define E1_RSA4       0x5C
#define E1_RSA5       0x5D
#define E1_RSA6       0x5E
#define E1_RSA7       0x5F
#define E1_RSA8       0x60
#define E1_SIS        0x64
#define E1_RSIS       0x65
#define E1_RBCL       0x66
#define E1_RBCH       0x67
#define E1_ISR0       0x68
#define E1_ISR1       0x69
#define E1_ISR2       0x6A
#define E1_ISR3       0x6B
#define E1_GIS        0x6E


#define TIMEPERIOD    50
#define SLPVALVE      0x5
#define SLNVALVE      0x5

#define E1WriteChar(BaseAddr,RegName,Data) \
    *((unsigned char *)(BaseAddr+RegName))=(unsigned char)Data
#define E1ReadChar(BaseAddr,RegName) \
    *((unsigned char *)(BaseAddr+RegName)) 

static void PEB2254Init(void *pDataBuf, PEB2254CfgStruct *cfg)
{
    PEB2254CfgStruct *pCfg = (PEB2254CfgStruct*)(pDataBuf);
/*-------------------------<< Initial data >>-------------------------------*/
    memmove(pCfg,cfg,sizeof(PEB2254CfgStruct));

    pCfg->Timer=0;
    pCfg->SlpCount=0;
    pCfg->SlnCount=0;
    pCfg->E1Los=FALSE;
    pCfg->E1Lfa=FALSE;
    (pCfg->TokenWin).LattestToken=0x0;
    (pCfg->TokenWin).LastToken=0x0;    
    (pCfg->TokenWin).CurToken=0x0;
    
    /* PCM30, send double frame,2Mbps,should set DEC register to read counter */
    E1WriteChar(pCfg->BaseAddr,E1_FMR1,0x02);    
    /* CLKX pin output 4M,active high,RCLK pin output in synchronization state*/
    E1WriteChar(pCfg->BaseAddr,E1_LIM0,0x34);    
    /* RL1/2 differ between 1.04v,ternary code,transmit slicer active */
    E1WriteChar(pCfg->BaseAddr,E1_LIM1,0x10);    
    if(pCfg->Coax_Or_Twist==Coax_Cable)
       E1WriteChar(pCfg->BaseAddr,E1_XPM0,0x9C);
    else
       E1WriteChar(pCfg->BaseAddr,E1_XPM0,0xBD); /* 9cH for 75,bdh for 120 */
    E1WriteChar(pCfg->BaseAddr,E1_XPM1,0x03);    /* for both 75 and 120 */
    E1WriteChar(pCfg->BaseAddr,E1_XPM2,0x00);    /* for both 75 and 120 */
    /* receive code or send code is AMI,AIS according to G.732 */
    E1WriteChar(pCfg->BaseAddr,E1_FMR0,0xf4);    
    /* the interupt can be visible,Int pin active low */
    E1WriteChar(pCfg->BaseAddr,E1_IPC,0x80);    
    /* CAS synchronise according to G.732,RTR/TTR disable */
    E1WriteChar(pCfg->BaseAddr,E1_CCR1,0x00);    
    E1WriteChar(pCfg->BaseAddr,E1_IMR0,0xff);    /* mask all interrupts */
    E1WriteChar(pCfg->BaseAddr,E1_IMR1,0xff);    
    E1WriteChar(pCfg->BaseAddr,E1_IMR2,0xff);
    E1WriteChar(pCfg->BaseAddr,E1_IMR3,0xff);
    /*recv 2 frame, recv from statis buf,AIS auto send to RDO,A-bit auto send */
    E1WriteChar(pCfg->BaseAddr,E1_FMR2,0x02);    
    E1WriteChar(pCfg->BaseAddr,E1_LOOP,0x00);    /* not in test */
    E1WriteChar(pCfg->BaseAddr,E1_MODE,0xe0);    /* not HDLC frame,recv stop*/
    E1WriteChar(pCfg->BaseAddr,E1_XSW,0x9f);     /* service word is fixed val*/
    E1WriteChar(pCfg->BaseAddr,E1_XSP,0x07);     /* CAS inactive */
    E1WriteChar(pCfg->BaseAddr,E1_XC0,0x01);     /* the offset value */
    E1WriteChar(pCfg->BaseAddr,E1_XC1,0x3e);     /* the offset value */
    E1WriteChar(pCfg->BaseAddr,E1_RC0,0x05);
    /* 3 consecutive FAS or service word lost will lead to asynchronization */
    E1WriteChar(pCfg->BaseAddr,E1_RC1,0x80);     
    E1WriteChar(pCfg->BaseAddr,E1_PCD,0xff);    /* LOS set period is 2ms */
    E1WriteChar(pCfg->BaseAddr,E1_PCR,0xff);    /* LOS reset period is 2ms */
    E1WriteChar(pCfg->BaseAddr,E1_DEC,0x00);    /* not read any counter */
    E1WriteChar(pCfg->BaseAddr,E1_MODE,0xe0);   /* not HDLC frame,recv stop */ 
    /* FAS and service word been generated by FALC54 */
    E1WriteChar(pCfg->BaseAddr,E1_TSWM,0x00);   
    E1WriteChar(pCfg->BaseAddr,E1_IDLE,0x54);   /* IDLE set 0x54 */
    E1WriteChar(pCfg->BaseAddr,E1_ICB1,0x00);
    E1WriteChar(pCfg->BaseAddr,E1_ICB2,0x00);
    E1WriteChar(pCfg->BaseAddr,E1_ICB3,0x00);
    E1WriteChar(pCfg->BaseAddr,E1_ICB4,0x00);   /* no IDLE has been selected */
}

static int PEB2254Cntrl(void *pDataBuf, int cmd, void *pParam, int maxlen)
{
    unsigned char RegValue;
    struct TE1ChipStatus *pE1Alarm;
    
    PEB2254CfgStruct* pCfg =(PEB2254CfgStruct *)(pDataBuf);   
    switch(cmd)
    {
        case SDC_REINIT:
            PEB2254Init(pDataBuf, pCfg);
            break;
            
        case SDC_SET_LOOPBACK_MODE:
            RegValue=E1ReadChar(pCfg->BaseAddr,E1_LIM0);
            RegValue|=0x02;
            E1WriteChar(pCfg->BaseAddr,E1_LIM0,RegValue);
            RegValue=E1ReadChar(pCfg->BaseAddr,E1_FMR1);
            RegValue|=0x01;
            E1WriteChar(pCfg->BaseAddr,E1_FMR1,RegValue);
            break;

        case SDC_SET_NORMAL_MODE:
            RegValue=E1ReadChar(pCfg->BaseAddr,E1_LIM0);
            RegValue&=0xFD;
            E1WriteChar(pCfg->BaseAddr,E1_LIM0,RegValue);
            RegValue=E1ReadChar(pCfg->BaseAddr,E1_FMR1);
            RegValue&=0xFE;
            E1WriteChar(pCfg->BaseAddr,E1_FMR1,RegValue);
            break;    
   
         case SDC_READ_TOKEN:
            if(maxlen!=sizeof(unsigned char))
                return SDE_INVALID_ARG; 
            RegValue=E1ReadChar(pCfg->BaseAddr,E1_RSW);
            RegValue&=0x1f;
            (pCfg->TokenWin).LattestToken=(pCfg->TokenWin).LastToken;
            (pCfg->TokenWin).LastToken=(pCfg->TokenWin).CurToken;    
            (pCfg->TokenWin).CurToken=RegValue;
            if(  (pCfg->TokenWin).CurToken==(pCfg->TokenWin).LastToken
               ||(pCfg->TokenWin).CurToken==(pCfg->TokenWin).LattestToken)
               RegValue=(pCfg->TokenWin).CurToken;
            else if((pCfg->TokenWin).LastToken==(pCfg->TokenWin).LattestToken)
               RegValue=(pCfg->TokenWin).LastToken;
            else
               RegValue=(pCfg->TokenWin).CurToken;
            *(unsigned char*)pParam=RegValue;
            break;    

         case SDC_WRITE_TOKEN:
            if(maxlen!=sizeof(unsigned char))
                return SDE_INVALID_ARG;
            RegValue=E1ReadChar(pCfg->BaseAddr,E1_XSW);
            RegValue&=0xe0;
            RegValue|=*(unsigned char*)pParam;
            E1WriteChar(pCfg->BaseAddr,E1_XSW,RegValue); 
            break;    

         case SDC_GET_ALARMS:
            if(maxlen!=sizeof(struct TE1ChipStatus)) 
                return SDE_INVALID_ARG;   
            pE1Alarm=(struct TE1ChipStatus*)pParam; 
            RegValue=E1ReadChar(pCfg->BaseAddr,E1_FRS0);
            pE1Alarm->bE1Los=(BOOL)((RegValue&0x80)>>7);
            pE1Alarm->bE1Lfa=(BOOL)((RegValue&0x20)>>5);
            RegValue=E1ReadChar(pCfg->BaseAddr,E1_ISR3);
            if((BOOL)(RegValue&0x01)==TRUE)pCfg->SlpCount++;
            if((BOOL)((RegValue&0x02)>>1)==TRUE)pCfg->SlnCount++;
            pCfg->Timer++;
            pE1Alarm->bE1Slp=FALSE;
            pE1Alarm->bE1Sln=FALSE;
            if(pCfg->Timer>=TIMEPERIOD)
            {
               pE1Alarm->bE1Slp=pCfg->SlpCount>=SLPVALVE ? TRUE:FALSE;
               pE1Alarm->bE1Sln=pCfg->SlnCount>=SLNVALVE ? TRUE:FALSE;            
               pCfg->SlpCount=0;
               pCfg->SlnCount=0;
               pCfg->Timer=0;
           }
           break;    
   
        default: 
           return SDE_UNKNOW_CMD;
    }/* end of switch(cmd) */
    return SDE_OK;
}


char *PEB2254BspInit(int DEV, char *FreeMemPtr, PEB2254CfgStruct *cfg)
{
    InstallSD(DEV,NULL,NULL, PEB2254Cntrl, FreeMemPtr);
    PEB2254Init(FreeMemPtr, cfg);  
    FreeMemPtr += sizeof(PEB2254CfgStruct);
    memcpy(FreeMemPtr,"*2254Dat",8);
    FreeMemPtr += 8;
    return FreeMemPtr;
}