ds21354.h

这是单板上DPRAM的驱动程序

#ifndef _CMM_21354_H
#define _CMM_21354_H

#define SDB_DS21x54  340000
#ifndef UCHAR
#define UCHAR unsigned char
#endif

#define SDC_DS21x54_REMOTE_LOOPBACK        (SDB_DS21x54+0)
#define SDC_DS21x54_REMOTE_UNLOOPBACK      (SDB_DS21x54+1)
#define SDC_DS21x54_LOCAL_LOOPBACK         (SDB_DS21x54+2)
#define SDC_DS21x54_LOCAL_UNLOOPBACK       (SDB_DS21x54+3)
#define SDC_DS21x54_POWERUP                (SDB_DS21x54+4)
#define SDC_DS21x54_FRAMER_LOOPBACK        (SDB_DS21x54+5)
#define SDC_DS21x54_FRAMER_UNLOOPBACK      (SDB_DS21x54+6)
#define SDC_DS21x54_SETSDH                 (SDB_DS21x54+7)
#define SDC_DS21x54_UNSETSDH               (SDB_DS21x54+8)
#define SDC_DS21x54_GET_ID                 (SDB_DS21x54+9)
#define SDC_DS21x54_GET_CODE_VILATION_COUNT (SDB_DS21x54+10)
#define SDC_DS21x54_GET_CRC_COUNT          (SDB_DS21x54+11)
#define SDC_DS21x54_GET_ERR_COUNT          (SDB_DS21x54+12)
#define SDC_DS21x54_GETWARNING             (SDB_DS21x54+13)

/*--------SR1-----------------*/
#define SDE_DS21x54_RSA1     0X80
#define SDE_DS21x54_RDMA     0X40
#define SDE_DS21x54_RSA0     0X20
#define SDE_DS21x54_RSLIP    0x10
#define SDE_DS21x54_RUA1     0X8
#define SDE_DS21x54_RRA      0x4
#define SDE_DS21x54_RCL      0x2
#define SDE_DS21x54_RLOS     0x1
/*--------SR1-----------------*/

/*--------SR2-----------------*/
#define SDE_DS21x54_RMF      0X80
#define SDE_DS21x54_RAF      0X40
#define SDE_DS21x54_TMF      0X20
#define SDE_DS21x54_SEC      0x10
#define SDE_DS21x54_TAF      0X8
#define SDE_DS21x54_LOTC     0x4
#define SDE_DS21x54_RCMF     0x2
#define SDE_DS21x54_TSLIP    0x1
/*--------SR2-----------------*/

/*--------RIR-----------------*/
#define SDE_DS21x54_TESF     0X80
#define SDE_DS21x54_TESE     0X40
#define SDE_DS21x54_JALT     0X20
#define SDE_DS21x54_RESF     0x10
#define SDE_DS21x54_RESE     0X8
#define SDE_DS21x54_CRCRC    0x4
#define SDE_DS21x54_FASRC    0x2
#define SDE_DS21x54_CASRC    0x1
/*--------RIR-----------------*/

/*--------SSR-----------------*/
#define SDE_DS21x54_CSC5     0X80
#define SDE_DS21x54_CSC4     0X40
#define SDE_DS21x54_CSC3     0X20
#define SDE_DS21x54_CSC2     0x10
#define SDE_DS21x54_CSC0     0X8
#define SDE_DS21x54_FASSA    0x4
#define SDE_DS21x54_CASSA    0x2
#define SDE_DS21x54_CRC4SA   0x1
/*--------SSR-----------------*/

#define SDE_DS21x54_FRCL     0X80
#define SDE_DS21x54_RPE      0X40
#define SDE_DS21x54_RPS      0X20
#define SDE_DS21x54_RHALF    0x10
#define SDE_DS21x54_RNE      0X8
#define SDE_DS21x54_THALF    0x4
#define SDE_DS21x54_TNF      0x2
#define SDE_DS21x54_TMEND    0x1


#define REG_SR1           1
#define REG_SR2           2
#define REG_RIR           3
#define REG_HSR           4
#define REG_SSR           5

typedef struct{
	UCHAR VCR1;
	UCHAR VCR2;
	UCHAR CRCCR1;
	UCHAR CRCCR2;
	UCHAR EBCR1;
	UCHAR EBCR2;
	UCHAR SR1;
	UCHAR SR2;
	UCHAR RIR;
	UCHAR Reserved6[6];
	UCHAR IDR;
	UCHAR RCR1;
	UCHAR RCR2;
	UCHAR TCR1;
	UCHAR TCR2;
	UCHAR CCR1;
	UCHAR TEST1;
	UCHAR IMR1;
	UCHAR IMR2;
	UCHAR LICR;
	UCHAR TEST2;
	UCHAR CCR2;
	UCHAR CCR3;
	UCHAR TSaCR;
	UCHAR CCR6;
	UCHAR SSR;
	UCHAR RNAF;
	UCHAR TAF;
	UCHAR TNAF;
	UCHAR TCBR1;
	UCHAR TCBR2;
	UCHAR TCBR3;
	UCHAR TCBR4;
	UCHAR TIR1;
	UCHAR TIR2;
	UCHAR TIR3;
	UCHAR TIR4;
	UCHAR TIDR;
	UCHAR RCBR1;
	UCHAR RCBR2;
	UCHAR RCBR3;
	UCHAR RCBR4;
	UCHAR RAF;
	UCHAR RS1;
	UCHAR RS2;
	UCHAR RS3;
	UCHAR RS4;
	UCHAR RS5;
	UCHAR RS6;
	UCHAR RS7;
	UCHAR RS8;
	UCHAR RS9;
	UCHAR RS10;
	UCHAR RS11;
	UCHAR RS12;
	UCHAR RS13;
	UCHAR RS14;
	UCHAR RS15;
	UCHAR RS16;
	UCHAR TS1;
	UCHAR TS2;
	UCHAR TS3;
	UCHAR TS4;
	UCHAR TS5;
	UCHAR TS6;
	UCHAR TS7;
	UCHAR TS8;
	UCHAR TS9;
	UCHAR TS10;
	UCHAR TS11;
	UCHAR TS12;
	UCHAR TS13;
	UCHAR TS14;
	UCHAR TS15;
	UCHAR TS16;
	UCHAR TSiAF;
	UCHAR TSiNAF;
	UCHAR TRA;
	UCHAR TSa4;
	UCHAR TSa5;
	UCHAR TSa6;
	UCHAR TSa7;
	UCHAR TSa8;
	UCHAR RSiAF;
	UCHAR RSiNAF;
	UCHAR RRA;
	UCHAR RSa4;
	UCHAR RSa5;
	UCHAR RSa6;
	UCHAR RSa7;
	UCHAR RSa8;
	UCHAR TC1;
	UCHAR TC2;
	UCHAR TC3;
	UCHAR TC4;
	UCHAR TC5;
	UCHAR TC6;
	UCHAR TC7;
	UCHAR TC8;
	UCHAR TC9;
	UCHAR TC10;
	UCHAR TC11;
	UCHAR TC12;
	UCHAR TC13;
	UCHAR TC14;
	UCHAR TC15;
	UCHAR TC16;
	UCHAR TC17;
	UCHAR TC18;
	UCHAR TC19;
	UCHAR TC20;
	UCHAR TC21;
	UCHAR TC22;
	UCHAR TC23;
	UCHAR TC24;
	UCHAR TC25;
	UCHAR TC26;
	UCHAR TC27;
	UCHAR TC28;
	UCHAR TC29;
	UCHAR TC30;
	UCHAR TC31;
	UCHAR TC32;
	UCHAR RC1;
	UCHAR RC2;
	UCHAR RC3;
	UCHAR RC4;
	UCHAR RC5;
	UCHAR RC6;
	UCHAR RC7;
	UCHAR RC8;
	UCHAR RC9;
	UCHAR RC10;
	UCHAR RC11;
	UCHAR RC12;
	UCHAR RC13;
	UCHAR RC14;
	UCHAR RC15;
	UCHAR RC16;
	UCHAR RC17;
	UCHAR RC18;
	UCHAR RC19;
	UCHAR RC20;
	UCHAR RC21;
	UCHAR RC22;
	UCHAR RC23;
	UCHAR RC24;
	UCHAR RC25;
	UCHAR RC26;
	UCHAR RC27;
	UCHAR RC28;
	UCHAR RC29;
	UCHAR RC30;
	UCHAR RC31;
	UCHAR RC32;
	UCHAR TCC1;
	UCHAR TCC2;
	UCHAR TCC3;
	UCHAR TCC4;
	UCHAR RCC1;
	UCHAR RCC2;
	UCHAR RCC3;
	UCHAR RCC4;
	UCHAR CCR4;
	UCHAR TDS0M;
	UCHAR CCR5;
	UCHAR RDS0M;
	UCHAR TEST3;
	UCHAR Reserved3[3];
	UCHAR HCR;
	UCHAR HSR;
	UCHAR HIMR;
	UCHAR RHIR;
	UCHAR RHFR;
	UCHAR IBO;
	UCHAR THIR;
	UCHAR THFR;
	UCHAR RDC1;
	UCHAR RDC2;
	UCHAR TDC1;
	UCHAR TDC2;
	UCHAR Reserved4[4];
}DS21x54Reg;

typedef struct{
	UCHAR *BaseAddr;
	int SyncIF;
	ULONG Timer;
        ULONG RPSlipCnt;
        ULONG RNSlipCnt;
}DS21x54CfgStruct;

typedef struct{
	/*int Timer;
	int RSlip;*/
	int RPSlip;
	int RNSlip;
	/*int TPSlip;
	int TNSlip;
	int RPSlipCnt;
	int RNSlipCnt;
	int TPSlipCnt;
	int TNSlipCnt;*/
	int RLOS;
	int RCL;
}DS21x54WarningStruct;

#define WARNINGTIMECNT   50
#define SLIP_TH          5 

static UCHAR SRead(UCHAR *pReg);
UCHAR *DS21x54BspInit(int DEV, char *FreeMemPtr, DS21x54CfgStruct *cfg);
#endif