bsppllcmm.c

这是单板上DPRAM的驱动程序

/* @(#) pSOSystem PowerPC/V2.2.2*/
/***********************************************************************/
/*                                                                     */
/*   MODULE:  bsppll.c                                                 */
/*   DATE:     99/11/09                                                */
/*   AUTHOR:  Ding MingWei                                             */
/*   PURPOSE:  Phase Lock loop support                                 */
/*                                                                     */
/*---------------------------------------------------------------------*/
/*                                                                     */
/*         Copyright 1998 - 1999, ZHONGXING TELECOM CO.,LTD.           */
/*                      ALL RIGHTS RESERVED                            */
/*                                                                     */
/*---------------------------------------------------------------------*/
/*                                                                     */
/*   The routines in this module performs PLL,      .                  */
/*   bsppll.rev15.c                                                  */
/***********************************************************************/

#include <string.h>
#include "board.h"
#include <math.h>
#include "sdev.h"
#include <bspfuncs.h>
#include "bsppll.h"
#include "bspspec.h"


#define PLL_F_T_CNT   10000
#define PLL_S_T_CNT   60000

#define KILO    1000
#define MEGA    (KILO*KILO)
#define mili    0.001

/*
Kloop=-(vcoFR*daVR/vcoVR/(1<<daWidth));
#define PI      3.1415926
#define pllF    (8.0*KILO)
#define vcoF    (13.0*MEGA)
#define vcoFR   26.0
#define vcoVR   6.0
#define daVR    10.0
#define daWidth 12
*/
#define TS1   (9.25926*mili)
#define TS2   (9.25926*mili)
#define TS3   (231.48148*mili)
#define Th1   20 
#define Th15  13
#define Th2   2 
#define Th3   20  
#define Th4   30

#define Chk1  100
#define Chk15 4
#define Chk2  12000
#define Chk3  5
#define Chk4  3

/*B1V*/
#define LoseLockThreshold  50
#define SAMPLE_INTER_SEC 1.85185
#define V_OUT_MAX  2457
/*B1V END*/

int CurStatus;

static long entries,Prev_CW,CW;
static long PhD,Prev_PhD;
static long Lock_Cnt;
/*static UCHAR Syn_Source;*/
static UCHAR Syn60_Flag=0;
static int SynSource_Test_Cnt=500;
static int Syn_Test_Value=500;
static int S_Cabinet_Cnt=36000;
static int S_Cabinet_Cnt_Val=36000;
static int Init_Cnt=0;
static int Power_Up_Time=240;
/*slave to master count */
static unsigned int  S_M_Cnt=0;

    
static const double KD2=-239.240267126033245;/*0.5,1*/
static const double tao1_2=-0.006605858769141;

static const double KD3=-2.889243490655701;/*0.005,3*/
static const double tao1_3=-407.635561473375617;

static const double KD1=-217.546073627459947;/*0.5,0.8*/
static const double tao1_1=-0.005112994399106;

#ifdef PLLDEBUG
    Info runinfo[maxinfos];
    extern long INITPHD;
    long  curpos;
#endif

/*B1V*/
static unsigned int lock_alarm;//失锁告警标志
static long CurDA;
static long Locked_DAC_Val;
static long old_ph_diff;
static int sec_counter=0;
static int int_counter=0;
static long MAX_CurDA=0,MIN_CurDA=3000;
static int  Frombegin=1;
static long Counter0=0,Counter1=-1;
static int array_pr=0; 
static long Frval;
static int  LoseLockCount=0;
static int  KeepFast=0,KeepSlow=0;
static unsigned int  Cr=0;
static long Addr_Da=0;
static long NormPhase=0;
static long OldPhase=0, NewPhase=0;
static int en_able;
static long DA[400];
static long flash_val;
static long FreV;
static long Slave_Init=0;  /*初始120秒计数*/
/*B1V END*/

static int PLLRead(void *pDataBuf,void *pBuf, int MaxLen);
static int PLLWrite(void *pDataBuf,void *pBuf, int MaxLen);         
static int PLLCntrl(void *pDataBuf, int cmd, void *pParam, int maxlen);
static void PLLISR(void *);
#if (REVNUM==3 || REVNUM==4)
int cmmpllcnt;
#endif

void PLLInit(void *pDataBuf)
{
    USHORT temp_ushort;
    PLLData *plldata;
    int m;

#ifdef PLLDEBUG
    entries=23500;
    curpos=0;
#endif
#if (REVNUM==3 || REVNUM==4)
	cmmpllcnt=-1;
#endif	
	
  /*	SET_PLL_LOSE_STATE  */
    CurStatus=SDS_PLL_LOSE;
    ((PLLData *)pDataBuf)->status=CurStatus;
    ((PLLData *)pDataBuf)->fast_tmout=SDA_NONE;
    ((PLLData *)pDataBuf)->slow_tmout=SDA_NONE;
    ((PLLData *)pDataBuf)->upboundary=SDA_NONE;
    ((PLLData *)pDataBuf)->lowboundary=SDA_NONE;
    ((PLLData *)pDataBuf)->degenerate=SDA_NONE;
    ((PLLData *)pDataBuf)->chops=0;
    Prev_CW =CW =1229;
    
    Prev_PhD=PhD=0;
    
    if(GetBTS_NO()==0)
     {
       	Syn60_Flag=0;
       	flash_val=1229;
       	Power_Up_Time=240;
       	
       	LoseLockCount=0;
       	KeepFast=0;
       	KeepSlow=0;
       	NormPhase=0;
       	OldPhase=0;
        NewPhase=0;
       	for(m=0;m<=399;m++) DA[m]=0;
     } 
    else
     {
       Lock_Cnt=25;
       Syn60_Flag=1;
       Power_Up_Time=270;   /*4.5MIN*/
     }
     
    /*读同步源*/
     
      /* if(CMMVerChecking()==0) Syn_Source=GetAbisPort()*0x800+0xa;
     	else
     		Syn_Source=GetAbisPort()*0x800+0x6;*/
         
    SPLX(IsrAddHandler(V_IRQ_PLL,(void *)PLLISR,pDataBuf); )
    SET_BIT(S_IntEdgeLvlMaskReg,IRQ_PLL_SIEL_BIT,32)
    SET_BIT(S_SiPendRegister,IRQ_PLL_PENDING_BIT,32)
    SET_BIT(S_SiMaskRegister,IRQ_PLL_MASK_BIT,32)
    
    
}

static int PLLCntrl(void *pDataBuf, int cmd, void *pParam, int maxlen)
{
    int i;
    ULONG CWreverse,mask,CWman;
    if(IsSelfMaster())
   {
    switch(cmd)
    { 
        case SDC_SET_PLL_FREEMODE:
			SET_PLL_FREE_STATE
			CurStatus=SDS_PLL_LOSE;
			((PLLData *)pDataBuf)->status=CurStatus;
            ((PLLData *)pDataBuf)->fast_tmout=SDA_NONE;
            ((PLLData *)pDataBuf)->slow_tmout=SDA_NONE;
            ((PLLData *)pDataBuf)->upboundary=SDA_NONE;
            ((PLLData *)pDataBuf)->lowboundary=SDA_NONE;
            ((PLLData *)pDataBuf)->degenerate=SDA_NONE;
            ((PLLData *)pDataBuf)->chops=0;
            if(pParam==0)return SDE_INVALID_ARG; /*edited by xudahe on 2001.4.23*/
            CWman=(ULONG)(*(ULONG *)pParam);
            if(CWman<0 ||CWman >2458)return SDE_INVALID_ARG;    
            /*B1V*/
             flash_val=(long)(*(long*)pParam);
             if(flash_val<0||flash_val>V_OUT_MAX) flash_val=1229;
            /*B1V END*/
			CWreverse=CWman<<4;
			*((volatile USHORT*)DABase)=(USHORT)CWreverse;
            break;
        case SDC_SET_PLL_LOCKMODE:
			SET_PLL_LOSE_STATE 
            if((CurStatus!=SDS_PLL_LOCK)&&(CurStatus!=SDS_PLL_FASTC)&&(CurStatus!=SDS_PLL_SLOWC))
             { 
              CurStatus=SDS_PLL_LOSE; /*debug*/
              /*B1V*/
              flash_val=(long)(*(long*)pParam);
              if(flash_val<0||flash_val>V_OUT_MAX) flash_val=1229;
              /*B1V END*/
              Fck8K_Ctl(0); /*主板向备板传基准*/
#ifdef PLLDEBUG            
            entries=23500;
#else
			entries=0;
#endif			            
            ((PLLData *)pDataBuf)->fast_tmout=SDA_NONE;
            ((PLLData *)pDataBuf)->slow_tmout=SDA_NONE;
            ((PLLData *)pDataBuf)->upboundary=SDA_NONE;
            ((PLLData *)pDataBuf)->lowboundary=SDA_NONE;
            ((PLLData *)pDataBuf)->degenerate=SDA_NONE;
            ((PLLData *)pDataBuf)->chops=0;
            } 
            break;
        case SDC_SET_ACTION:
            break;
        default:
            return SDE_UNKNOW_CMD;
    }
   }
  else{
       SET_PLL_LOSE_STATE 
       /*B1V*/
         flash_val=(long)(*(long*)pParam);
         if(flash_val<0||flash_val>V_OUT_MAX) flash_val=1229;
       /*B1V END*/ 
            if((CurStatus!=SDS_PLL_LOCK)&&(CurStatus!=SDS_PLL_FASTC)&&(CurStatus!=SDS_PLL_SLOWC)) 
             { 
              CurStatus=SDS_PLL_LOSE; /*debug*/
#ifdef PLLDEBUG            
            entries=23500;
#else
			entries=0;
#endif			            
            ((PLLData *)pDataBuf)->fast_tmout=SDA_NONE;
            ((PLLData *)pDataBuf)->slow_tmout=SDA_NONE;
            ((PLLData *)pDataBuf)->upboundary=SDA_NONE;
            ((PLLData *)pDataBuf)->lowboundary=SDA_NONE;
            ((PLLData *)pDataBuf)->degenerate=SDA_NONE;
            ((PLLData *)pDataBuf)->chops=0;
            } 
      }
           
    return SDE_OK;
}        

static int PLLRead(void *pDataBuf,void *pBuf, int MaxLen)
{
    SPLX(memmove(pBuf,pDataBuf,sizeof(PLLData));)
    return sizeof(PLLData);
}

UCHAR PLL_E1_Read(UCHAR *pReg)
{
	/*SR1,SR2,RIR reading
	write-read-write mechanism
	*/
	UCHAR Reg;
	*pReg=0xff;
	Reg=*pReg;
	*pReg=Reg;
	return Reg;
}

/*B1V*/
void LoopFilter(long PhaseDiff, long Output, int Resetcounter)
{
  int m; 	
  float d;
    // 对相位差求和
    if(Resetcounter==1)
    {
    	Counter0=0;
    	Counter1=-1;  
    }
    
    if(Counter0==0)
    {
      if(Counter1==-1) NormPhase = PhaseDiff;
      NewPhase  = PhaseDiff;   
    }
    else
      NewPhase += PhaseDiff;

    if((PhaseDiff-NormPhase)>812) NewPhase -= 1625;
    else if((PhaseDiff-NormPhase)<-812) NewPhase += 1625;

//　改为10ms中断处理一次，故1s中为100次
    if (++Counter0 < 100*2) /*new*/
    	return ;
    Counter0 = 0;
    if (++Counter1 == 0)  
     {
        OldPhase  = NewPhase;
     }
    else
    {
        // 计算频差对应的电压 Frev
	d = (float)(NewPhase - OldPhase);
        FreV = (long)(94L*2*(d/(100L*SAMPLE_INTER_SEC))/SAMPLE_INTER_SEC) ;
        FreV = (FreV+1)/2;
        
        // 计算相位差对应的电压 PhaseV，
        if((FreV)==0)
         {
          if(NewPhase>OldPhase)
           {
            KeepSlow++;
            KeepFast=0;
            if(KeepSlow>2)
             {
              FreV=4;
              KeepSlow=0;
             }
           }
          else if(NewPhase<OldPhase)           
           {
            KeepFast++;
            KeepSlow=0;
            if(KeepFast>2)
             {
              FreV=-4;
              KeepFast=0;
             }
           }
         }
        Output -= (FreV);
 
        // 检查输出电压范围
        if (Output > V_OUT_MAX) Output = V_OUT_MAX;
	if (Output <= 0) Output = 1;
        
        //对DA求累加和,并记录次数.
        Addr_Da=0;
        Cr =0;
        DA[array_pr]=Output;
        en_able=-1;
        Counter1= -1;
        if(array_pr<399) array_pr++;
        else  array_pr=0;
        for(m=0;m<=399;m++)
        {      
         if(DA[m]!=0)
          {
           Addr_Da=Addr_Da + DA[m];
           Cr = Cr + 1;
          }
        }
        Frval=Addr_Da/Cr +1;
        
        //得到最大最小的DA值
   if(Slave_Init>30)
    {     
	if(Frval>MAX_CurDA) MAX_CurDA=Frval;
	else if(Frval<MIN_CurDA)MIN_CurDA=Frval;
    } 
   else Slave_Init++ ;	 	   	    
    }
   NewPhase = 0;
   return ;
}

void OutputDA(ULONG CW)
{
    ULONG CWreverse;	
    CWreverse=CW<<4;
    *((volatile USHORT*)DABase)=(USHORT)CWreverse; 
    return;
}
/*B1V END*/




static void PLLISR(void *pDataBuf)
{
    static long outband,outband1,inband;
    static ULONG CWreverse; 
    static int PhBreaks;
    int i,m;
    double dtao1,dtao2;
    long PD;
    
    static ULONG BufPhase[5];
    ULONG sum,Max,Min;
    static long InitPhD,PhD_InitPhD;
    ULONG mask,tmp,times;
    UCHAR SynSource_Test;
      
    
#ifdef PLLDEBUG
    static long entries_s;
    static int Rec;
#endif


    static int pre_ms_status=1,ms_flag=0,init_flag=1;
    int ms_status;

    

    ms_status=IsSelfMaster();
    if((init_flag==1)&&(ms_status==0))
      {
       pre_ms_status=0;
       init_flag=0;
       }
    if(ms_status>pre_ms_status)
      { 
      	ms_flag=1;
      	Frombegin=1;
      /*	SET_PB_BIT(26,1);*/
       if(S_M_Cnt<3000) S_M_Cnt=S_M_Cnt+1;
       else 
        {
          pre_ms_status=ms_status;
          S_M_Cnt=0;	
         }
       SET_BIT(S_SiPendRegister,IRQ_PLL_PENDING_BIT,32)
       return;
      }
    else
      {
        pre_ms_status=ms_status;
        
      } 
      
if(Init_Cnt<32400) Init_Cnt=Init_Cnt+1;
else  /*检测E1是否帧失步*/
{       
 if((GetBTS_NO()==0)&&(IsSelfMaster()==1))
    {/*
    SynSource_Test=PLL_E1_Read((UCHAR *)(0x70000000+Syn_Source));
	if(SynSource_Test & 0x01)
	 {
	  SynSource_Test_Cnt=0;	
	  Fck8K_Ctl(1);	
	  SET_BIT(S_SiPendRegister,IRQ_PLL_PENDING_BIT,32)
      return;
     } 
    else if(SynSource_Test_Cnt<Syn_Test_Value)
     { 
        SynSource_Test_Cnt=SynSource_Test_Cnt+1;
        SET_BIT(S_SiPendRegister,IRQ_PLL_PENDING_BIT,32)
        return; 
     }
    else
     {
      Fck8K_Ctl(0);	
     } */  	
	}
    else if((GetBTS_NO()>0)&&(IsSelfMaster()==1))
    {
      if(CheckSynClk())
      {
       if(S_Cabinet_Cnt>=S_Cabinet_Cnt_Val)
      	{/*
      	 SynSource_Test=PLL_E1_Read((UCHAR *)(0x70000000+Syn_Source));
	     if(SynSource_Test & 0x01)
	      {
	       Fck8K_Ctl(1);	
	       SET_BIT(S_SiPendRegister,IRQ_PLL_PENDING_BIT,32)
           return; 	
	      }
	     else
	      {
	      	Fck8K_Ctl(0);
	      	if(Syn60_Flag!=2) LocalWorkCtl(1);
	      }*/
	      LocalWorkCtl(1);	
      	}
       else
      	 {
          S_Cabinet_Cnt=S_Cabinet_Cnt+1;
          SET_BIT(S_SiPendRegister,IRQ_PLL_PENDING_BIT,32)
          return;
         }