ram_di.lnk

这是单板上DPRAM的驱动程序

/* @(#) pSOSystem PowerPC/V2.2.2*/
/***********************************************************************/
/*                                                                     */
/*   MODULE:  bsps/fuc8xx/ram_di.lnk                                   */
/*   DATE:    98/7/1                                                   */
/*   PURPOSE: Linker command file for Generating ram.xxx with DIAB     */
/*            Tools                                                    */
/*                                                                     */
/*---------------------------------------------------------------------*/
/*                                                                     */
/*           Copyright 1998 - 1999, ZHONGXING TELECOM CO.,LTD.         */
/*                      ALL RIGHTS RESERVED                            */
/*                                                                     */
/*---------------------------------------------------------------------*/
/*                                                                     */
/*                                                                     */
/*                                                                     */
/***********************************************************************/
anchor = 0x44;
rom_anchor = 0x48;
__PROF_INFO_PTR = 0x4C;    /* Profiler Information Pointer             */
 
MEMORY {
    mem1: o=0x0a0000 l=0xF60000   /* memory length should be 16M */
    mem2: o=0x000300 l=0x100
    mem3: o=0x000400 l=0x100
}

SECTIONS
{
    .DAE_exp: {
        *(.DAE_exp)
    } > mem2
 
    .IAE_exp: {
        *(.IAE_exp)
    } > mem3

    GROUP : {
        .text          : {}
        .init          : {}
        .fini          : {}
        .eini          : {}
        .rodata        : {}
        .sdata2        : {}
        .rosdata       : {}
    } > mem1

	.uncachedata BIND(ADDR(.rosdata)+SIZEOF(.rosdata)) ALIGN(4096)	: {} > mem1
    GROUP BIND(ADDR(.uncachedata)+SIZEOF(.uncachedata)) ALIGN(4096)	: {
        .data          : {}
        .sdata         : {}
        .begbss        : {}
        .sbss          : {}
        .bss           : {}
	} > mem1

	.uncachedata2 BIND(ADDR(.bss)+SIZEOF(.bss)) ALIGN(4096)	: {} > mem1
	.freemem : {} > mem1
     
    .prof_data: {}
}

UncacheBgn= ADDR(.uncachedata);
UncacheEnd= ADDR(.uncachedata)+SIZEOF(.uncachedata);
Uncache2Bgn= ADDR(.uncachedata2);
Uncache2End= ADDR(.uncachedata2)+SIZEOF(.uncachedata2);
FreeMemStart = ~4095 & (4095+ADDR(.uncachedata2)+SIZEOF(.uncachedata2));