📄 cstartx.asm
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; External bus configurations. BUSCON2[7..6]
; After reset determined by the state
; of the port pins P0L.7 and P0L.6.
; ALE Signal is lengthened by either 1 or 0 State Times. BUSCON2.9
@IF( ! @DEFINED( __ALECTL2 ) )
@SET(__ALECTL2, 0) ; 0 = No Delay (Reset value if EA# pin is high
@ENDI ; 1 = Delay (Reset value if EA# pin is high
; Bus Active (BUSACT2) control bit. BUSCON2.10
@IF( ! @DEFINED( __BUSACT2 ) )
@SET(__BUSACT2, 1 ) ; 0 = Disable external bus
@ENDI ; 1 = Enable external bus
; READY# Input Enable control bit. BUSCON2.12
@IF( ! @DEFINED( __RDYEN2 ) )
@SET(__RDYEN2, 0) ; 0 = Disabled (Reset value)
@ENDI ; 1 = Enabled
; Read Chip Select (CSREN2) enable bit. BUSCON2.14
@IF( ! @DEFINED( __CSREN2 ) )
@SET(__CSREN2,0) ; 0 = Chip select independend of read command
@ENDI ; 1 = Chip select for duration of read command
; Write Chip Select (CSWEN2) enable bit. BUSCON2.15
@IF( ! @DEFINED( __CSWEN2 ) )
@SET(__CSWEN2,0) ; 0 = Chip select independend of write command
@ENDI ; 1 = Chip select for duration of write command
; Process BUSCON2 low byte and high byte values
BUSC2 EQU ((@__CSWEN2<<15) | (@__CSREN2<<14) | (@__RDYEN2<<12) | (@__BUSACT2<<10) | (@__ALECTL2<<9) | (@__BTYP2<<6) | (@__MTTC2<<5) | (@__RWDC2<<4) | ((~@__MCTC2)&000Fh))
; Value definitions for System Configuration Register : BUSCON3
; Memory Cycle Time is extended by a number of additional State Times.
; in a range from 0 through 15. BUSCON3[3..0]
; Reset value MCTC = 15 additional state times
@IF( ! @DEFINED( __MCTC3 ) )
@SET(__MCTC3, 1) ; 1 = Memory wait states is 1 (MCTC = 0EH).
@ENDI ; 0 = Memory wait states is 0 (MCTC = 0FH).
; The Read/Write Signal Delay is 0.5 or 0 State Times. BUSCON3.4
@IF( ! @DEFINED( __RWDC3 ) )
@SET(__RWDC3, 1) ; 1 = No Delay Time
@ENDI ; 0 = Delay Time (Reset value)
; Memory Tri-state is extended by either 1 or 0 State Times. BUSCON3.5
@IF( ! @DEFINED( __MTTC3 ) )
@SET(__MTTC3, 0) ; 0 = Delay Time (Reset value)
@ENDI ; 1 = No Delay Time
; External bus configurations. BUSCON3[7..6]
@IF( ! @DEFINED( __BTYP3 ) )
@SET(__BTYP3, 1) ; 0 = 8-bit Demultiplexed Bus
@ENDI ; 1 = 8-bit Multiplexed Bus
; 2 = 16-bit Demultiplexed Bus
; 3 = 16-bit Multiplexed Bus
; ALE Signal is lengthened by either 1 or 0 State Times. BUSCON3.9
@IF( ! @DEFINED( __ALECTL3 ) )
@SET(__ALECTL3, 0) ; 0 = No Delay (Reset value if EA# pin is high
@ENDI ; 1 = Delay (Reset value if EA# pin is high
; Bus Active (BUSACT3) control bit. BUSCON3.10
@IF( ! @DEFINED( __BUSACT3 ) )
@SET(__BUSACT3, 1 ) ; 0 = Disable external bus
@ENDI ; 1 = Enable external bus
; READY# Input Enable control bit. BUSCON3.12
@IF( ! @DEFINED( __RDYEN3 ) )
@SET(__RDYEN3, 0) ; 0 = Disabled (Reset value)
@ENDI ; 1 = Enabled
; Read Chip Select (CSREN3) enable bit. BUSCON3.14
@IF( ! @DEFINED( __CSREN3 ) )
@SET(__CSREN3,0) ; 0 = Chip select independend of read command
@ENDI ; 1 = Chip select for duration of read command
; Write Chip Select (CSWEN3) enable bit. BUSCON3.15
@IF( ! @DEFINED( __CSWEN3 ) )
@SET(__CSWEN3,0) ; 0 = Chip select independend of write command
@ENDI ; 1 = Chip select for duration of write command
; Process BUSCON3 low byte and high byte values
BUSC3 EQU ((@__CSWEN3<<15) | (@__CSREN3<<14) | (@__RDYEN3<<12) | (@__BUSACT3<<10) | (@__ALECTL3<<9) | (@__BTYP3<<6) | (@__MTTC3<<5) | (@__RWDC3<<4) | ((~@__MCTC3)&000Fh))
; Value definitions for System Configuration Register : BUSCON4
; Memory Cycle Time is extended by a number of additional State Times.
; in a range from 0 through 15. BUSCON4[3..0]
; Reset value MCTC = 15 additional state times
@IF( ! @DEFINED( __MCTC4 ) )
@SET(__MCTC4, 1) ; 1 = Memory wait states is 1 (MCTC = 0EH).
@ENDI ; 0 = Memory wait states is 0 (MCTC = 0FH).
; The Read/Write Signal Delay is 0.5 or 0 State Times. BUSCON4.4
@IF( ! @DEFINED( __RWDC4 ) )
@SET(__RWDC4, 1) ; 1 = No Delay Time
@ENDI ; 0 = Delay Time (Reset value)
; Memory Tri-state is extended by either 1 or 0 State Times. BUSCON4.5
@IF( ! @DEFINED( __MTTC4 ) )
@SET(__MTTC4, 0) ; 0 = Delay Time (Reset value)
@ENDI ; 1 = No Delay Time
; External bus configurations. BUSCON4[7..6]
@IF( ! @DEFINED( __BTYP4 ) )
@SET(__BTYP4, 1) ; 0 = 8-bit Demultiplexed Bus
@ENDI ; 1 = 8-bit Multiplexed Bus
; 2 = 16-bit Demultiplexed Bus
; 3 = 16-bit Multiplexed Bus
; ALE Signal is lengthened by either 1 or 0 State Times. BUSCON4.9
; Do not disable the ALE lengthening option for a multiplexed bus
; configuration. See problem 17 in errata sheet SAB-C167A-LM,ES-AC,1.1
; on page 4/9.
@IF( ! @DEFINED( __ALECTL4 ) )
@SET(__ALECTL4, 0) ; 0 = No Delay (Reset value if EA# pin is high
@ENDI ; 1 = Delay (Reset value if EA# pin is high
; Bus Active (BUSACT4) control bit. BUSCON4.10
@IF( ! @DEFINED( __BUSACT4 ) )
@SET(__BUSACT4, 1 ) ; 0 = Disable external bus
@ENDI ; 1 = Enable external bus
; READY# Input Enable control bit. BUSCON4.12
@IF( ! @DEFINED( __RDYEN4 ) )
@SET(__RDYEN4, 0) ; 0 = Disabled (Reset value)
@ENDI ; 1 = Enabled
; Read Chip Select (CSREN4) enable bit. BUSCON4.14
@IF( ! @DEFINED( __CSREN4 ) )
@SET(__CSREN4,0) ; 0 = Chip select independend of read command
@ENDI ; 1 = Chip select for duration of read command
; Write Chip Select (CSWEN4) enable bit. BUSCON4.15
@IF( ! @DEFINED( __CSWEN4 ) )
@SET(__CSWEN4,0) ; 0 = Chip select independend of write command
@ENDI ; 1 = Chip select for duration of write command
; Process BUSCON4 low byte and high byte values
BUSC4 EQU ((@__CSWEN4<<15) | (@__CSREN4<<14) | (@__RDYEN4<<12) | (@__BUSACT4<<10) | (@__ALECTL4<<9) | (@__BTYP4<<6) | (@__MTTC4<<5) | (@__RWDC4<<4) | ((~@__MCTC4)&000Fh))
; Value definitions for System Configuration Register : ADDRSEL1
; Range Size Selection (RGSZ1) field. ADDRSEL1[0..3]
@IF( ! @DEFINED( __RGSZ1 ) )
@SET(__RGSZ1, 8 ) ; 0 = 4 KB Window
@ENDI ; 1 = 8 KB Window
; 2 = 16 KB Window
; 3 = 32 KB Window
; 4 = 64 KB Window
; 5 = 128 KB Window
; 6 = 256 KB Window
; 7 = 512 KB Window
; 8 = 1 MB Window
; 9 = 2 MB Window
; 10 = 4 MB Window
; 11 = 8 MB Window
; Range Start Address (RGSAD1) field. ADDRSEL1[4..15]
@IF( ! @DEFINED( __RGSAD1 ) )
@SET(__RGSAD1, 100000h) ; Defines upper bits of start address
@ENDI
; Process ADDRSEL1
ADRS1 EQU (((@__RGSAD1&0FFFh)<<4) | @__RGSZ1)
; Value definitions for System Configuration Register : ADDRSEL2
; Range Size Selection (RGSZ2) field. ADDRSEL2[0..3]
@IF( ! @DEFINED( __RGSZ2 ) )
@SET(__RGSZ2, 8 ) ; 0 = 4 KB Window
@ENDI ; 1 = 8 KB Window
; 2 = 16 KB Window
; 3 = 32 KB Window
; 4 = 64 KB Window
; 5 = 128 KB Window
; 6 = 256 KB Window
; 7 = 512 KB Window
; 8 = 1 MB Window
; 9 = 2 MB Window
; 10 = 4 MB Window
; 11 = 8 MB Window
; Range Start Address (RGSAD2) field. ADDRSEL2[4..15]
@IF( ! @DEFINED( __RGSAD2 ) )
@SET(__RGSAD2, 200000H) ; Defines upper bits of start address
@ENDI
; Process ADDRSEL2
ADRS2 EQU (((@__RGSAD2&0FFFh)<<4) | @__RGSZ2)
; Value definitions for System Configuration Register : ADDRSEL3
; Range Size Selection (RGSZ3) field. ADDRSEL3[0..3]
@IF( ! @DEFINED( __RGSZ3 ) )
@SET(__RGSZ3, 8 ) ; 0 = 4 KB Window
@ENDI ; 1 = 8 KB Window
; 2 = 16 KB Window
; 3 = 32 KB Window
; 4 = 64 KB Window
; 5 = 128 KB Window
; 6 = 256 KB Window
; 7 = 512 KB Window
; 8 = 1 MB Window
; 9 = 2 MB Window
; 10 = 4 MB Window
; 11 = 8 MB Window
; Range Start Address (RGSAD3) field. ADDRSEL3[4..15]
@IF( ! @DEFINED( __RGSAD3 ) )
@SET(__RGSAD3, 300000H) ; Defines upper bits of start address
@ENDI
; Process ADDRSEL3
ADRS3 EQU (((@__RGSAD3&0FFFh)<<4) | @__RGSZ3)
; Value definitions for System Configuration Register : ADDRSEL4
; Range Size Selection (RGSZ4) field. ADDRSEL4[0..3]
@IF( ! @DEFINED( __RGSZ4 ) )
@SET(__RGSZ4, 8 ) ; 0 = 4 KB Window
@ENDI ; 1 = 8 KB Window
; 2 = 16 KB Window
; 3 = 32 KB Window
; 4 = 64 KB Window
; 5 = 128 KB Window
; 6 = 256 KB Window
; 7 = 512 KB Window
; 8 = 1 MB Window
; 9 = 2 MB Window
; 10 = 4 MB Window
; 11 = 8 MB Window
; Range Start Address (RGSAD4) field. ADDRSEL4[4..15]
@IF( ! @DEFINED( __RGSAD4 ) )
@SET(__RGSAD4, 400000H) ; Defines upper bits of start address
@ENDI
; Process ADDRSEL4
ADRS4 EQU (((@__RGSAD4&0FFFh)<<4) | @__RGSZ4)
@IF( @EVA )
; Symbols __EVA_SYSCON and __EVA_MEMSZ should be defined when the
; XVW166 debugger uses the EVA167 target board as its execution
; environment.
; They let the debugger configure the target environment correctly
; before the boot program downloads the monitor program MON167.
;
__MEMSZ LIT '0' ; EVA167 Memory configuration
; 0 = 1 MBit RAM (Reset value)
; 1 = 2 MBit RAM
; 2 = 4 MBit RAM
__EVA_SYSCON EQU ((SYSC_H << 8) | SYSC_L)
__EVA_MEMSZ EQU __MEMSZ
PUBLIC __EVA_SYSCON,__EVA_MEMSZ
@ENDI
;*****************************************************************************
;* __CSTART
;*****************************************************************************
__CSTART_PR SECTION CODE WORD PUBLIC 'CPROGRAM'
__CSTART PROC TASK __CSTART_TASK INTNO __CSTART_INUM = 00H
DISWDT ; Disable watchdog timer.
; Set SYSCON register.
BFLDL SYSCON, #SYSC_M_L, #(SYSC_L AND SYSC_M_L)
BFLDH SYSCON, #SYSC_M_H, #(SYSC_H AND SYSC_M_H)
@IF( @DEFINED( @_CPU ) )
@IF( @EQS( @_CPU, "164CI") | @EQS( @_CPU, "164ci") |
@EQS( @_CPU, "161RI") | @EQS( @_CPU, "161ri") |
@EQS( @_CPU, "161SI") | @EQS( @_CPU, "161si") |
@EQS( @_CPU, "161CI") | @EQS( @_CPU, "161ci") )
EXTR #03H ; Extended SFR access.
; Set SYSCON2 register.
BFLDL SYSCON2, #SYSC2_M_L, #(SYSC2_L AND SYSC2_M_L)
BFLDH SYSCON2, #SYSC2_M_H, #(SYSC2_H AND SYSC2_M_H)
; Set SYSCON3 register.
MOV SYSCON3, #SYSC3
@ENDI
@ENDI
; Set BUSCON0 register.
BFLDL BUSCON0, #BUSC0_M_L, #(BUSC0_L AND BUSC0_M_L)
BFLDH BUSCON0, #BUSC0_M_H, #(BUSC0_H AND BUSC0_M_H)
@IF( @DEFINED( @BUSCON1 ) )
MOV BUSCON1, #BUSC1 ; Set BUSCON1 register.
MOV ADDRSEL1, #ADRS1 ; Set ADDRSEL1 register.
@ENDI
@IF( @DEFINED( @BUSCON2 ) )
MOV BUSCON2, #BUSC2 ; Set BUSCON2 register.
MOV ADDRSEL2, #ADRS2 ; Set ADDRSEL2 register.
@ENDI
@IF( @DEFINED( @BUSCON3 ) )
MOV BUSCON3, #BUSC3 ; Set BUSCON3 register.
MOV ADDRSEL3, #ADRS3 ; Set ADDRSEL3 register.
@ENDI
@IF( @DEFINED( @BUSCON4 ) )
MOV BUSCON4, #BUSC4 ; Set BUSCON4 register.
MOV ADDRSEL4, #ADRS4 ; Set ADDRSEL4 register.
@ENDI
MOV STKOV, #?SYSSTACK_BOTTOM + 6*2 ; Set stack underflow pointer.
MOV STKUN, #?SYSSTACK_TOP ; Set stack overflow pointer.
MOV SP, #?SYSSTACK_TOP ; Set stack pointer.
MOV CP, #RBANK ; Set context pointer.
NOP
MOV R0, #BOTTOM_BITRAM ; Set R0
@IF( @DEFINED( @CALLEINIT))
@_CALL( @CALLEINIT, R1)
@ENDI
EINIT ; End of initialization
; start of init function
@_CALL(__C_INIT, R1)
; end of init function
@IF( @EQS(@MODEL,"MEDIUM") | @EQS(@MODEL,"LARGE") )
MOV R0, #POF ?USRSTACK_TOP ; set user stack pointer
BSET R0.0EH ; User stack uses DPP1
@ELSE
MOV R0, #?USRSTACK_TOP ; set user stack pointer
@ENDI
@IF( @EVA )
BSET IEN ; allow monitor to break application
@ENDI
MOV R12, #0 ; set argc to 0
MOV R13, #0 ;
MOV R14, #0 ; set argv[] to 0
@IF( @DEFINED( @CALLINIT))
@_CALL( @CALLINIT, R1)
@ENDI
@_CALL( _main, R1)
; The exit() function causes normal program termination to occur. First, all
; functions registered by the atexit() function are called in the reverse
; order. Next, all open streams with unwritten buffered data are flushed, all
; open streams are closed and all files created by the tmpfile() function are
; removed. The status value passed to exit is returned in R4.
__EXIT: LABEL FAR ; the exit() or abort() function jumps
; to this entry.
@IF( @EX_AB )
; restore (host) environment.
MOV SP, #?SYSSTACK_TOP ; restore stack pointer.
@IF( @EQS(@MODEL,"MEDIUM") | @EQS(@MODEL,"LARGE") )
MOV R0, #POF ?USRSTACK_TOP ; restore user stack pointer
BSET R0.0EH ; User stack uses DPP1
@ELSE
MOV R0, #?USRSTACK_TOP ; restore user stack pointer
@ENDI
@IF( @FLOAT )
MOV R1, #?FPSTKUN ; restore floating point stack pointer.
MOV ?FPSP, R1 ; ?FPSP normally initialized via
; C166_INIT.
@ENDI
@ENDI
__IDLE: IDLE ; Power down CPU until peripheral inter-
; rupt or external interrupt occurs.
JMPR CC_UC, __IDLE ; set idle mode again.
RETV ; Virtual return.
__CSTART ENDP
__CSTART_PR ENDS
@IF( @EQS(@MODEL,"TINY") | @EQS(@MODEL,"SMALL") )
C166_US SECTION LDAT WORD GLBUSRSTACK 'CUSTACK'
@ENDI
@IF( @EQS(@MODEL,"MEDIUM") | @EQS(@MODEL,"LARGE") )
C166_US SECTION DATA WORD GLBUSRSTACK 'CUSTACK'
@ENDI
@IF( @_USRSTACK & ( @EQS(@MODEL,"SMALL") | @EQS(@MODEL,"LARGE") ) )
@IF( @EQS( @MODEL, "SMALL" ) | @EQS( @MODEL, "LARGE" ) )
DS 2+4 ; Allocate a user stack of at least 2 bytes +
; return label main (__MAIN_RET).
@ELSE
DS 2+2 ; Allocate a user stack of at least 2 bytes +
; return label main (__MAIN_RET).
@ENDI
@ELSE
DS 2 ; Allocate a user stack of at least 2 bytes
@ENDI
C166_US ENDS
@IF( @EQS(@MODEL,"MEDIUM") | @EQS(@MODEL,"LARGE") )
C166_DGROUP DGROUP __DUMMY
__DUMMY SECTION DATA WORD PUBLIC 'CNEAR'
__DUMMY ENDS
@ENDI
RBANK REGDEF R0-R15 ; Register usage
SSKDEF @__STKSZ ; System stack size
END
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