📄 _c_init.asm
字号:
@ELSE
BFLDH SOF_RAM, #0C0H, #040H ; DPP1:POF_RAM ->SOF_RAM=R1
MOV DPP1, [R4] ; load data page pointer register DPP1
; with data page of ram data block
ADD R4, #2 ; inc offset address to ram data section
; C166_INIT and also insure a delay for
; pipeline effect.(DPP1 set)
@ENDI
;
MOV POF_ROM, [R4+] ; move intra-page offset address rom
; data block to POF_ROM=R2
@IF( @EQS( @MODEL, "TINY" ) )
MOV R5, [R4+] ; move data page of rom data block to R5
SHL R5, #14 ; position page number
OR SOF_ROM, R5 ; intra-segment offset address to
; SOF_ROM=R2
@ELSE
BFLDH SOF_ROM, #0C0H, #080H ; DPP2:POF_ROM ->SOF_ROM=R2
MOV DPP2, [R4] ; load data page pointer register DPP2
; with data page of rom data block
ADD R4, #2 ; inc offset address to rom data section
; C166_INIT and also insure a delay for
; pipeline effect.(DPP2 set)
@ENDI
;
MOV R5, [R4+] ; number of bits to initialize.
; start init bit block
NBBI: ; next bit block init
CMP BP_RAM, #0 ; if ( bitpointer != 0 )
JMP cc_NZ, BPNZ ; then bit pointer not at 0 location
CMP R5, #16 ; if ( initbits < 16 )
JMP cc_ULT, LT16 ; then init bitblock < 16 bits
; else init bitblock = 16 bits
MOV R9, #16 ; bitblocksize = 16
SUB R5, R9 ; initbits -= bitblocksize
JMP cc_UC, STBINIT ; start bit initialization
LT16: ; bit block to init < 16 bits
MOV R9, R5 ; bitblocksize = initbits
; initbits = 0
MOV R5, #0 ; bits left to initialize is zero
JMP cc_UC, STBINIT ; start bit initialization
BPNZ: ; bit pointer not zero
MOV R7, #16 ; R7 = 16
SUB R7, BP_RAM ; R7 = 16 - bitpointer
CMP R5, R7 ; if (initbits < (16 - bitpointer))
JMP cc_ULT, LT16 ; then bitblocksize = initbits
MOV R9, R7 ; bitblocksize = 16 - bitpointer
SUB R5, R9 ; initbits -= bitblocksize
STBINIT: ; start bit initialization
MOV R8, #0FFFFH ; mask = 0XFFFF
MOV R6, #00000H ; bitbuffer = 0X0000
MOV R10, R9 ; i = bitblocksize
NBI: ; next bit init
SHR R8, #1 ; mask >> 1;
SHR R6, #1 ; bitbuffer >> 1;
MOVB RL7, [SOF_ROM+] ; move initialization data to RL7
; and initdata++;
JMP CC_Z, CLRB ; if ( initialization data == 0 )
; then clear bitbuffer.15
BSET R6.15 ; else set bitbuffer.15
CLRB: ; R6.15 already zero
CMPD1 R10, #1 ; if ( i != 1 )
JMP cc_NE, NBI ; then i--; next bit init;
; else save bit data block
MOV R7, #16 ; R7 = 16
SUB R7, R9 ; R7 = 16 - bitblocksize
ADD R7, BP_RAM ; R7 = 16 - bitblocksize + bitpointer
SHR R6, R7 ; bitbuffer >> ((16 - bitblocksize ) +
; bitpointer)
LOOPMASK: ; mask >> ((16 - bitblocksize ) +
; bitpointer)
CMPD1 R7, #0 ;
JMP cc_Z, ENDMASK ;
SHR R8, #1 ;
BSET R8.15 ;
JMP cc_UC, LOOPMASK ;
ENDMASK: ;
AND R8, [SOF_RAM] ; mask &= *bitdata;
OR R6, R8 ; bitbuffer |= mask;
MOV [SOF_RAM], R6 ; *bitdata == bitbuffer;
ADD SOF_RAM, #2 ; bitdata += 2;
MOV BP_RAM, #0 ; bitpointer = 0;
CMP R5, #0 ; if( initbits != 0)
JMP cc_NZ, NBBI ; then continue bit initialization
; else end of bit initialization
@IF( @EQS( @MODEL, "SMALL" ) )
MOV DPP1, #PAG ?BASE_DPP1 ; restore data page register DPP1 and
MOV DPP2, #PAG ?BASE_DPP2 ; DPP2 to their default values.
@ENDI
JMP CC_UC, INIT ; next initialization
;
@ELSE ; NO BIT INITIALIZATION
;
INIT_01:
ADD R4,#0CH ; skip DBPTR, DPTR and DW
JMP CC_UC, INIT ; continue with next initialization
@ENDI
INIT_END: ;
; C166_BSS
@IF( @EQS(@MODEL,"MEDIUM") | @EQS(@MODEL,"LARGE") | @EQS(@MODEL,"SMALL") )
MOV R4, #POF ?C166_BSS_HEAD ; move intra-page offset address rom
; data section C166_BSS to R4
BSS_DPP0: ;
MOV DPP0,#PAG ?C166_BSS_HEAD ; load data page pointer register DPP0
; with data page of rom data C166_BSS
NOP ; delay for pipeline effect
@ENDI
@IF( @EQS( @MODEL, "TINY" ) )
MOV R4, #?C166_BSS_HEAD ; move intra-segment offset address rom
; data section C166_BSS to R4
@ENDI
BSS: ;
MOV R5, [R4+] ; BSS block header code -> R5
@IF( @EQS(@MODEL,"TINY") | @EQS(@MODEL,"SMALL") )
CMP R5, #05H ; check if header code 5 (near)
@IF( @EQS(@MODEL,"SMALL") )
JMP CC_EQ, BSS_05 ;
@ELSE
JMP CC_NE, BSS_END ; if(no header code) end initialization
@ENDI
@ENDI
@IF( @EQS(@MODEL,"MEDIUM") | @EQS(@MODEL,"LARGE") | @EQS(@MODEL,"SMALL") )
CMP R5, #06H ; check if header code 6 (far)
JMP CC_EQ, BSS_06 ;
CMP R5, #07H ; check if header code 7 (huge)
JMP CC_NE, BSS_END ; if(no header code) end initialization
BSS_07: ; clear huge ram data (data > 64 K)
MOV SOF_RAM, [R4+] ; move intra-segment offset address ram
; data block to SOF_RAM=R1
MOV R3, [R4+] ; move segment address ram data block
; to R3
; process data page number ram data
MOV RH3, SOF_RAM_H ; R3.15, R3.14=low bits of page number
ROL R3, #2 ; shift R3.15, R3.14 to R3.1 and R3.0
AND R3, #03FFH ; mask page number
MOV DPP1, R3 ; load data page pointer register DPP1
; with data page of ram data block
BFLDH SOF_RAM, #0C0H, #040H ; DPP1:POF_RAM ->SOF_RAM=R1
;
MOV R5, [R4+] ; number of bytes (R6:R5) to clear in
MOV R6, [R4+] ; specified ram data block.
; MSW=R6, LSW=R5 (long word)
;
CB07_2: CMPD1 R5, #0 ; test if all bytes are cleared and
JMP CC_NE, CB07_1 ; decrement number of bytes to clear.
CMPD1 R6, #0 ;
@IF( @EQS( @MODEL, "SMALL" ) )
JMP CC_EQ, CB07_3 ;
@ELSE
JMP CC_EQ, BSS ; if( block end ) next initialization
@ENDI
CB07_1: MOVB [SOF_RAM], ZEROS ; clear byte
CMPI1 SOF_RAM, #07FFFH ; test end of data page and inc SOF_RAM
JMP CC_NE, CB07_2 ; if(no page end) next byte clear
MOV SOF_RAM, #04000H ; preset offset address ram data
ADD DPP1, #1 ; next page ram data; increment DPP1
JMP CC_UC, CB07_2 ; jump for next byte clear
@IF( @EQS( @MODEL, "SMALL" ) )
CB07_3: MOV DPP1, #PAG ?BASE_DPP1 ; restore data page register DPP1.
JMP CC_UC, BSS ; next initialization
@ENDI
BSS_06: ; clear far ram data. (CPU mode is
; segmented with DPP usage linear or
; paged.)
MOV POF_RAM, [R4+] ; move intra-page offset address ram
; data block to POF_RAM=R1
BFLDH SOF_RAM, #0C0H, #040H ; DPP1:POF_RAM ->SOF_RAM=R1
MOV DPP1, [R4] ; load data page pointer register DPP1
; with data page of ram data block
ADD R4, #2 ; inc offset address to ram data section
; C166_BSS and also insure a delay for
; pipeline effect. (DPP1 set)
;
MOV R5, [R4+] ; number of bytes to clear in specified
; ram data block
;
CB06_1: CMPD1 R5, #0 ; test on data block end
@IF( @EQS( @MODEL, "SMALL" ) )
JMP CC_EQ, CB06_2 ;
@ELSE
JMP CC_EQ, BSS ; if( block end ) next initialization
@ENDI
MOVB [SOF_RAM], ZEROS ; clear byte
ADD SOF_RAM, #1 ; inc SOF_RAM
JMP CC_UC, CB06_1 ; jump for next byte clear
@IF( @EQS( @MODEL, "SMALL" ) )
CB06_2: MOV DPP1, #PAG ?BASE_DPP1 ; restore data page register DPP1
JMP CC_UC, BSS ; next initialization
@ENDI
@ENDI
@IF( @EQS(@MODEL,"TINY") | @EQS(@MODEL,"SMALL") )
BSS_05: ; clear near ram data. (DPP usage
; is linear, CPU mode is segmented
; for SMALL memory model and not
; segmented for TINY memory model.)
MOV SOF_RAM, [R4+] ; move intra-segment offset address ram
; data block to SOF_RAM=R1
;
MOV R5, [R4+] ; number of bytes to clear in specified
; ram data block
@IF( @EQS( @MODEL, "SMALL" ) )
MOV DPP0, #PAG ?BASE_DPP0 ; restore DPP0 to its default value
@ENDI
CB05_1: CMPD1 R5, #0 ; test on data block end, and delay for
; pipeline effect if DPP0 is restored
; for SMALL memory model
@IF( @EQS( @MODEL, "TINY" ) )
JMP CC_EQ, BSS ; if( block end ) next initialization
@ELSE
JMP CC_EQ, BSS_DPP0 ; if( block end ) reload data page
; pointer register DPP0 with data page
; of rom data C166_BSS and start next
; initialization
@ENDI
MOVB [SOF_RAM], ZEROS ; clear byte
ADD SOF_RAM, #1 ; inc SOF_RAM
JMP CC_UC, CB05_1 ; jump for next byte clear
@ENDI
BSS_END:
@IF( @EQS(@MODEL,"SMALL") )
MOV DPP0, #PAG ?BASE_DPP0 ; restore DPP0 to its default value
@ENDI
@IF( @EQS(@MODEL,"MEDIUM") | @EQS(@MODEL,"LARGE") )
MOV DPP0, #0 ; restore DPP0 to its default value
MOV DPP1, #PAG ?USRSTACK_TOP ; set DPP1 to page of user stack
MOV DPP2, #PAG C166_DGROUP ; set DPP2 to page of default data
; group
@ENDI
@_RET
__C_INIT ENDP
__C_INIT_PR ENDS
REGDEF R0-R15 ; Register usage
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