_c_init.asm

上传一个带源代码的嵌入式实时多任务操作系统CMX

;*****************************************************************************
;*
;* MODULE	: _c_init.asm
;*
;* DESCRIPTION	: C copy table code for C16x/ST10 microcontroller.
;*
;*		- Initialization of static variables in internal or external
;*		  ram. C variables which have to be initialized are specified
;*		  in ROM section C166_INIT. C variables which must
;*		  be cleared are specified in ROM section C166_BSS.
;*		- Set user stack pointer.
;*
;* COPYRIGHTS	: 1997 TASKING, Inc.
;*
;*****************************************************************************

@IF( @EQS(@MODEL,"MEDIUM") | @EQS(@MODEL,"LARGE") )
	ASSUME	DPP3:SYSTEM	; assume system data page pointer.

  @IF( @FLOAT )
	ASSUME	DPP2:?FPSTKUN
	ASSUME	DPP2:?FPSP
  @ENDI

@ENDI

PUBLIC __C_INIT
						
	; Predefined functions for register R1, R2 and R3.
	POF_RAM		LIT	'R1'	; Page offset address ram data.
	SOF_RAM		LIT	'R1'	; Segment offset address ram data.
	SOF_RAM_H	LIT	'RH1'	; Segment address high byte.
	POF_ROM		LIT	'R2'	; Page offset address rom data.
	SOF_ROM		LIT	'R2'	; Segment offset address rom data.
	SOF_ROM_H	LIT	'RH2'	; Segment address high byte.
	BP_RAM		LIT	'R3'	; Bit position ram data

	EXTERN RBANK:REGBANK
;*****************************************************************************
;* __C_INIT
;*****************************************************************************
__C_INIT_PR	SECTION CODE PUBLIC 'C_INIT'

@IF( @EQS( @MODEL, "SMALL") | @EQS( @MODEL, "LARGE") )
__C_INIT	PROC FAR
@ELSE
__C_INIT	PROC NEAR
@ENDI		
@IF( @EVA )
	BOTTOM_BITRAM	LIT  '0FD4CH'	; 0FD00H - 0FD4BH is monitor data area
@ELSE
	BOTTOM_BITRAM	LIT  '0FD00H'
@ENDI
					; Clear bit addressable memory
	MOV	R1, #0FDFEH		; R1 = top of bit addressable area
loop:	CMP	R1, #RBANK		; if( R1 in bit addressable area )
	JMP	CC_EQ, cbclr		; then continue next (bit) word clear.
	MOV	[R1], zeros		; clear
cbclr:	CMPD2	R1, # BOTTOM_BITRAM	; if( not bottom bit addressable area )
	JMP	CC_NE, loop		; then continue next (bit) word clear


; The following code is needed for initialization of static variables
@IF( @EQS(@MODEL,"SMALL") )
	MOV	DPP0, #PAG ?BASE_DPP0	; Set data page pointer.
	MOV	DPP1, #PAG ?BASE_DPP1	;
	MOV	DPP2, #PAG ?BASE_DPP2	;
@ENDI
					 ; C166_INIT
@IF( @EQS(@MODEL,"MEDIUM") | @EQS(@MODEL,"LARGE") | @EQS(@MODEL,"SMALL") )
	MOV	R4,  #POF ?C166_INIT_HEAD ; move intra-page offset address rom
					 ; data section C166_INIT to R4
INIT_DPP0:				 ;
	MOV	DPP0,#PAG ?C166_INIT_HEAD ; load data page pointer register DPP0
					 ; with data page of rom data C166_INIT
	NOP				 ; delay for pipeline effect
@ENDI
@IF( @EQS( @MODEL, "TINY" ) )
	MOV	R4, #?C166_INIT_HEAD	; move intra-segment offset address of
					; rom data section C166_INIT to R4
@ENDI
		
INIT:					;
	MOV	R5, [R4+]		; INIT block header code -> R5
	CMP	R5, #01H		; check if header code 1 (bit)
	JMP	CC_EQ, INIT_01		;

@IF( @EQS(@MODEL,"TINY") | @EQS(@MODEL,"SMALL") )
	CMP	R5, #05H		; check if header code is 5 (near)
  @IF( @EQS(@MODEL,"SMALL") )
	JMP	CC_EQ, INIT_05		;
  @ELSE
	JMP	CC_NE, INIT_END		; if(no header code) end initialization
  @ENDI
@ENDI
@IF( @EQS(@MODEL,"MEDIUM") | @EQS(@MODEL,"LARGE") | @EQS(@MODEL,"SMALL") )
	CMP	R5, #06H		; check if header code 6 (far)
	JMP	CC_EQ, INIT_06		;
	CMP	R5, #07H		; check if header code 7 (huge)
	JMP	CC_NE, INIT_END		; if(no header code) end initialization

INIT_07:				; initialize huge ram data. (data > 64K)
	MOV	SOF_RAM, [R4+]		; move intra-segment offset address ram
					; data block to SOF_RAM=R1
	MOV	R3, [R4+]		; move segment address ram data block 
					; to register R3
					; process data page number ram data
	MOV	RH3, SOF_RAM_H		; R3.15, R3.14: low bits of page number

	ROL	R3, #2			; shift R3.15, R3.14 to R3.1 and R3.0
	AND	R3, #03FFH		; mask page number
	MOV	DPP1, R3		; load data page pointer register DPP1
					; with data page of ram data block
	BFLDH	SOF_RAM, #0C0H, #040H	; DPP1:POF_RAM ->SOF_RAM=R1
					;
	MOV	SOF_ROM, [R4+]		; move intra-segment offset address rom
					; data block to SOF_ROM=R2
	MOV	R3, [R4+]		; move segment address rom data block
					; to R3
					; process data page number rom data
	MOV	RH3, SOF_ROM_H		; R3.15, R3.14=low bits of page number

	ROL	R3, #2			; shift R3.15, R3.14 to R3.1 and R3.0
	AND	R3, #03FFH		; mask page number
	MOV	DPP2, R3		; load data page pointer register DPP2
					; with data page of rom data block
	BFLDH	SOF_ROM, #0C0H, #080H	; DPP2:POF_ROM ->SOF_ROM=R2
					;
	MOV	R5, [R4+]		; number of bytes (R6:R5) to move from
	MOV	R6, [R4+]		; rom to ram. MSW=R6, LSW=R5 (long word)
					;
MB07_3:	CMPD1	R5, #0			; test if all bytes are moved and
	JMP	CC_NE, MB07_1 		; decrement number of bytes to move.
	CMPD1	R6, #0			;
  @IF( @EQS( @MODEL, "SMALL" ) )
	JMP	CC_EQ, MB07_4		;
  @ELSE
	JMP	CC_EQ, INIT		; if( block end ) next initialization
  @ENDI
MB07_1:	MOVB	[SOF_RAM], [SOF_ROM]	; move byte from rom to ram
	CMPI1	SOF_RAM, #07FFFH	; test end of data page and inc SOF_RAM
	JMP	CC_NE, MB07_2		; if(no page end) cont init current page
	MOV	SOF_RAM, #04000H	; preset offset address ram data
	ADD	DPP1, #1		; next page of ram data; increment DPP1
MB07_2:	CMPI1	SOF_ROM, #0BFFFH	; test end of page and inc SOF_ROM
	JMP	CC_NE, MB07_3		; if(no page end) cont init current page
	MOV	SOF_ROM, #08000H	; preset offset address rom data
	ADD	DPP2, #1		; next page of rom data; increment DPP2
	JMP	CC_UC, MB07_3		; jump for next byte move
  @IF( @EQS( @MODEL, "SMALL" ) )
MB07_4:	MOV 	DPP1, #PAG ?BASE_DPP1	; restore data page register DPP1 and
	MOV 	DPP2, #PAG ?BASE_DPP2	; DPP2 to their default values.
	JMP	CC_UC, INIT		; next initialization
  @ENDI

INIT_06:				; initialize far ram data. (CPU mode 
					; is segmented with DPP usage linear
					; or paged.)
	MOV	POF_RAM, [R4+]		; move intra-page offset address ram
					; data block to POF_RAM=R1
	BFLDH	SOF_RAM, #0C0H, #040H	; DPP1:POF_RAM ->SOF_RAM=R1
	MOV	DPP1, [R4]		; load data page pointer register DPP1
					; with data page of ram data block
	ADD	R4, #2			; inc offset address to ram data section
					; C166_INIT and also insure a delay for
					; pipeline effect.(DPP1 set)
					;
	MOV	POF_ROM, [R4+]		; move intra-page offset address rom
					; data block to POF_ROM=R2
	BFLDH	SOF_ROM, #0C0H, #080H	; DPP2:POF_ROM ->SOF_ROM=R2
	MOV	DPP2, [R4]		; load data page pointer register DPP2
					; with data page of rom data block
	ADD	R4, #2			; inc offset address to rom data section
					; C166_INIT and also insure a delay for
					; pipeline effect.(DPP2 set)
					;
	MOV	R5, [R4+]		; number of bytes to move from rom to
					; ram for specified data block.
					;
MB06_1:	CMPD1	R5, #0			; test on data block end
  @IF( @EQS( @MODEL, "SMALL" ) )
	JMP	CC_EQ, MB06_2		;
	MOVB	[SOF_RAM], [SOF_ROM+]	; move byte from rom to ram, inc SOF_ROM
	CMPI1	SOF_RAM, #07FFFH	; test end of data page and inc SOF_RAM
	JMP	CC_NE, MB06_1		; if(no page end) cont init current page
	MOV	SOF_RAM, #04000H	; preset offset address ram data
	ADD	DPP1, #1		; next page of ram data; increment DPP1
	JMP	cc_UC, MB06_1		; jump for next byte move
MB06_2:	MOV 	DPP1, #PAG ?BASE_DPP1	; restore data page register DPP1 and
	MOV 	DPP2, #PAG ?BASE_DPP2	; DPP2 to their default values.
	JMP	CC_UC, INIT		; next initialization
  @ELSE
	JMP	CC_EQ, INIT		; if( block end ) next initialization
	MOVB	[SOF_RAM], [SOF_ROM+]	; move byte from rom to ram, inc SOF_ROM
	ADD	SOF_RAM, #1		; inc SOF_RAM
	JMP	CC_UC, MB06_1		; jump for next byte move
  @ENDI
@ENDI

@IF( @EQS(@MODEL,"TINY") | @EQS(@MODEL,"SMALL") )
INIT_05:				; initialize near ram data. (DPP usage
					; is linear, CPU mode is segmented
					; for SMALL memory model and not
					; segmented for TINY memory model.)
	MOV	SOF_RAM, [R4+]		; move intra-segment offset address ram
					; data block to SOF_RAM=R1
					;
	MOV	SOF_ROM, [R4+]		; move intra-segment offset address rom
					; data block to SOF_ROM=R2
					;
	MOV	R5, [R4+]		; number of bytes to move from rom to
					; ram for specified data block.
  @IF( @EQS( @MODEL, "SMALL" ) )
	MOV	DPP0, #PAG ?BASE_DPP0	; restore DPP0 to its default value
  @ENDI
MB05_1:	CMPD1	R5, #0			; test on data block end, and delay
					; for pipeline effect if DPP0 is
					; restored for SMALL memory model.
  @IF( @EQS( @MODEL, "TINY" ) )
	JMP	CC_EQ, INIT 		; if( block end ) next initialization
  @ELSE
	JMP	CC_EQ, INIT_DPP0	; if( block end ) reload data page
					; pointer register DPP0 with data page
					; of rom data C166_INIT and start next
					; initialization.
  @ENDI
	MOVB	[SOF_RAM], [SOF_ROM+]	; byte move rom to ram, inc SOF_ROM
	ADD	SOF_RAM, #1		; inc SOF_RAM
	JMP	CC_UC, MB05_1		; jump for next byte move
@ENDI

@IF( @BIT_INIT )
INIT_01:				; initialize bit data.
	MOV	BP_RAM, [R4+]		; move bit position ram data block to 
					; BOF_RAM=R3
	MOV	POF_RAM, [R4+]		; mov bit offset address ram data block
					; to POF_RAM=R1
  @IF( @EQS( @MODEL, "TINY" ) )
	MOV	R5, [R4+]		; move data page of ram data block to R5
	SHL	R5, #14			; position page number
	OR	SOF_RAM, R5		; intra-segment offset address to 
					; SOF_RAM = R1