bootdb01.s

嵌入式系统开发用源代码 包含At91C arm芯片相关各种例程 包括整数性能测试,浮点测试,硬件驱动等

;**************************************************************************** ;
;** Confidential
;** Copyright (c) 1998 Advanced RISC Machines Limited
;** All rights reserved
;**
;**      Filename : bootrom.s
;**      Author   : Nick Milner
;**      $Revision$
;**
;**  This file is under RCS control
;**  RCS $Source$
;**  $Id$
;**
;****************************************************************************
;**   Purpose : Initial bootrom test program for Atmel Development Board
;**
;**
;**
;****************************************************************************
		AREA BOOTROM, CODE, READONLY
;- Main C function
			IMPORT		main

;- Define "__main" to ensure that C runtime system is not linked in
			EXPORT		__main
__main

AT91_MEM        EQU     0xFFE00000 ; Memory controller
MEM_RCR         EQU     0xFFE00020 ; remap control register
AT91_PIO        EQU     0xFFFF0000 ; Parallel I/O module

ONCHIP_RAM      EQU     0x00300000 ; Onchip SRAM base address (REBOOT mode)
ONCHIP_ROM      EQU     0x00100000 ; Onchip ROM base address
EXTERNAL_ROM    EQU     0x01000000 ; External ROM (CS0)
EXTERNAL_FLASH  EQU     0x02000000 ; External FLASH (CS1)

ONCHIP_STACK	EQU	4096

BOOTROMREG      EQU     0x0100222A ; 0x01000000, 1MB,  8-bit,  3 wait states
FLASHREG        EQU     0x02002229 ; 0x02000000, 1MB,  16-bit, 3 wait states
CSR2DEF         EQU     0x10002121 ; 0x10000000, 16MB, 16-bit, 1 wait state
CSR3DEF         EQU     0x20002121 ; 0x20000000, 16MB, 16-bit, 1 wait state
CSR4DEF         EQU     0x30002121 ; 0x30000000, 16MB, 16-bit, 1 wait state
CSR5DEF         EQU     0x40002121 ; 0x40000000, 16MB, 16-bit, 1 wait state
CSR6DEF         EQU     0x50002121 ; 0x50000000, 16MB, 16-bit, 1 wait state
CSR7DEF         EQU     0x60002121 ; 0x60000000, 16MB, 16-bit, 1 wait state
MCRDEF          EQU     0x00000007 ; 4 memory regions only, standard read

BOOTLINKBIT     EQU     0x02000000 ; P25 in PIO selection register
PIOBITS         EQU     0x02000012 ; P25,P4,P1 in PIO selection register
LED2            EQU     0x00000002 ; P1 in PIO selection register
LED1            EQU     0x00000010 ; P4 in PIO selection register
LED1_2          EQU     0x00000012 ; P1 and P4

		ENTRY

vectors
		B       resetvec ; reqset
		B       undefvec ; Udef
		B       swivec   ; SW
		B       pabtvec  ; P abt
		B       dabtvec  ; D abt
		B       rsvdvec  ; reserved
		B       irqvec   ; IRQ
		B       fiqvec   ; FIQ

resetvec

		;point at the base address
		LDR     r0, =AT91_MEM
		;program chip select and memory control registers
		LDR     r1, =BOOTROMREG
		STR     r1, [r0, #0]
		LDR     r1, =FLASHREG
		STR     r1, [r0, #4]
		LDR     r1, =CSR2DEF
		STR     r1, [r0, #8]
		LDR     r1, =CSR3DEF
		STR     r1, [r0, #12]
		LDR     r1, =CSR4DEF
		STR     r1, [r0, #16]
		LDR     r1, =CSR5DEF
		STR     r1, [r0, #20]
		LDR     r1, =CSR6DEF
		STR     r1, [r0, #24]
		LDR     r1, =CSR7DEF
		STR     r1, [r0, #28]
		LDR     r1, =MCRDEF     ;Memory Control Register
		STR     r1, [r0, #36]
copytosram
		; copy first 100 bytes of ROM to internal SRAM
		; r0 destination address
		; r1 source address
		; r2 end of source address
		; r3 corrupted

		LDR     r0, =ONCHIP_RAM
		MOV     r1, #0
		MOV     r2, #&1000

		; r0 destination address
		; r1 source address
		; r2 end of source address
		; r3 Temporary register
copyloop
		CMP     r1,r2
		BGE     remap
		LDR     r3,[r1],#4
		STR     r3,[r0]
		LDR     r3,[r0],#4
		B       copyloop
remap
		; SRAM and ROM have same code so remap now
		LDR     r0, =MEM_RCR
		MOV     r1, #1
		STR     r1, [r0]

		; Make P4 and P1 PIO output and P25 PIO input
		; Register defaults to PIO input so just need to
		; set PIO outputs

		LDR r0, =AT91_PIO
		LDR r1, =LED1_2
		STR r1, [r0, #&10] ; Output Enable register
		LDR r1, =BOOTLINKBIT
		LDR r3, =LED1

		STR r3, [r0, #&34] ; turn LED1 off

checkbootlink
		LDR r2, [r0, #&3C] ; read port
		AND r2, r2, r1     ; mask off unused bits
		TEQ r2, r1         ; is the bit high?
		BEQ waithere
		STR r3, [r0, #&30] ; turn on LED1 if bit is high
		LDR r0, =EXTERNAL_FLASH
		MOV pc,r0
waithere

;- Branch on C code main function
loop_main
		ldr	r13, =ONCHIP_STACK		; set up stack
		bl		main
		CMP	r0, #0
		BEQ	loop_main
		mov	pc, r0

; If vectors occur then the program hangs in a loop. The address
; indicates which vector has been taken

undefvec
		B       undefvec
swivec
		B       swivec
pabtvec
		B       pabtvec
dabtvec
		B       pabtvec
rsvdvec
		B       rsvdvec
irqvec
		B       irqvec
fiqvec
		B       fiqvec

progend
		END