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📄 latch1.rpp.talkback.xml

📁 本人编写的FPGA光电编码器输入模块,没有实验,但仿真基本实现,希望有参考价值.
💻 XML
📖 第 1 页 / 共 3 页
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		<open_drain>no</open_drain>
		<tri_primitive>yes</tri_primitive>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<current_strength>24mA</current_strength>
		<termination>Off</termination>
		<location_assigned_by>Fitter</location_assigned_by>
		<load units="pF">0</load>
	</row>
	<row>
		<name>PC_OUT[12]</name>
		<pin__>32</pin__>
		<i_o_bank>1</i_o_bank>
		<x_coordinate>0</x_coordinate>
		<y_coordinate>5</y_coordinate>
		<cell_number>2</cell_number>
		<output_register>no</output_register>
		<output_enable_register>no</output_enable_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<open_drain>no</open_drain>
		<tri_primitive>yes</tri_primitive>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<current_strength>24mA</current_strength>
		<termination>Off</termination>
		<location_assigned_by>Fitter</location_assigned_by>
		<load units="pF">0</load>
	</row>
	<row>
		<name>PC_OUT[13]</name>
		<pin__>8</pin__>
		<i_o_bank>1</i_o_bank>
		<x_coordinate>0</x_coordinate>
		<y_coordinate>12</y_coordinate>
		<cell_number>1</cell_number>
		<output_register>no</output_register>
		<output_enable_register>no</output_enable_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<open_drain>no</open_drain>
		<tri_primitive>yes</tri_primitive>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<current_strength>24mA</current_strength>
		<termination>Off</termination>
		<location_assigned_by>Fitter</location_assigned_by>
		<load units="pF">0</load>
	</row>
	<row>
		<name>PC_OUT[14]</name>
		<pin__>205</pin__>
		<i_o_bank>2</i_o_bank>
		<x_coordinate>1</x_coordinate>
		<y_coordinate>14</y_coordinate>
		<cell_number>0</cell_number>
		<output_register>no</output_register>
		<output_enable_register>no</output_enable_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<open_drain>no</open_drain>
		<tri_primitive>yes</tri_primitive>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<current_strength>24mA</current_strength>
		<termination>Off</termination>
		<location_assigned_by>Fitter</location_assigned_by>
		<load units="pF">0</load>
	</row>
	<row>
		<name>PC_OUT[15]</name>
		<pin__>5</pin__>
		<i_o_bank>1</i_o_bank>
		<x_coordinate>0</x_coordinate>
		<y_coordinate>13</y_coordinate>
		<cell_number>4</cell_number>
		<output_register>no</output_register>
		<output_enable_register>no</output_enable_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<open_drain>no</open_drain>
		<tri_primitive>yes</tri_primitive>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<current_strength>24mA</current_strength>
		<termination>Off</termination>
		<location_assigned_by>Fitter</location_assigned_by>
		<load units="pF">0</load>
	</row>
	<row>
		<name>PC_OUT[1]</name>
		<pin__>34</pin__>
		<i_o_bank>1</i_o_bank>
		<x_coordinate>0</x_coordinate>
		<y_coordinate>4</y_coordinate>
		<cell_number>0</cell_number>
		<output_register>no</output_register>
		<output_enable_register>no</output_enable_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<open_drain>no</open_drain>
		<tri_primitive>yes</tri_primitive>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<current_strength>24mA</current_strength>
		<termination>Off</termination>
		<location_assigned_by>Fitter</location_assigned_by>
		<load units="pF">0</load>
	</row>
	<row>
		<name>PC_OUT[2]</name>
		<pin__>10</pin__>
		<i_o_bank>1</i_o_bank>
		<x_coordinate>0</x_coordinate>
		<y_coordinate>12</y_coordinate>
		<cell_number>2</cell_number>
		<output_register>no</output_register>
		<output_enable_register>no</output_enable_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<open_drain>no</open_drain>
		<tri_primitive>yes</tri_primitive>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<current_strength>24mA</current_strength>
		<termination>Off</termination>
		<location_assigned_by>Fitter</location_assigned_by>
		<load units="pF">0</load>
	</row>
	<row>
		<name>PC_OUT[3]</name>
		<pin__>13</pin__>
		<i_o_bank>1</i_o_bank>
		<x_coordinate>0</x_coordinate>
		<y_coordinate>11</y_coordinate>
		<cell_number>1</cell_number>
		<output_register>no</output_register>
		<output_enable_register>no</output_enable_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<open_drain>no</open_drain>
		<tri_primitive>yes</tri_primitive>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<current_strength>24mA</current_strength>
		<termination>Off</termination>
		<location_assigned_by>Fitter</location_assigned_by>
		<load units="pF">0</load>
	</row>
	<row>
		<name>PC_OUT[4]</name>
		<pin__>11</pin__>
		<i_o_bank>1</i_o_bank>
		<x_coordinate>0</x_coordinate>
		<y_coordinate>12</y_coordinate>
		<cell_number>3</cell_number>
		<output_register>no</output_register>
		<output_enable_register>no</output_enable_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<open_drain>no</open_drain>
		<tri_primitive>yes</tri_primitive>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<current_strength>24mA</current_strength>
		<termination>Off</termination>
		<location_assigned_by>Fitter</location_assigned_by>
		<load units="pF">0</load>
	</row>
	<row>
		<name>PC_OUT[5]</name>
		<pin__>31</pin__>
		<i_o_bank>1</i_o_bank>
		<x_coordinate>0</x_coordinate>
		<y_coordinate>5</y_coordinate>
		<cell_number>1</cell_number>
		<output_register>no</output_register>
		<output_enable_register>no</output_enable_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<open_drain>no</open_drain>
		<tri_primitive>yes</tri_primitive>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<current_strength>24mA</current_strength>
		<termination>Off</termination>
		<location_assigned_by>Fitter</location_assigned_by>
		<load units="pF">0</load>
	</row>
	<row>
		<name>PC_OUT[6]</name>
		<pin__>14</pin__>
		<i_o_bank>1</i_o_bank>
		<x_coordinate>0</x_coordinate>
		<y_coordinate>11</y_coordinate>
		<cell_number>2</cell_number>
		<output_register>no</output_register>
		<output_enable_register>no</output_enable_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<open_drain>no</open_drain>
		<tri_primitive>yes</tri_primitive>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<current_strength>24mA</current_strength>
		<termination>Off</termination>
		<location_assigned_by>Fitter</location_assigned_by>
		<load units="pF">0</load>
	</row>
	<row>
		<name>PC_OUT[7]</name>
		<pin__>36</pin__>
		<i_o_bank>1</i_o_bank>
		<x_coordinate>0</x_coordinate>
		<y_coordinate>4</y_coordinate>
		<cell_number>2</cell_number>
		<output_register>no</output_register>
		<output_enable_register>no</output_enable_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<open_drain>no</open_drain>
		<tri_primitive>yes</tri_primitive>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<current_strength>24mA</current_strength>
		<termination>Off</termination>
		<location_assigned_by>Fitter</location_assigned_by>
		<load units="pF">0</load>
	</row>
	<row>
		<name>PC_OUT[8]</name>
		<pin__>12</pin__>
		<i_o_bank>1</i_o_bank>
		<x_coordinate>0</x_coordinate>
		<y_coordinate>11</y_coordinate>
		<cell_number>0</cell_number>
		<output_register>no</output_register>
		<output_enable_register>no</output_enable_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<open_drain>no</open_drain>
		<tri_primitive>yes</tri_primitive>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<current_strength>24mA</current_strength>
		<termination>Off</termination>
		<location_assigned_by>Fitter</location_assigned_by>
		<load units="pF">0</load>
	</row>
	<row>
		<name>PC_OUT[9]</name>
		<pin__>37</pin__>
		<i_o_bank>1</i_o_bank>
		<x_coordinate>0</x_coordinate>
		<y_coordinate>4</y_coordinate>
		<cell_number>3</cell_number>
		<output_register>no</output_register>
		<output_enable_register>no</output_enable_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<open_drain>no</open_drain>
		<tri_primitive>yes</tri_primitive>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<current_strength>24mA</current_strength>
		<termination>Off</termination>
		<location_assigned_by>Fitter</location_assigned_by>
		<load units="pF">0</load>
	</row>
</output_pins>
<i_o_bank_usage>
	<row>
		<i_o_bank>1</i_o_bank>
		<usage>21 / 34 ( 62 % )</usage>
		<vccio_voltage>3.3V</vccio_voltage>
	</row>
	<row>
		<i_o_bank>2</i_o_bank>
		<usage>12 / 35 ( 34 % )</usage>
		<vccio_voltage>3.3V</vccio_voltage>
	</row>
	<row>
		<i_o_bank>3</i_o_bank>
		<usage>1 / 37 ( 3 % )</usage>
		<vccio_voltage>3.3V</vccio_voltage>
	</row>
	<row>
		<i_o_bank>4</i_o_bank>
		<usage>3 / 36 ( 8 % )</usage>
		<vccio_voltage>3.3V</vccio_voltage>
	</row>
</i_o_bank_usage>
<advanced_data___general>
	<row>
		<name>Status Code</name>
		<value>0</value>
	</row>
	<row>
		<name>Desired User Slack</name>
		<value>0</value>
	</row>
	<row>
		<name>Fit Attempts</name>
		<value>1</value>
	</row>
</advanced_data___general>
<advanced_data___placement_preparation>
	<row>
		<name>Auto Fit Point 1 - Fit Attempt 1</name>
		<value>ff</value>
	</row>
	<row>
		<name>Mid Wire Use - Fit Attempt 1</name>
		<value>0</value>
	</row>
	<row>
		<name>Mid Slack - Fit Attempt 1</name>
		<value>2147483639</value>
	</row>
	<row>
		<name>Internal Atom Count - Fit Attempt 1</name>
		<value>33</value>
	</row>
	<row>
		<name>LE/ALM Count - Fit Attempt 1</name>
		<value>17</value>
	</row>
	<row>
		<name>LAB Count - Fit Attempt 1</name>
		<value>2</value>
	</row>
	<row>
		<name>Outputs per Lab - Fit Attempt 1</name>
		<value>8.000</value>
	</row>
	<row>
		<name>Inputs per LAB - Fit Attempt 1</name>
		<value>8.500</value>
	</row>
	<row>
		<name>Global Inputs per LAB - Fit Attempt 1</name>
		<value>0.500</value>
	</row>
	<row>
		<name>LAB Constraint &apos;non-global clock + sync load&apos; - Fit Attempt 1</name>
		<value>0:2</value>
	</row>
	<row>
		<name>LAB Constraint &apos;non-global controls&apos; - Fit Attempt 1</name>
		<value>0:2</value>
	</row>
	<row>
		<name>LAB Constraint &apos;non-global + aclr&apos; - Fit Attempt 1</name>
		<value>0:2</value>
	</row>
	<row>
		<name>LAB Constraint &apos;global non-clock non-aclr&apos; - Fit Attempt 1</name>
		<value>0:2</value>
	</row>
	<row>
		<name>LAB Constraint &apos;global controls&apos; - Fit Attempt 1</name>
		<value>0:1;1:1</value>
	</row>
	<row>
		<name>LAB Constraint &apos;deterministic LABSMUXA/LABXMUXB&apos; - Fit Attempt 1</name>
		<value>0:2</value>
	</row>
	<row>
		<name>LAB Constraint &apos;deterministic LABSMUXC/LABXMUXD&apos; - Fit Attempt 1</name>
		<value>0:2</value>
	</row>
	<row>
		<name>LAB Constraint &apos;clock / ce pair constraint&apos; - Fit Attempt 1</name>
		<value>0:1;1:1</value>
	</row>
	<row>
		<name>LAB Constraint &apos;aclr constraint&apos; - Fit Attempt 1</name>
		<value>0:1;1:1</value>
	</row>
	<row>
		<name>LAB Constraint &apos;true sload_sclear pair&apos; - Fit Attempt 1</name>
		<value>0:2</value>
	</row>
	<row>
		<name>LAB Constraint &apos;constant sload_sclear pair&apos; - Fit Attempt 1</name>
		<value>0:2</value>
	</row>
	<row>
		<name>LAB Constraint &apos;has placement constraint&apos; - Fit Attempt 1</name>
		<value>0:2</value>
	</row>
	<row>
		<name>LEs in Chains - Fit Attempt 1</name>
		<value>0</value>
	</row>
	<row>
		<name>LEs in Long Chains - Fit Attempt 1</name>
		<value>0</value>
	</row>
	<row>
		<name>LABs with Chains - Fit Attempt 1</name>
		<value>0</value>
	</row>
	<row>
		<name>LABs with Multiple Chains - Fit Attempt 1</name>
		<value>0</value>
	</row>
	<row>
		<name>Time - Fit Attempt 1</name>
		<value>0</value>
	</row>
	<row>
		<name>Time in tsm_tan.dll - Fit Attempt 1</name>
		<value>0.020</value>
	</row>
</advanced_data___placement_preparation>
<advanced_data___placement>
	<row>
		<name>Auto Fit Point 2 - Fit Attempt 1</name>
		<value>ff</value>
	</row>
	<row>
		<name>Early Wire Use - Fit Attempt 1</name>
		<value>0</value>
	</row>
	<row>
		<name>Early Slack - Fit Attempt 1</name>
		<value>2147483639</value>
	</row>
	<row>
		<name>Auto Fit Point 3 - Fit Attempt 1</name>
		<value>ff</value>
	</row>
	<row>
		<name>Mid Wire Use - Fit Attempt 1</name>
		<value>0</value>
	</row>
	<row>
		<name>Mid Slack - Fit Attempt 1</name>
		<value>2147483639</value>
	</row>
	<row>
		<name>Auto Fit Point 4 - Fit Attempt 1</name>
		<value>ff</value>
	</row>
	<row>
		<name>Late Wire Use - Fit Attempt 1</name>
		<value>0</value>
	</row>
	<row>
		<name>Late Slack - Fit Attempt 1</name>
		<value>2147483639</value>
	</row>
	<row>
		<name>Auto Fit Point 5 - Fit Attempt 1</name>
		<value>ff</value>
	</row>
	<row>
		<name>Time - Fit Attempt 1</name>
		<value>0</value>
	</row>
	<row>
		<name>Time in tsm_dat.dll - Fit Attempt 1</name>
		<value>0.010</value>
	</row>
	<row>
		<name>Time in tsm_tan.dll - Fit Attempt 1</name>
		<value>0.020</value>
	</row>
</advanced_data___placement>
<advanced_data___routing>
	<row>
		<name>Early Slack - Fit Attempt 1</name>
		<value>2147483639</value>
	</row>
	<row>
		<name>Mid Slack - Fit Attempt 1</name>
		<value>2147483639</value>
	</row>
	<row>
		<name>Late Slack - Fit Attempt 1</name>
		<value>2147483639</value>
	</row>
	<row>
		<name>Late Slack - Fit Attempt 1</name>
		<value>2147483639</value>
	</row>
	<row>
		<name>Late Wire Use - Fit Attempt 1</name>
		<value>0</value>
	</row>
	<row>
		<name>Time - Fit Attempt 1</name>
		<value>0</value>
	</row>
	<row>
		<name>Time in tsm_tan.dll - Fit Attempt 1</name>
		<value>0.110</value>
	</row>
</advanced_data___routing>
</talkback>

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