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📄 code_fd.rpp.talkback.xml

📁 本人编写的FPGA光电编码器输入模块,没有实验,但仿真基本实现,希望有参考价值.
💻 XML
📖 第 1 页 / 共 3 页
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123 
		<pin__>152</pin__>
		<i_o_bank>3</i_o_bank>
		<x_coordinate>28</x_coordinate>
		<y_coordinate>12</y_coordinate>
		<cell_number>0</cell_number>
		<output_register>no</output_register>
		<output_enable_register>no</output_enable_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<current_strength>24mA</current_strength>
		<termination>Off</termination>
		<location_assigned_by>Fitter</location_assigned_by>
		<load units="pF">0</load>
	</row>
	<row>
		<name>PC_OUT[1]</name>
		<pin__>116</pin__>
		<i_o_bank>3</i_o_bank>
		<x_coordinate>28</x_coordinate>
		<y_coordinate>4</y_coordinate>
		<cell_number>0</cell_number>
		<output_register>no</output_register>
		<output_enable_register>no</output_enable_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<current_strength>24mA</current_strength>
		<termination>Off</termination>
		<location_assigned_by>Fitter</location_assigned_by>
		<load units="pF">0</load>
	</row>
	<row>
		<name>PC_OUT[2]</name>
		<pin__>146</pin__>
		<i_o_bank>3</i_o_bank>
		<x_coordinate>28</x_coordinate>
		<y_coordinate>11</y_coordinate>
		<cell_number>1</cell_number>
		<output_register>no</output_register>
		<output_enable_register>no</output_enable_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<current_strength>24mA</current_strength>
		<termination>Off</termination>
		<location_assigned_by>Fitter</location_assigned_by>
		<load units="pF">0</load>
	</row>
	<row>
		<name>PC_OUT[3]</name>
		<pin__>68</pin__>
		<i_o_bank>4</i_o_bank>
		<x_coordinate>7</x_coordinate>
		<y_coordinate>0</y_coordinate>
		<cell_number>1</cell_number>
		<output_register>no</output_register>
		<output_enable_register>no</output_enable_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<current_strength>24mA</current_strength>
		<termination>Off</termination>
		<location_assigned_by>Fitter</location_assigned_by>
		<load units="pF">0</load>
	</row>
	<row>
		<name>PC_OUT[4]</name>
		<pin__>105</pin__>
		<i_o_bank>3</i_o_bank>
		<x_coordinate>28</x_coordinate>
		<y_coordinate>1</y_coordinate>
		<cell_number>1</cell_number>
		<output_register>no</output_register>
		<output_enable_register>no</output_enable_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<current_strength>24mA</current_strength>
		<termination>Off</termination>
		<location_assigned_by>Fitter</location_assigned_by>
		<load units="pF">0</load>
	</row>
	<row>
		<name>PC_OUT[5]</name>
		<pin__>206</pin__>
		<i_o_bank>2</i_o_bank>
		<x_coordinate>1</x_coordinate>
		<y_coordinate>14</y_coordinate>
		<cell_number>1</cell_number>
		<output_register>no</output_register>
		<output_enable_register>no</output_enable_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<current_strength>24mA</current_strength>
		<termination>Off</termination>
		<location_assigned_by>Fitter</location_assigned_by>
		<load units="pF">0</load>
	</row>
	<row>
		<name>PC_OUT[6]</name>
		<pin__>169</pin__>
		<i_o_bank>2</i_o_bank>
		<x_coordinate>21</x_coordinate>
		<y_coordinate>14</y_coordinate>
		<cell_number>1</cell_number>
		<output_register>no</output_register>
		<output_enable_register>no</output_enable_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<current_strength>24mA</current_strength>
		<termination>Off</termination>
		<location_assigned_by>Fitter</location_assigned_by>
		<load units="pF">0</load>
	</row>
	<row>
		<name>PC_OUT[7]</name>
		<pin__>70</pin__>
		<i_o_bank>4</i_o_bank>
		<x_coordinate>9</x_coordinate>
		<y_coordinate>0</y_coordinate>
		<cell_number>1</cell_number>
		<output_register>no</output_register>
		<output_enable_register>no</output_enable_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<current_strength>24mA</current_strength>
		<termination>Off</termination>
		<location_assigned_by>Fitter</location_assigned_by>
		<load units="pF">0</load>
	</row>
	<row>
		<name>PC_OUT[8]</name>
		<pin__>198</pin__>
		<i_o_bank>2</i_o_bank>
		<x_coordinate>5</x_coordinate>
		<y_coordinate>14</y_coordinate>
		<cell_number>1</cell_number>
		<output_register>no</output_register>
		<output_enable_register>no</output_enable_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<current_strength>24mA</current_strength>
		<termination>Off</termination>
		<location_assigned_by>Fitter</location_assigned_by>
		<load units="pF">0</load>
	</row>
	<row>
		<name>PC_OUT[9]</name>
		<pin__>88</pin__>
		<i_o_bank>4</i_o_bank>
		<x_coordinate>19</x_coordinate>
		<y_coordinate>0</y_coordinate>
		<cell_number>1</cell_number>
		<output_register>no</output_register>
		<output_enable_register>no</output_enable_register>
		<power_up_high>no</power_up_high>
		<pci_i_o_enabled>no</pci_i_o_enabled>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<bus_hold>no</bus_hold>
		<weak_pull_up>Off</weak_pull_up>
		<i_o_standard>LVTTL</i_o_standard>
		<current_strength>24mA</current_strength>
		<termination>Off</termination>
		<location_assigned_by>Fitter</location_assigned_by>
		<load units="pF">0</load>
	</row>
</output_pins>
<i_o_bank_usage>
	<row>
		<i_o_bank>1</i_o_bank>
		<usage>9 / 34 ( 26 % )</usage>
		<vccio_voltage>3.3V</vccio_voltage>
	</row>
	<row>
		<i_o_bank>2</i_o_bank>
		<usage>4 / 35 ( 11 % )</usage>
		<vccio_voltage>3.3V</vccio_voltage>
	</row>
	<row>
		<i_o_bank>3</i_o_bank>
		<usage>6 / 37 ( 16 % )</usage>
		<vccio_voltage>3.3V</vccio_voltage>
	</row>
	<row>
		<i_o_bank>4</i_o_bank>
		<usage>5 / 36 ( 14 % )</usage>
		<vccio_voltage>3.3V</vccio_voltage>
	</row>
</i_o_bank_usage>
<advanced_data___general>
	<row>
		<name>Status Code</name>
		<value>0</value>
	</row>
	<row>
		<name>Desired User Slack</name>
		<value>0</value>
	</row>
	<row>
		<name>Fit Attempts</name>
		<value>1</value>
	</row>
</advanced_data___general>
<advanced_data___placement_preparation>
	<row>
		<name>Auto Fit Point 1 - Fit Attempt 1</name>
		<value>ff</value>
	</row>
	<row>
		<name>Mid Wire Use - Fit Attempt 1</name>
		<value>0</value>
	</row>
	<row>
		<name>Mid Slack - Fit Attempt 1</name>
		<value>2147483639</value>
	</row>
	<row>
		<name>Internal Atom Count - Fit Attempt 1</name>
		<value>1</value>
	</row>
	<row>
		<name>LE/ALM Count - Fit Attempt 1</name>
		<value>1</value>
	</row>
	<row>
		<name>LAB Count - Fit Attempt 1</name>
		<value>1</value>
	</row>
	<row>
		<name>Outputs per Lab - Fit Attempt 1</name>
		<value>0.000</value>
	</row>
	<row>
		<name>Inputs per LAB - Fit Attempt 1</name>
		<value>0.000</value>
	</row>
	<row>
		<name>Global Inputs per LAB - Fit Attempt 1</name>
		<value>0.000</value>
	</row>
	<row>
		<name>LAB Constraint &apos;non-global clock + sync load&apos; - Fit Attempt 1</name>
		<value>0:1</value>
	</row>
	<row>
		<name>LAB Constraint &apos;non-global controls&apos; - Fit Attempt 1</name>
		<value>0:1</value>
	</row>
	<row>
		<name>LAB Constraint &apos;non-global + aclr&apos; - Fit Attempt 1</name>
		<value>0:1</value>
	</row>
	<row>
		<name>LAB Constraint &apos;global non-clock non-aclr&apos; - Fit Attempt 1</name>
		<value>0:1</value>
	</row>
	<row>
		<name>LAB Constraint &apos;global controls&apos; - Fit Attempt 1</name>
		<value>0:1</value>
	</row>
	<row>
		<name>LAB Constraint &apos;deterministic LABSMUXA/LABXMUXB&apos; - Fit Attempt 1</name>
		<value>0:1</value>
	</row>
	<row>
		<name>LAB Constraint &apos;deterministic LABSMUXC/LABXMUXD&apos; - Fit Attempt 1</name>
		<value>0:1</value>
	</row>
	<row>
		<name>LAB Constraint &apos;clock / ce pair constraint&apos; - Fit Attempt 1</name>
		<value>0:1</value>
	</row>
	<row>
		<name>LAB Constraint &apos;aclr constraint&apos; - Fit Attempt 1</name>
		<value>0:1</value>
	</row>
	<row>
		<name>LAB Constraint &apos;true sload_sclear pair&apos; - Fit Attempt 1</name>
		<value>0:1</value>
	</row>
	<row>
		<name>LAB Constraint &apos;constant sload_sclear pair&apos; - Fit Attempt 1</name>
		<value>0:1</value>
	</row>
	<row>
		<name>LAB Constraint &apos;has placement constraint&apos; - Fit Attempt 1</name>
		<value>0:1</value>
	</row>
	<row>
		<name>LEs in Chains - Fit Attempt 1</name>
		<value>0</value>
	</row>
	<row>
		<name>LEs in Long Chains - Fit Attempt 1</name>
		<value>0</value>
	</row>
	<row>
		<name>LABs with Chains - Fit Attempt 1</name>
		<value>0</value>
	</row>
	<row>
		<name>LABs with Multiple Chains - Fit Attempt 1</name>
		<value>0</value>
	</row>
	<row>
		<name>Time - Fit Attempt 1</name>
		<value>0</value>
	</row>
	<row>
		<name>Time in tsm_tan.dll - Fit Attempt 1</name>
		<value>0.020</value>
	</row>
</advanced_data___placement_preparation>
<advanced_data___placement>
	<row>
		<name>Auto Fit Point 3 - Fit Attempt 1</name>
		<value>ff</value>
	</row>
	<row>
		<name>Mid Wire Use - Fit Attempt 1</name>
		<value>0</value>
	</row>
	<row>
		<name>Mid Slack - Fit Attempt 1</name>
		<value>2147483639</value>
	</row>
	<row>
		<name>Auto Fit Point 4 - Fit Attempt 1</name>
		<value>ff</value>
	</row>
	<row>
		<name>Late Wire Use - Fit Attempt 1</name>
		<value>0</value>
	</row>
	<row>
		<name>Late Slack - Fit Attempt 1</name>
		<value>2147483639</value>
	</row>
	<row>
		<name>Auto Fit Point 5 - Fit Attempt 1</name>
		<value>ff</value>
	</row>
	<row>
		<name>Time - Fit Attempt 1</name>
		<value>0</value>
	</row>
	<row>
		<name>Time in tsm_tan.dll - Fit Attempt 1</name>
		<value>0.030</value>
	</row>
</advanced_data___placement>
<advanced_data___routing>
	<row>
		<name>Early Slack - Fit Attempt 1</name>
		<value>2147483639</value>
	</row>
	<row>
		<name>Mid Slack - Fit Attempt 1</name>
		<value>2147483639</value>
	</row>
	<row>
		<name>Late Slack - Fit Attempt 1</name>
		<value>2147483639</value>
	</row>
	<row>
		<name>Late Slack - Fit Attempt 1</name>
		<value>2147483639</value>
	</row>
	<row>
		<name>Late Wire Use - Fit Attempt 1</name>
		<value>0</value>
	</row>
	<row>
		<name>Time - Fit Attempt 1</name>
		<value>0</value>
	</row>
	<row>
		<name>Time in tsm_tan.dll - Fit Attempt 1</name>
		<value>0.070</value>
	</row>
</advanced_data___routing>
</talkback>
123

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