code_fd.tan.talkback.xml

来自「本人编写的FPGA光电编码器输入模块,没有实验,但仿真基本实现,希望有参考价值.」· XML 代码 · 共 50 行

<!--
This XML file (created on Tue Jun 13 17:11:34 2006) contains limited information
from the compilation of logic designs using Quartus II software (BUT NOT THE
LOGIC DESIGN FILES) that will be transmitted to Altera Corporation through
operation of the "TalkBack" feature.  To enable/disable this feature, run
qtb_install.exe located in your quartus/bin folder.  For more information, go
to license.txt.
-->
<talkback>
<ver>5.1</ver>
<schema>quartus_version_5.1_build_176.xsd</schema><license>
	<host_id>000aeb14954f</host_id>
	<nic_id>000aeb14954f</nic_id>
	<cdrive_id>988e65e0</cdrive_id>
</license>
<tool>
	<name>Quartus II</name>
	<version>5.1</version>
	<build>Build 176</build>
	<binary_type>32</binary_type>
	<module>quartus_tan.exe</module>
	<edition>Full Version</edition>
	<compilation_end_time>Tue Jun 13 17:11:34 2006</compilation_end_time>
</tool>
<machine>
	<os>Windows 2000</os>
	<cpu>
		<proc_count>1</proc_count>
		<cpu_freq units="MHz">1302</cpu_freq>
	</cpu>
	<ram units="MB">120</ram>
</machine>
<top_file>D:/altera/fpga+dsp/Code_FD/Code_FD</top_file>
<mep_data>
	<command_line>quartus_tan --read_settings_files=off --write_settings_files=off Code_FD -c Code_FD --timing_analysis_only</command_line>
</mep_data>
<software_data>
	<smart_recompile>off</smart_recompile>
</software_data>
<messages>
	<warning>Warning: No paths found for timing analysis</warning>
	<info>Info: Quartus II Timing Analyzer was successful. 0 errors, 1 warning</info>
	<info>Info: Elapsed time: 00:00:02</info>
	<info>Info: Processing ended: Tue Jun 13 17:11:34 2006</info>
	<info>Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off Code_FD -c Code_FD --timing_analysis_only</info>
	<info>Info: Running Quartus II Timing Analyzer</info>
</messages>
</talkback>