📄 f4.rpp.talkback.xml
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</row>
<row>
<option>Generate a compressed Jam STAPL Byte Code 2.0 File (.jbc) for Target Device</option>
<setting>On</setting>
<default_value>On</default_value>
</row>
<row>
<option>Generate compressed bitstreams</option>
<setting>On</setting>
<default_value>On</default_value>
</row>
<row>
<option>Compression mode</option>
<setting>Off</setting>
<default_value>Off</default_value>
</row>
<row>
<option>Clock source for configuration device</option>
<setting>Internal</setting>
<default_value>Internal</default_value>
</row>
<row>
<option>Clock frequency of the configuration device</option>
<setting units="MHz">10</setting>
<default_value units="MHz">10</default_value>
</row>
<row>
<option>Divide clock frequency by</option>
<setting>1</setting>
<default_value>1</default_value>
</row>
<row>
<option>JTAG user code for target device</option>
<setting>Ffffffff</setting>
<default_value>Ffffffff</default_value>
</row>
<row>
<option>Configuration device</option>
<setting>Auto</setting>
<default_value>Auto</default_value>
</row>
<row>
<option>JTAG user code for configuration device</option>
<setting>Ffffffff</setting>
<default_value>Ffffffff</default_value>
</row>
<row>
<option>Configuration device auto user code</option>
<setting>Off</setting>
<default_value>Off</default_value>
</row>
<row>
<option>Generate Tabular Text File (.ttf) For Target Device</option>
<setting>Off</setting>
<default_value>Off</default_value>
</row>
<row>
<option>Generate Raw Binary File (.rbf) For Target Device</option>
<setting>Off</setting>
<default_value>Off</default_value>
</row>
<row>
<option>Generate Hexadecimal (Intel-Format) Output File (.hexout) for Target Device</option>
<setting>Off</setting>
<default_value>Off</default_value>
</row>
<row>
<option>Hexadecimal Output File start address</option>
<setting>0</setting>
<default_value>0</default_value>
</row>
<row>
<option>Hexadecimal Output File count direction</option>
<setting>Up</setting>
<default_value>Up</default_value>
</row>
<row>
<option>Release clears before tri-states</option>
<setting>Off</setting>
<default_value>Off</default_value>
</row>
<row>
<option>Auto-restart configuration after error</option>
<setting>On</setting>
<default_value>On</default_value>
</row>
<row>
<option>Always Enable Input Buffers</option>
<setting>Off</setting>
<default_value>Off</default_value>
</row>
<row>
<option>Maintain Compatibility with All Cyclone II M4K Versions</option>
<setting>On</setting>
<default_value>On</default_value>
</row>
</assembler_settings>
<general_register_statistics>
<row>
<statistic>Total registers</statistic>
<value>4</value>
</row>
<row>
<statistic>Number of registers using Synchronous Clear</statistic>
<value>0</value>
</row>
<row>
<statistic>Number of registers using Synchronous Load</statistic>
<value>0</value>
</row>
<row>
<statistic>Number of registers using Asynchronous Clear</statistic>
<value>4</value>
</row>
<row>
<statistic>Number of registers using Asynchronous Load</statistic>
<value>0</value>
</row>
<row>
<statistic>Number of registers using Clock Enable</statistic>
<value>0</value>
</row>
<row>
<statistic>Number of registers using Preset</statistic>
<value>0</value>
</row>
</general_register_statistics>
<clock_settings_summary>
<row>
<clock_node_name>CLK</clock_node_name>
<type>User Pin</type>
<fmax_requirement>None</fmax_requirement>
<early_latency units="ns">0.000</early_latency>
<late_latency units="ns">0.000</late_latency>
<multiply_base_fmax_by>N/A</multiply_base_fmax_by>
<divide_base_fmax_by>N/A</divide_base_fmax_by>
<offset>N/A</offset>
</row>
</clock_settings_summary>
<input_pins>
<row>
<name>CLK</name>
<pin__>23</pin__>
<i_o_bank>1</i_o_bank>
<x_coordinate>0</x_coordinate>
<y_coordinate>6</y_coordinate>
<cell_number>0</cell_number>
<combinational_fan_out>1</combinational_fan_out>
<registered_fan_out>0</registered_fan_out>
<global>no</global>
<input_register>no</input_register>
<power_up_high>no</power_up_high>
<pci_i_o_enabled>no</pci_i_o_enabled>
<bus_hold>no</bus_hold>
<weak_pull_up>Off</weak_pull_up>
<i_o_standard>LVTTL</i_o_standard>
<termination>Off</termination>
<location_assigned_by>Fitter</location_assigned_by>
</row>
<row>
<name>CLR</name>
<pin__>24</pin__>
<i_o_bank>1</i_o_bank>
<x_coordinate>0</x_coordinate>
<y_coordinate>6</y_coordinate>
<cell_number>1</cell_number>
<combinational_fan_out>1</combinational_fan_out>
<registered_fan_out>0</registered_fan_out>
<global>no</global>
<input_register>no</input_register>
<power_up_high>no</power_up_high>
<pci_i_o_enabled>no</pci_i_o_enabled>
<bus_hold>no</bus_hold>
<weak_pull_up>Off</weak_pull_up>
<i_o_standard>LVTTL</i_o_standard>
<termination>Off</termination>
<location_assigned_by>Fitter</location_assigned_by>
</row>
<row>
<name>INA</name>
<pin__>180</pin__>
<i_o_bank>2</i_o_bank>
<x_coordinate>14</x_coordinate>
<y_coordinate>14</y_coordinate>
<cell_number>1</cell_number>
<combinational_fan_out>1</combinational_fan_out>
<registered_fan_out>0</registered_fan_out>
<global>no</global>
<input_register>no</input_register>
<power_up_high>no</power_up_high>
<pci_i_o_enabled>no</pci_i_o_enabled>
<bus_hold>no</bus_hold>
<weak_pull_up>Off</weak_pull_up>
<i_o_standard>LVTTL</i_o_standard>
<termination>Off</termination>
<location_assigned_by>Fitter</location_assigned_by>
</row>
<row>
<name>INB</name>
<pin__>191</pin__>
<i_o_bank>2</i_o_bank>
<x_coordinate>9</x_coordinate>
<y_coordinate>14</y_coordinate>
<cell_number>1</cell_number>
<combinational_fan_out>1</combinational_fan_out>
<registered_fan_out>0</registered_fan_out>
<global>no</global>
<input_register>no</input_register>
<power_up_high>no</power_up_high>
<pci_i_o_enabled>no</pci_i_o_enabled>
<bus_hold>no</bus_hold>
<weak_pull_up>Off</weak_pull_up>
<i_o_standard>LVTTL</i_o_standard>
<termination>Off</termination>
<location_assigned_by>Fitter</location_assigned_by>
</row>
</input_pins>
<output_pins>
<row>
<name>ENADD</name>
<pin__>189</pin__>
<i_o_bank>2</i_o_bank>
<x_coordinate>9</x_coordinate>
<y_coordinate>14</y_coordinate>
<cell_number>0</cell_number>
<output_register>no</output_register>
<output_enable_register>no</output_enable_register>
<power_up_high>no</power_up_high>
<pci_i_o_enabled>no</pci_i_o_enabled>
<open_drain>no</open_drain>
<tri_primitive>no</tri_primitive>
<bus_hold>no</bus_hold>
<weak_pull_up>Off</weak_pull_up>
<i_o_standard>LVTTL</i_o_standard>
<current_strength>24mA</current_strength>
<termination>Off</termination>
<location_assigned_by>Fitter</location_assigned_by>
<load units="pF">0</load>
</row>
<row>
<name>F4_CLK</name>
<pin__>198</pin__>
<i_o_bank>2</i_o_bank>
<x_coordinate>5</x_coordinate>
<y_coordinate>14</y_coordinate>
<cell_number>1</cell_number>
<output_register>no</output_register>
<output_enable_register>no</output_enable_register>
<power_up_high>no</power_up_high>
<pci_i_o_enabled>no</pci_i_o_enabled>
<open_drain>no</open_drain>
<tri_primitive>no</tri_primitive>
<bus_hold>no</bus_hold>
<weak_pull_up>Off</weak_pull_up>
<i_o_standard>LVTTL</i_o_standard>
<current_strength>24mA</current_strength>
<termination>Off</termination>
<location_assigned_by>Fitter</location_assigned_by>
<load units="pF">0</load>
</row>
</output_pins>
<i_o_bank_usage>
<row>
<i_o_bank>1</i_o_bank>
<usage>4 / 34 ( 12 % )</usage>
<vccio_voltage>3.3V</vccio_voltage>
</row>
<row>
<i_o_bank>2</i_o_bank>
<usage>4 / 35 ( 11 % )</usage>
<vccio_voltage>3.3V</vccio_voltage>
</row>
<row>
<i_o_bank>3</i_o_bank>
<usage>1 / 37 ( 3 % )</usage>
<vccio_voltage>3.3V</vccio_voltage>
</row>
<row>
<i_o_bank>4</i_o_bank>
<usage>0 / 36 ( 0 % )</usage>
<vccio_voltage>3.3V</vccio_voltage>
</row>
</i_o_bank_usage>
<advanced_data___general>
<row>
<name>Status Code</name>
<value>0</value>
</row>
<row>
<name>Desired User Slack</name>
<value>0</value>
</row>
<row>
<name>Fit Attempts</name>
<value>1</value>
</row>
</advanced_data___general>
<advanced_data___placement_preparation>
<row>
<name>Auto Fit Point 1 - Fit Attempt 1</name>
<value>ff</value>
</row>
<row>
<name>Mid Wire Use - Fit Attempt 1</name>
<value>0</value>
</row>
<row>
<name>Mid Slack - Fit Attempt 1</name>
<value>998469</value>
</row>
<row>
<name>Internal Atom Count - Fit Attempt 1</name>
<value>9</value>
</row>
<row>
<name>LE/ALM Count - Fit Attempt 1</name>
<value>6</value>
</row>
<row>
<name>LAB Count - Fit Attempt 1</name>
<value>2</value>
</row>
<row>
<name>Outputs per Lab - Fit Attempt 1</name>
<value>2.000</value>
</row>
<row>
<name>Inputs per LAB - Fit Attempt 1</name>
<value>2.000</value>
</row>
<row>
<name>Global Inputs per LAB - Fit Attempt 1</name>
<value>1.000</value>
</row>
<row>
<name>LAB Constraint 'non-global clock + sync load' - Fit Attempt 1</name>
<value>0:2</value>
</row>
<row>
<name>LAB Constraint 'non-global controls' - Fit Attempt 1</name>
<value>0:2</value>
</row>
<row>
<name>LAB Constraint 'non-global + aclr' - Fit Attempt 1</name>
<value>0:1;1:1</value>
</row>
<row>
<name>LAB Constraint 'global non-clock non-aclr' - Fit Attempt 1</name>
<value>0:2</value>
</row>
<row>
<name>LAB Constraint 'global controls' - Fit Attempt 1</name>
<value>0:1;2:1</value>
</row>
<row>
<name>LAB Constraint 'deterministic LABSMUXA/LABXMUXB' - Fit Attempt 1</name>
<value>0:2</value>
</row>
<row>
<name>LAB Constraint 'deterministic LABSMUXC/LABXMUXD' - Fit Attempt 1</name>
<value>0:2</value>
</row>
<row>
<name>LAB Constraint 'clock / ce pair constraint' - Fit Attempt 1</name>
<value>0:1;1:1</value>
</row>
<row>
<name>LAB Constraint 'aclr constraint' - Fit Attempt 1</name>
<value>0:1;1:1</value>
</row>
<row>
<name>LAB Constraint 'true sload_sclear pair' - Fit Attempt 1</name>
<value>0:1;1:1</value>
</row>
<row>
<name>LAB Constraint 'constant sload_sclear pair' - Fit Attempt 1</name>
<value>0:2</value>
</row>
<row>
<name>LAB Constraint 'has placement constraint' - Fit Attempt 1</name>
<value>0:2</value>
</row>
<row>
<name>LEs in Chains - Fit Attempt 1</name>
<value>0</value>
</row>
<row>
<name>LEs in Long Chains - Fit Attempt 1</name>
<value>0</value>
</row>
<row>
<name>LABs with Chains - Fit Attempt 1</name>
<value>0</value>
</row>
<row>
<name>LABs with Multiple Chains - Fit Attempt 1</name>
<value>0</value>
</row>
<row>
<name>Time - Fit Attempt 1</name>
<value>0</value>
</row>
<row>
<name>Time in tsm_tan.dll - Fit Attempt 1</name>
<value>0.060</value>
</row>
</advanced_data___placement_preparation>
<advanced_data___placement>
<row>
<name>Auto Fit Point 2 - Fit Attempt 1</name>
<value>ff</value>
</row>
<row>
<name>Early Wire Use - Fit Attempt 1</name>
<value>0</value>
</row>
<row>
<name>Early Slack - Fit Attempt 1</name>
<value>998843</value>
</row>
<row>
<name>Auto Fit Point 3 - Fit Attempt 1</name>
<value>ff</value>
</row>
<row>
<name>Mid Wire Use - Fit Attempt 1</name>
<value>0</value>
</row>
<row>
<name>Mid Slack - Fit Attempt 1</name>
<value>998843</value>
</row>
<row>
<name>Auto Fit Point 4 - Fit Attempt 1</name>
<value>ff</value>
</row>
<row>
<name>Late Wire Use - Fit Attempt 1</name>
<value>0</value>
</row>
<row>
<name>Late Slack - Fit Attempt 1</name>
<value>998843</value>
</row>
<row>
<name>Auto Fit Point 5 - Fit Attempt 1</name>
<value>ff</value>
</row>
<row>
<name>Time - Fit Attempt 1</name>
<value>0</value>
</row>
<row>
<name>Time in tsm_tan.dll - Fit Attempt 1</name>
<value>0.020</value>
</row>
</advanced_data___placement>
<advanced_data___routing>
<row>
<name>Early Slack - Fit Attempt 1</name>
<value>998543</value>
</row>
<row>
<name>Early Wire Use - Fit Attempt 1</name>
<value>0</value>
</row>
<row>
<name>Peak Regional Wire - Fit Attempt 1</name>
<value>0</value>
</row>
<row>
<name>Mid Slack - Fit Attempt 1</name>
<value>998534</value>
</row>
<row>
<name>Late Slack - Fit Attempt 1</name>
<value>998534</value>
</row>
<row>
<name>Late Slack - Fit Attempt 1</name>
<value>998534</value>
</row>
<row>
<name>Late Wire Use - Fit Attempt 1</name>
<value>0</value>
</row>
<row>
<name>Time - Fit Attempt 1</name>
<value>1</value>
</row>
<row>
<name>Time in tsm_tan.dll - Fit Attempt 1</name>
<value>0.140</value>
</row>
</advanced_data___routing>
</talkback>
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