aes_sp800-38a.c

atmel官方的at91sam7x256芯片在iar编译环境下的全部演示代码

//  ----------------------------------------------------------------------------
//          ATMEL Microcontroller Software Support  -  ROUSSET  -
//  ----------------------------------------------------------------------------
//  DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
//  IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
//  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
//  DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
//  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
//  OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
//  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
//  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
//  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// ----------------------------------------------------------------------------
//  File Name           : aes_sp800-38a.c
//  Object              :
//  Creation            : FBr   22-Aug-2005
// ----------------------------------------------------------------------------
#include "main.h"
#include "aes_sp800-38a.h"

unsigned int TestBuf[4];

//*----------------------------------------------------------------------------
//* \fn    AT91F_AES_SetKeys
//* \brief
//*----------------------------------------------------------------------------
void AT91F_AES_SetKeys(const unsigned int array[][16],unsigned int index)
{
  unsigned char i;

  for (i=0;i<4;i++)
    AT91F_AES_SetCryptoKey(AT91C_BASE_AES,i,array[index][i+KEY_OFFSET]);
}

//*----------------------------------------------------------------------------
//* \fn    AT91F_AES_SetInitializationVectors
//* \brief
//*----------------------------------------------------------------------------
void AT91F_AES_SetInitializationVectors(const unsigned int array[][16],unsigned int index)
{
  unsigned char i;

  for (i=0;i<4;i++)
    AT91F_AES_SetInitializationVector(AT91C_BASE_AES,i,array[index][i+INIT_OFFSET]);
}

//*----------------------------------------------------------------------------
//* \fn    AT91F_AES_SetPlainText
//* \brief
//*----------------------------------------------------------------------------
void AT91F_AES_SetPlainText(const unsigned int array[][16],unsigned int index)
{
  unsigned char i;

  for (i=0;i<4;i++)
    AT91F_AES_InputData(AT91C_BASE_AES,i,array[index][i+IN_OFFSET]);
}

//*----------------------------------------------------------------------------
//* \fn    AT91F_AES_Manual_Auto_Mode
//* \brief
//*----------------------------------------------------------------------------
unsigned int AT91F_AES_Manual_Auto_Mode(unsigned int mode,unsigned int startmode,unsigned int cipher,unsigned int index)
{
  unsigned int out1,out2,out3,out4;
  unsigned char i;

  AT91F_AES_SoftReset(AT91C_BASE_AES);
  AT91F_AES_CfgModeReg(AT91C_BASE_AES,cipher|startmode|mode);

  // Set Key
  AT91F_AES_SetKeys(aes_sp800_38a,index);

  // Set Init Vector for Chained Modes
  if(mode != AT91C_AES_OPMOD_ECB)
    AT91F_AES_SetInitializationVectors(aes_sp800_38a,index);

  for(i=0;i<4;i++,index++) {

    // DATRDY flag already cleared (output data reg read before)
    test = AT91C_TEST_NOK;
    AT91F_AES_EnableIt(AT91C_BASE_AES,AT91C_AES_DATRDY);

    // Start Processing (for AUTO Mode)
    // 4 accesses required for 128-bit modes to Start Processing (for AUTO Mode)
    AT91F_AES_SetPlainText(aes_sp800_38a,index);

    // Start Processing (for MANUAL Mode)
    if( !(startmode & AT91C_AES_SMOD_AUTO) )
      AT91F_AES_StartProcessing(AT91C_BASE_AES);

    // Wait 4 end of processing
    while(test != AT91C_TEST_OK);

    // Retrieve Output DATA => Reset DATRDY Status Flag
    out1 = AT91F_AES_GetOutputData(AT91C_BASE_AES,0);
    out2 = AT91F_AES_GetOutputData(AT91C_BASE_AES,1);
    out3 = AT91F_AES_GetOutputData(AT91C_BASE_AES,2);
    out4 = AT91F_AES_GetOutputData(AT91C_BASE_AES,3);		

    // Comparison Test
    if( (out1 != aes_sp800_38a[index][0+OUT_OFFSET]) || (out2 != aes_sp800_38a[index][1+OUT_OFFSET])
       || (out3 != aes_sp800_38a[index][2+OUT_OFFSET]) || (out4 != aes_sp800_38a[index][3+OUT_OFFSET]) ) {
         TRACE_ERROR("........ => FAILED\n\r");
         return FALSE;
       }
  }		

  TRACE_INFO("........ => OK\n\r");
  return TRUE;
}

//*----------------------------------------------------------------------------
//* \fn    AT91C_AES_Manual_Auto_Mode_CFB8
//* \brief
//*----------------------------------------------------------------------------
unsigned int AT91C_AES_Manual_Auto_Mode_CFB8(unsigned int startmode,unsigned int cipher,unsigned int index)
{
  unsigned int out1;
  unsigned char i;

  AT91F_AES_SoftReset(AT91C_BASE_AES);
  AT91F_AES_CfgModeReg(AT91C_BASE_AES,cipher|startmode|AT91C_AES_OPMOD_CFB|AT91C_AES_CFBS_8_BIT);

  // Set Key
  AT91F_AES_SetKeys(aes_sp800_38a,index);

  // Set Initialization Vector
  AT91F_AES_SetInitializationVectors(aes_sp800_38a,index);

  for(i=0;i<18;i++,index++) {

    // DATRDY flag already cleared (output data reg read before)
    test = AT91C_TEST_NOK;
    AT91F_AES_EnableIt(AT91C_BASE_AES,AT91C_AES_DATRDY);

    // 1 access required for CFB 8-,16-,32-bit to Start Processing (for AUTO Mode)
    AT91F_AES_InputData(AT91C_BASE_AES,0,aes_sp800_38a[index][0+IN_OFFSET]);

    // Start Processing (for MANUAL Mode)
    if( !(startmode & AT91C_AES_SMOD_AUTO) )
      AT91F_AES_StartProcessing(AT91C_BASE_AES);

    // Wait 4 end of processing
    while(test != AT91C_TEST_OK);

    // Retrieve Output DATA => Reset DATRDY Status Flag
    out1 = AT91F_AES_GetOutputData(AT91C_BASE_AES,0);

    // Comparison Test
    if( (out1 != aes_sp800_38a[index][0+OUT_OFFSET]) ) {
      TRACE_ERROR("........ => FAILED\n\r");
      return FALSE;
    }
  }		

  TRACE_INFO("........ => OK\n\r");
  return TRUE;
}

//*----------------------------------------------------------------------------
//* \fn    AT91F_AES_PDC_Mode
//* \brief
//*----------------------------------------------------------------------------
unsigned int AT91F_AES_PDC_Mode(unsigned int mode,unsigned int submode,unsigned int cipher,unsigned char index)
{
  unsigned char i;

  AT91F_AES_SoftReset(AT91C_BASE_AES);
  AT91F_AES_CfgModeReg(AT91C_BASE_AES,AT91C_AES_SMOD_PDC|cipher|mode|submode);

  // Set Key
  AT91F_AES_SetKeys(aes_sp800_38a,index);

  // Set Init Vector for Chained Modes
  if(mode != AT91C_AES_OPMOD_ECB)
    AT91F_AES_SetInitializationVectors(aes_sp800_38a,index);

  for(i=0;i<0x4;i++)
    TestBuf[i] = aes_sp800_38a[index][i+IN_OFFSET];

  // Set xCR & xPR
  if(submode == AT91C_AES_CFBS_8_BIT) {
    AT91F_PDC_SetTx(AT91C_BASE_PDC_AES, (char *)TestBuf, 1);
    AT91F_PDC_SetRx(AT91C_BASE_PDC_AES, (char *)TestBuf, 1);
  }	else {
    AT91F_PDC_SetTx(AT91C_BASE_PDC_AES, (char *)TestBuf, 4);
    AT91F_PDC_SetRx(AT91C_BASE_PDC_AES, (char *)TestBuf, 4);
  }

  // Enable ITs
  test = AT91C_TEST_NOK;
  AT91F_AES_EnableIt(AT91C_BASE_AES,AT91C_AES_ENDRX);

  // Enable PDC => Start Tx/Rx
  AT91C_BASE_PDC_AES->PDC_PTCR = AT91C_PDC_TXTEN | AT91C_PDC_RXTEN;

  // Wait end of Transfer
  while(test != AT91C_TEST_OK);

  // Disable PDC => Start Tx/Rx
  AT91C_BASE_PDC_AES->PDC_PTCR = AT91C_PDC_TXTDIS | AT91C_PDC_RXTDIS;

  // Check Output Text
  if(submode == AT91C_AES_CFBS_8_BIT) {
    if( ((char) *TestBuf) != (char)(aes_sp800_38a[index][0+OUT_OFFSET]) )
      return FALSE;
  }
  else {
    for(i=0;i<0x4;i++) {
      if( TestBuf[i] != (aes_sp800_38a[index][i+OUT_OFFSET]) ) {
        TRACE_ERROR("........ => FAILED\n\r");
        return FALSE;
      }
    }
  }			
  TRACE_INFO("........ => OK\n\r");
  return TRUE;
}

//*----------------------------------------------------------------------------
//* \fn    AT91F_BasicTestSuite
//* \brief
//*----------------------------------------------------------------------------
void AT91F_BasicTestSuite(void)
{
  // ECB
  TRACE_INFO("\n\r1a. ECB PDC Encryption      ");
  AT91F_AES_PDC_Mode(AT91C_AES_OPMOD_ECB,0,AT91C_AES_CIPHER,ECB_ENCRYPT_OFFSET);
  TRACE_INFO("1b. ECB PDC Decryption      ");
  AT91F_AES_PDC_Mode(AT91C_AES_OPMOD_ECB,0,0,ECB_DECRYPT_OFFSET);

  TRACE_INFO("1c. ECB Manual Encryption   ");
  AT91F_AES_Manual_Auto_Mode(AT91C_AES_OPMOD_ECB,AT91C_AES_SMOD_MANUAL,AT91C_AES_CIPHER,ECB_ENCRYPT_OFFSET);
  TRACE_INFO("1d. ECB Manual Decryption   ");
  AT91F_AES_Manual_Auto_Mode(AT91C_AES_OPMOD_ECB,AT91C_AES_SMOD_MANUAL,0,ECB_DECRYPT_OFFSET);

  TRACE_INFO("1e. ECB Auto Encryption     ");
  AT91F_AES_Manual_Auto_Mode(AT91C_AES_OPMOD_ECB,AT91C_AES_SMOD_AUTO,AT91C_AES_CIPHER,ECB_ENCRYPT_OFFSET);
  TRACE_INFO("1f. ECB Auto Decryption     ");
  AT91F_AES_Manual_Auto_Mode(AT91C_AES_OPMOD_ECB,AT91C_AES_SMOD_AUTO,0,ECB_DECRYPT_OFFSET);
		
  // CBC
  TRACE_INFO("\n\r2a. CBC PDC Encryption      ");
  AT91F_AES_PDC_Mode(AT91C_AES_OPMOD_CBC,0,AT91C_AES_CIPHER,CBC_ENCRYPT_OFFSET);
  TRACE_INFO("2b. CBC PDC Decryption      ");
  AT91F_AES_PDC_Mode(AT91C_AES_OPMOD_CBC,0,0,CBC_DECRYPT_OFFSET);

  TRACE_INFO("2c. CBC Manual Encryption   ");
  AT91F_AES_Manual_Auto_Mode(AT91C_AES_OPMOD_CBC,AT91C_AES_SMOD_MANUAL,AT91C_AES_CIPHER,CBC_ENCRYPT_OFFSET);
  TRACE_INFO("2d. CBC Manual Decryption   ");
  AT91F_AES_Manual_Auto_Mode(AT91C_AES_OPMOD_CBC,AT91C_AES_SMOD_MANUAL,0,CBC_DECRYPT_OFFSET);

  TRACE_INFO("2e. CBC Auto Encryption     ");
  AT91F_AES_Manual_Auto_Mode(AT91C_AES_OPMOD_CBC,AT91C_AES_SMOD_AUTO,AT91C_AES_CIPHER,CBC_ENCRYPT_OFFSET);
  TRACE_INFO("2f. CBC Auto Decryption     ");
  AT91F_AES_Manual_Auto_Mode(AT91C_AES_OPMOD_CBC,AT91C_AES_SMOD_AUTO,0,CBC_DECRYPT_OFFSET);

  // OFB
  TRACE_INFO("\n\r3a. OFB PDC Encryption      ");
  AT91F_AES_PDC_Mode(AT91C_AES_OPMOD_OFB,0,AT91C_AES_CIPHER,OFB_ENCRYPT_OFFSET);
  TRACE_INFO("3b. OFB PDC Decryption      ");
  AT91F_AES_PDC_Mode(AT91C_AES_OPMOD_OFB,0,0,OFB_DECRYPT_OFFSET);

  TRACE_INFO("3c. OFB Manual Encryption   ");
  AT91F_AES_Manual_Auto_Mode(AT91C_AES_OPMOD_OFB,AT91C_AES_SMOD_MANUAL,AT91C_AES_CIPHER,OFB_ENCRYPT_OFFSET);
  TRACE_INFO("3d. OFB Manual Decryption   ");
  AT91F_AES_Manual_Auto_Mode(AT91C_AES_OPMOD_OFB,AT91C_AES_SMOD_MANUAL,0,OFB_DECRYPT_OFFSET);

  TRACE_INFO("3e. OFB Auto Encryption     ");
  AT91F_AES_Manual_Auto_Mode(AT91C_AES_OPMOD_OFB,AT91C_AES_SMOD_AUTO,AT91C_AES_CIPHER,OFB_ENCRYPT_OFFSET);
  TRACE_INFO("3f. OFB Auto Decryption     ");
  AT91F_AES_Manual_Auto_Mode(AT91C_AES_OPMOD_OFB,AT91C_AES_SMOD_AUTO,0,OFB_DECRYPT_OFFSET);

  // CFB128
  TRACE_INFO("\n\r4a. CFB128 PDC Encryption      ");
  AT91F_AES_PDC_Mode(AT91C_AES_OPMOD_CFB,AT91C_AES_CFBS_128_BIT,AT91C_AES_CIPHER,CFB128_ENCRYPT_OFFSET);
  TRACE_INFO("4b. CFB128 PDC Decryption      ");
  AT91F_AES_PDC_Mode(AT91C_AES_OPMOD_CFB,AT91C_AES_CFBS_128_BIT,0,CFB128_DECRYPT_OFFSET);

  TRACE_INFO("4c. CFB128 Manual Encryption   ");
  AT91F_AES_Manual_Auto_Mode(AT91C_AES_OPMOD_CFB,AT91C_AES_SMOD_MANUAL,AT91C_AES_CIPHER,CFB128_ENCRYPT_OFFSET);
  TRACE_INFO("4d. CFB128 Manual Decryption   ");
  AT91F_AES_Manual_Auto_Mode(AT91C_AES_OPMOD_CFB,AT91C_AES_SMOD_MANUAL,0,CFB128_DECRYPT_OFFSET);

  TRACE_INFO("4e. CFB128 Auto Encryption     ");
  AT91F_AES_Manual_Auto_Mode(AT91C_AES_OPMOD_CFB,AT91C_AES_SMOD_AUTO,AT91C_AES_CIPHER,CFB128_ENCRYPT_OFFSET);
  TRACE_INFO("4f. CFB128 Auto Decryption     ");
  AT91F_AES_Manual_Auto_Mode(AT91C_AES_OPMOD_CFB,AT91C_AES_SMOD_AUTO,0,CFB128_DECRYPT_OFFSET);

  // CFB8
  TRACE_INFO("\n\r5a. CFB8 PDC Encryption      ");
  AT91F_AES_PDC_Mode(AT91C_AES_OPMOD_CFB,AT91C_AES_CFBS_8_BIT,AT91C_AES_CIPHER,CFB8_ENCRYPT_OFFSET);
  TRACE_INFO("5b. CFB8 PDC Decryption      ");
  AT91F_AES_PDC_Mode(AT91C_AES_OPMOD_CFB,AT91C_AES_CFBS_8_BIT,0,CFB8_DECRYPT_OFFSET);

  TRACE_INFO("5c. CFB8 Manual Encryption   ");
  AT91C_AES_Manual_Auto_Mode_CFB8(AT91C_AES_SMOD_MANUAL,AT91C_AES_CIPHER,CFB8_ENCRYPT_OFFSET);
  TRACE_INFO("5d. CFB8 Manual Decryption   ");
  AT91C_AES_Manual_Auto_Mode_CFB8(AT91C_AES_SMOD_MANUAL,0,CFB8_DECRYPT_OFFSET);

  TRACE_INFO("5e. CFB8 Auto Encryption     ");
  AT91C_AES_Manual_Auto_Mode_CFB8(AT91C_AES_SMOD_AUTO,AT91C_AES_CIPHER,CFB8_ENCRYPT_OFFSET);
  TRACE_INFO("5f. CFB8 Auto Decryption     ");
  AT91C_AES_Manual_Auto_Mode_CFB8(AT91C_AES_SMOD_AUTO,0,CFB8_DECRYPT_OFFSET);

  // CTR
  TRACE_INFO("\n\r6a. CTR PDC Encryption      ");
  AT91F_AES_PDC_Mode(AT91C_AES_OPMOD_CTR,0,AT91C_AES_CIPHER,CTR_ENCRYPT_OFFSET);
  TRACE_INFO("6b. CTR PDC Decryption      ");
  AT91F_AES_PDC_Mode(AT91C_AES_OPMOD_CTR,0,0,CTR_DECRYPT_OFFSET);

  TRACE_INFO("6c. CTR Manual Encryption   ");
  AT91F_AES_Manual_Auto_Mode(AT91C_AES_OPMOD_CTR,AT91C_AES_SMOD_MANUAL,AT91C_AES_CIPHER,CTR_ENCRYPT_OFFSET);
  TRACE_INFO("6d. CTR Manual Decryption   ");
  AT91F_AES_Manual_Auto_Mode(AT91C_AES_OPMOD_CTR,AT91C_AES_SMOD_MANUAL,0,CTR_DECRYPT_OFFSET);

  TRACE_INFO("6e. CTR Auto Encryption     ");
  AT91F_AES_Manual_Auto_Mode(AT91C_AES_OPMOD_CTR,AT91C_AES_SMOD_AUTO,AT91C_AES_CIPHER,CTR_ENCRYPT_OFFSET);
  TRACE_INFO("6f. CTR Auto Decryption     ");
  AT91F_AES_Manual_Auto_Mode(AT91C_AES_OPMOD_CTR,AT91C_AES_SMOD_AUTO,0,CTR_DECRYPT_OFFSET);

  TRACE_INFO("\n\rEnd of Tests\n\r");
  return;
}