build_xl.mak
来自「pli_handbook_examples_pc verilog hdl 与C」· MAK 代码 · 共 24 行
MAK
24 行
#
# sample NMAKE makefile to make libpli.dll for Cadence Verilog-XL, using VisualC++ on Windows
#
CDS_INST_DIR=c:/progra~1/cds
SOURCES = \
# sci_alu_comb_calltf_tf.c \
# sci_alu_comb_misctf_tf.c \
# sci_alu_sequential_tf.c \
# sci_alu_synchronized_tf.c \
# sci_alu_latched_tf.c \
sci_alu_with_delays_tf.c \
veriuser_XL.c
OBJS = $(SOURCES:.c=.obj)
CFLAGS = -DMSC -DWIN32 -I$(CDS_INST_DIR)/tools/verilog/include -MD -O2
.c.obj:
$(CC) $(CFLAGS) -c $<
libpli.dll: $(OBJS)
link -dll /out:$@ $(OBJS) $(CDS_INST_DIR)/tools/verilog/lib/verilog.lib
⌨️ 快捷键说明
复制代码Ctrl + C
搜索代码Ctrl + F
全屏模式F11
增大字号Ctrl + =
减小字号Ctrl + -
显示快捷键?