build_xl.mak

pli_handbook_examples_pc verilog hdl 与C的接口的典型例子

#
# sample NMAKE makefile to make libpli.dll for Cadence Verilog-XL, using VisualC++ on Windows
#

CDS_INST_DIR=c:/progra~1/cds

SOURCES = \
          invoke_commands_acc.c \
          list_nets_acc.c \
          fetch_values_acc.c \
          read_vecval_acc.c \
          func_72bit_acc.c \
          timescale_info_acc.c \
          list_prim_delays_acc.c \
          list_path_delays_acc.c \
          mipd_delays_acc.c \
          list_parameters_acc.c \
          veriuser_XL.c

OBJS = $(SOURCES:.c=.obj)
CFLAGS = -DMSC -DWIN32 -I$(CDS_INST_DIR)/tools/verilog/include -MD -O2

.c.obj:
	$(CC) $(CFLAGS) -c $<

libpli.dll: $(OBJS)
	link -dll /out:$@ $(OBJS) $(CDS_INST_DIR)/tools/verilog/lib/verilog.lib