div8u.s

来自「avr的icc编译器的源代码」· S 代码 · 共 39 行

;
; This subroutine divides the two register variables r16 (dividend) and
; r17 (divisor). The result is placed in r16. If mod is called the remainder
; is the result.

; Low registers used:  1 (r15,r14)
; High registers used: 3 (r16,r17,r18)

mod8u::
  set
  rjmp xdiv8u
div8u::	
  clt
xdiv8u::
  st	-y,R18
  st	-y,R15
  st	-y,R14
  clr	r15	; zero-extend the dividend
  clr	r14	; clear remainder
  ldi	r18,16	; init loop counter
d8u_1:
  lsl	r16	; shift dividend/quotient left
  rol	r15	; shift dividend into remainder
  rol	r14	; shift dividend into remainder
  cp	r14,r17 ; is remainder < divisor?
  brcs	d8u_2	; branch if yes
  sub	r14,r17 ; remainder -= divisor
  inc	r16	; quotient++, lsb = 0
d8u_2:
  dec	r18	; decrement counter
  brne	d8u_1	; if not done
  brtc	nocopy8 ; if T is set, then copy the remainder R15 to R16
  mov	r16,r14
nocopy8:
  ld R14,Y+
  ld R15,Y+
  ld R18,Y+
  ret