l7205-hardware.h

Linux2.4.20针对三星公司的s3c2440内核基础上的一些设备驱动代码

#define USBF_CONTROL_RWAK               0x00000008

#define USBF_CONTROL_F0CLR              0x00000010
#define USBF_CONTROL_F1CLR              0x00000020
#define USBF_CONTROL_F2CLR              0x00000040
#define USBF_CONTROL_F3CLR              0x00000080

#define USBF_CONTROL_F1MOD              0x00000300

#define USBF_CONTROL_F1MOD_DMA          0x00000100
#define USBF_CONTROL_F1MOD_IO           0x00000200

#define USBF_CONTROL_F2MOD              0x00000c00

#define USBF_CONTROL_F2MOD_DMA          0x00000400
#define USBF_CONTROL_F2MOD_IO           0x00000800

#define USBF_CONTROL_STAL0              0x00001000
#define USBF_CONTROL_STAL1              0x00002000
#define USBF_CONTROL_STAL2              0x00004000
#define USBF_CONTROL_STAL3              0x00008000

#define USBF_CONTROL_F0L                0x00010000
#define USBF_CONTROL_F2L                0x00020000
#define USBF_CONTROL_F3L                0x00040000



/*
 * Status Register - USBF_STATUS
 */

#define USBF_STATUS_SUS                 0x00000001
#define USBF_STATUS_F0ERR               0x00000002
#define USBF_STATUS_F1OR                0x00000004
#define USBF_STATUS_F1ERR               0x00000008

#define USBF_STATUS_F2UR                0x00000010
#define USBF_STATUS_F2ERR               0x00000020
#define USBF_STATUS_F3ERR               0x00000040
#define USBF_STATUS_GRSM                0x00000080

#define USBF_STATUS_F0RQ                0x00000100
#define USBF_STATUS_F1RQ                0x00000200
#define USBF_STATUS_F2RQ                0x00000400
#define USBF_STATUS_F3RQ                0x00000800

#define USBF_STATUS_SOF                 0x00001000
#define USBF_STATUS_HRST                0x00002000
#define USBF_STATUS_F1NE                0x00004000
#define USBF_STATUS_F2NF                0x00008000

#define USBF_STATUS_F2NE                0x00010000
#define USBF_STATUS_F2BSY               0x00020000
#define USBF_STATUS_VCCMD               0x00040000


/*
 * Raw Status Register - USBF_RAWSTATUS
 */

#define USBF_RAWSTATUS_RSUS             0x00000001
#define USBF_RAWSTATUS_RF0ERR           0x00000002
#define USBF_RAWSTATUS_RF1OR            0x00000004
#define USBF_RAWSTATUS_RF1ERR           0x00000008

#define USBF_RAWSTATUS_RF2UR            0x00000010
#define USBF_RAWSTATUS_RF2ERR           0x00000020
#define USBF_RAWSTATUS_RF3ERR           0x00000040
#define USBF_RAWSTATUS_RGRSM            0x00000080

#define USBF_RAWSTATUS_RF0RQ            0x00000100
#define USBF_RAWSTATUS_RF1RQ            0x00000200
#define USBF_RAWSTATUS_RF2RQ            0x00000400
#define USBF_RAWSTATUS_RF3RQ            0x00000800

#define USBF_RAWSTATUS_RSOF             0x00001000
#define USBF_RAWSTATUS_RHRST            0x00002000


/*
 * Interrupt Enable Register - USBF_INTENA
 */

#define USBF_INTENA_ENSUS               0x00000001
#define USBF_INTENA_ENF0ERR             0x00000002
#define USBF_INTENA_ENF1OR              0x00000004
#define USBF_INTENA_ENF1ERR             0x00000008

#define USBF_INTENA_ENF2UR              0x00000010
#define USBF_INTENA_ENF2ERR             0x00000020
#define USBF_INTENA_ENF3ERR             0x00000040
#define USBF_INTENA_ENGRSM              0x00000080

#define USBF_INTENA_ENF0RQ              0x00000100
#define USBF_INTENA_ENF1RQ              0x00000200
#define USBF_INTENA_ENF2RQ              0x00000400
#define USBF_INTENA_ENF3RQ              0x00000800

#define USBF_INTENA_ENSOF               0x00001000
#define USBF_INTENA_ENHRST              0x00002000

/*
 * Interrupt Disable Register - USBF_INTDIS
 */

#define USBF_INTDIS_DNSUS               0x00000001
#define USBF_INTDIS_DNF0ERR             0x00000002
#define USBF_INTDIS_DNF1OR              0x00000004
#define USBF_INTDIS_DNF1ERR             0x00000008

#define USBF_INTDIS_DNF2UR              0x00000010
#define USBF_INTDIS_DNF2ERR             0x00000020
#define USBF_INTDIS_DNF3ERR             0x00000040
#define USBF_INTDIS_DNGRSM              0x00000080

#define USBF_INTDIS_DNF0RQ              0x00000100
#define USBF_INTDIS_DNF1RQ              0x00000200
#define USBF_INTDIS_DNF2RQ              0x00000400
#define USBF_INTDIS_DNF3RQ              0x00000800

#define USBF_INTDIS_DNSOF               0x00001000
#define USBF_INTDIS_DNHRST              0x00002000

/*
 * Interrupt Clear Register - USBF_INTCLR
 */

#define USBF_INTCLR_CSUS                0x00000001
#define USBF_INTCLR_CF0ERR              0x00000002
#define USBF_INTCLR_CF1OR               0x00000004
#define USBF_INTCLR_CF1ERR              0x00000008

#define USBF_INTCLR_CF2UR               0x00000010
#define USBF_INTCLR_CF2ERR              0x00000020
#define USBF_INTCLR_CF3ERR              0x00000040
#define USBF_INTCLR_CGRSM               0x00000080

#define USBF_INTCLR_CF0RQ               0x00000100
#define USBF_INTCLR_CF1RQ               0x00000200
#define USBF_INTCLR_CF2RQ               0x00000400
#define USBF_INTCLR_CF3RQ               0x00000800

#define USBF_INTCLR_CSOF                0x00001000
#define USBF_INTCLR_CHRST               0x00002000

/*
 * Endpoint 0 Buffer Register - USBF_ENDPTBUF0
 */

#define USBF_ENDPTBUF0_EP0MSIZE         0x00000001
#define USBF_ENDPTBUF0_EP0MSIZE_8       0x00000000
#define USBF_ENDPTBUF0_EP0MSIZE_16      0x00000001

/*
 * Endpoint 1 Buffer Register - USBF_ENDPTBUF1
 */

#define USBF_ENDPTBUF1_EP1MSIZE         0x000003ff

#define USBF_ENDPTBUF1_EP1TYPE          0x00000c00
#define USBF_ENDPTBUF1_EP1TYPE_BULK     0x00000800

#define USBF_ENDPTBUF1_EP1ASET          0x00003000
#define USBF_ENDPTBUF1_EP1XFCE          0x0000c000

/*
 * Endpoint 2 Buffer Register - USBF_ENDPTBUF2
 */

#define USBF_ENDPTBUF2_EP2MSIZE         0x000003ff

#define USBF_ENDPTBUF2_EP2TYPE          0x00000c00
#define USBF_ENDPTBUF2_EP2TYPE_BULK     0x00000800

#define USBF_ENDPTBUF2_EP2ASET          0x00003000
#define USBF_ENDPTBUF2_EP2XFCE          0x0000c000

/*
 * Endpoint 3 Buffer Register - USBF_ENDPTBUF3
 */

#define USBF_ENDPTBUF3_EP3TYPE          0x00000003
#define USBF_ENDPTBUF3_EP3TYPE_INT      0x00000003

#define USBF_ENDPTBUF3_EP3ASET          0x0000000c
#define USBF_ENDPTBUF3_EP3XFCE          0x00000030

/*
 * String 0 Register - USBF_STRINGBUF0
 */

#define USBF_STRINGBUF0_ST0ADR          0x000001ff
#define USBF_STRINGBUF0_ST0LNTH         0x0001fe00

/*
 * String 1 Register - USBF_STRINGBUF1
 */

#define USBF_STRINGBUF1_ST1ADR          0x000001ff
#define USBF_STRINGBUF1_ST1LNTH         0x0001fe00

/*
 * String 2 Register - USBF_STRINGBUF2
 */

#define USBF_STRINGBUF2_ST2ADR          0x000001ff
#define USBF_STRINGBUF2_ST2LNTH         0x0001fe00

/*
 * String 3 Register - USBF_STRINGBUF3
 */

#define USBF_STRINGBUF3_ST3ADR          0x000001ff
#define USBF_STRINGBUF3_ST3LNTH         0x0001fe00

/*
 * String 4 Register - USBF_STRINGBUF4
 */

#define USBF_STRINGBUF4_ST4ADR          0x000001ff
#define USBF_STRINGBUF4_ST4LNTH         0x0001fe00

/*
 * FIFO0 Byte Count Register - USBF_F0BCNT
 */

#define USBF_F0BCNT_F0BCNT              0x0000001f

/*
 * FIFO1 Byte Count Register - USBF_F1BCNT
 */

#define USBF_F1BCNT_F1BCNT              0x0000003f

/*
 * FIFO1 Time Out Register - USBF_F1TOUT
 */

#define USBF_F1TOUT_F1TOUT              0x0000000f

/*
 * FIFO2 Byte Count Register - USBF_F2BCNT
 */

#define USBF_F2BCNT_F2BCNT              0x0000003f

/*
 * FIFO3 Byte Count Register - USBF_F3BCNT
 */

#define USBF_F3BCNT_F3BCNT              0x0000003f




/*
         
                0       0000 0001
                1       0000 0002
                2       0000 0004
                3       0000 0008

                4       0000 0010
                5       0000 0020
                6       0000 0040
                7       0000 0080

                8       0000 0100
                9       0000 0200
                10      0000 0400
                11      0000 0800

                12      0000 1000
                13      0000 2000
                14      0000 4000
                15      0000 8000

                16      0001 0000
                17      0002 0000
                18      0004 0000
                19      0008 0000

                20      0010 0000
                21      0020 0000
                22      0040 0000
                23      0080 0000

                24      0100 0000
                25      0200 0000
                26      0400 0000
                27      0800 0000

                28      1000 0000
                29      2000 0000
                30      4000 0000
                31      8000 0000


                0 0000  4 0100  8 1000  c 1100
                1 0001  5 0101  9 1001  d 1101
                2 0010  6 0110  a 1010  e 1110
                3 0100  7 0111  b 1011  f 1111



              0000 0000 0000 0000 0000 0000 0000 0000
                 |    |    |    |    |    |    |    |
                28   24   20   16   12    8    4    0

*/