s3c2440_usb.h

linux2.4.20下的针对三星公司的s3c2410的usb模块驱动代码

/*
 * Samsung Electronics.
 * s3c2440a_usb.h
 *
 * Public interface to the s3c2440a USB core. For use by client modules
 * like usb-eth and usb-char.
 *
 * derived from pxa_usb.h, s3c2410_usb.h
 *
 */

#ifndef _S3C2440_USB_H
#define _S3C2440_USB_H
#include <asm/byteorder.h>

/* ------------------ ---------------- S3C2440.h */

/* 
 * USB Device
 */
#define bUD(Nb)		__REG(0x52000000 + (Nb))
#define UD_FUNC		bUD(0x140) // Function address  (B)
#define UD_PWR		bUD(0x144) // Power management (B)
#define UD_INT		bUD(0x148) // Endpoint interrupt pending/clear (B)
#define UD_USBINT	bUD(0x158) // USB interrupt pending/clear (B)
#define UD_INTE		bUD(0x15c) // Endpoint interrupt enable (B)
#define UD_USBINTE	bUD(0x16c) // USB interrupt enable (B)
#define UD_FRAMEL	bUD(0x170) // Frame number low-byte (B)
#define UD_FRAMEH	bUD(0x174) // Frame number high-byte (B)
#define UD_INDEX	bUD(0x178) // Index (B)
#define UD_FIFO0	bUD(0x1c0) // Endpoint 0 FIFO (B)
#define UD_FIFO1	bUD(0x1c4) // Endpoint 1 FIFO (B)
#define UD_FIFO2	bUD(0x1c8) // Endpoint 2 FIFO (B)
#define UD_FIFO3	bUD(0x1cc) // Endpoint 3 FIFO (B)
#define UD_FIFO4	bUD(0x1d0) // Endpoint 4 FIFO (B)
#define UD_DMACON1	bUD(0x200) // Endpoint 1 DMA control (B)
#define UD_DMAUC1	bUD(0x204) // Endpoint 1 DMA unit counter (B)
#define UD_DMAFC1	bUD(0x208) // Endpoint 1 DMA FIFO counter
#define UD_DMATCL1	bUD(0x20c) // Endpoint 1 DMA Transfer counter low-byte
#define UD_DMATCM1	bUD(0x210) // Endpoint 1 DMA Transfer counter middle-byte
#define UD_DMATCH1	bUD(0x214) // Endpoint 1 DMA Transfer counter high-byte
#define UD_DMACON2	bUD(0x218) // Endpoint 2 DMA control (B)
#define UD_DMAUC2	bUD(0x21c) // Endpoint 2 DMA unit counter (B)
#define UD_DMAFC2	bUD(0x220) // Endpoint 2 DMA FIFO counter
#define UD_DMATCL2	bUD(0x224) // Endpoint 2 DMA Transfer counter low-byte
#define UD_DMATCM2	bUD(0x228) // Endpoint 2 DMA Transfer counter middle-byte
#define UD_DMATCH2	bUD(0x22c) // Endpoint 2 DMA Transfer counter high-byte
#define UD_DMACON3	bUD(0x240) // Endpoint 3 DMA control (B)
#define UD_DMAUC3	bUD(0x244) // Endpoint 3 DMA unit counter (B)
#define UD_DMAFC3	bUD(0x248) // Endpoint 3 DMA FIFO counter
#define UD_DMATCL3	bUD(0x24c) // Endpoint 3 DMA Transfer counter low-byte
#define UD_DMATCM3	bUD(0x250) // Endpoint 3 DMA Transfer counter middle-byte
#define UD_DMATCH3	bUD(0x254) // Endpoint 3 DMA Transfer counter high-byte
#define UD_DMACON4	bUD(0x258) // Endpoint 4 DMA control (B)
#define UD_DMAUC4	bUD(0x25c) // Endpoint 4 DMA unit counter (B)
#define UD_DMAFC4	bUD(0x260) // Endpoint 4 DMA FIFO counter
#define UD_DMATCL4	bUD(0x264) // Endpoint 4 DMA Transfer counter low-byte
#define UD_DMATCM4	bUD(0x268) // Endpoint 4 DMA Transfer counter middle-byte
#define UD_DMATCH4	bUD(0x26c) // Endpoint 4 DMA Transfer counter high-byte
#define UD_MAXP		bUD(0x180) // Endpoint MAX Packet
#define UD_ICSR1	bUD(0x184) // EP In control status register 1 (B)
#define UD_ICSR2	bUD(0x188) // EP In control status register 2 (B)
#define UD_OCSR1	bUD(0x190) // EP Out control status register 1 (B)
#define UD_OCSR2	bUD(0x194) // EP Out control status register 2 (B)
#define UD_OFCNTL	bUD(0x198) // EP Out Write counter low-byte (B)
#define UD_OFCNTH	bUD(0x19c) // EP Out Write counter high-byte (B)

#define UD_FUNC_UD	(1 << 7)
#define fUD_FUNC_ADDR	Fld(7,0)	/* USB Device Addr. assigned by host */
#define UD_FUNC_ADDR	FMsk(fUD_FUNC_ADDR)

#define UD_PWR_ISOUP	(1<<7) // R/W
#define UD_PWR_RESET	(1<<3) // R
#define UD_PWR_RESUME	(1<<2) // R/W
#define UD_PWR_SUSPND	(1<<1) // R
#define UD_PWR_ENSUSPND	(1<<0) // R/W

#define UD_PWR_DEFAULT	0x00

#define UD_INT_EP4	(1<<4)	// R/W (clear only)
#define UD_INT_EP3	(1<<3)	// R/W (clear only)
#define UD_INT_EP2	(1<<2)	// R/W (clear only)
#define UD_INT_EP1	(1<<1)	// R/W (clear only)
#define UD_INT_EP0	(1<<0)	// R/W (clear only)

#define UD_USBINT_RESET	(1<<2) // R/W (clear only)
#define UD_USBINT_RESUM	(1<<1) // R/W (clear only)
#define UD_USBINT_SUSPND (1<<0) // R/W (clear only)

#define UD_INTE_EP4	(1<<4) // R/W
#define UD_INTE_EP3	(1<<3) // R/W
#define UD_INTE_EP2	(1<<2) // R/W
#define UD_INTE_EP1	(1<<1) // R/W
#define UD_INTE_EP0	(1<<0) // R/W

#define UD_USBINTE_RESET	(1<<2) // R/W
#define UD_USBINTE_SUSPND	(1<<0) // R/W

#define fUD_FRAMEL_NUM	Fld(8,0) // R
#define UD_FRAMEL_NUM	FMsk(fUD_FRAMEL_NUM)

#define fUD_FRAMEH_NUM	Fld(8,0) // R
#define UD_FRAMEH_NUM	FMsk(fUD_FRAMEH_NUM)

#define UD_INDEX_EP0	(0x00)
#define UD_INDEX_EP1	(0x01) // ??
#define UD_INDEX_EP2	(0x02) // ??
#define UD_INDEX_EP3	(0x03) // ??
#define UD_INDEX_EP4	(0x04) // ??

#define UD_ICSR1_CLRDT	(1<<6)   // R/W
#define UD_ICSR1_SENTSTL (1<<5)  // R/W (clear only)
#define UD_ICSR1_SENDSTL (1<<4)  // R/W
#define UD_ICSR1_FFLUSH (1<<3)  // W	(set only)
#define UD_ICSR1_UNDRUN  (1<<2)  // R/W (clear only)
#define UD_ICSR1_PKTRDY	 (1<<0)  // R/W (set only)

#define UD_ICSR2_AUTOSET (1<<7) // R/W
#define UD_ICSR2_ISO	 (1<<6)	// R/W
#define UD_ICSR2_MODEIN	 (1<<5) // R/W
#define UD_ICSR2_DMAIEN	 (1<<4) // R/W

#define UD_OCSR1_CLRDT	(1<<7) // R/W
#define UD_OCSR1_SENTSTL	(1<<6)	// R/W (clear only)
#define UD_OCSR1_SENDSTL	(1<<5)	// R/W
#define UD_OCSR1_FFLUSH		(1<<4) // R/W
#define UD_OCSR1_DERROR		(1<<3) // R
#define UD_OCSR1_OVRRUN		(1<<2) // R/W (clear only)
#define UD_OCSR1_PKTRDY		(1<<0) // R/W (clear only)

#define UD_OCSR2_AUTOCLR	(1<<7) // R/W
#define UD_OCSR2_ISO		(1<<6) // R/W
#define UD_OCSR2_DMAIEN		(1<<5) // R/W

#define fUD_FIFO_DATA	Fld(8,0) // R/W
#define UD_FIFO0_DATA	FMsk(fUD_FIFO_DATA)
#define UD_FIFO1_DATA	FMsk(fUD_FIFO_DATA)
#define UD_FIFO2_DATA	FMsk(fUD_FIFO_DATA)
#define UD_FIFO3_DATA	FMsk(fUD_FIFO_DATA)
#define UD_FIFO4_DATA	FMsk(fUD_FIFO_DATA)

#define UD_MAXP_8	(1<<0)
#define UD_MAXP_16	(1<<1)
#define UD_MAXP_32	(1<<2)
#define UD_MAXP_64	(1<<3)
#define UD_MAXP_128 (FIXME)

#define fUD_OFCNT_DATA	Fld(8,0)
#define UD_OFCNTL_DATA	FMsk(fUD_OFCNT_DATA) //R
#define UD_OFCNTH_DATA	FMsk(fUD_OFCNT_DATA) //R

#define UD_DMACONx_INRUNOB	(1<<7) // R
#define fUD_DMACON_STATE	Fld(3,4) // R
#define UD_DMACONx_STATE	FMsk(fUD_DMACON_STATE) // R/W
#define UD_DMACONx_DEMEN	(1<<3) // R/W
#define UD_DMACONx_ORUN		(1<<2) // R/W
#define UD_DMACONx_IRUN		(1<<1) // R/W
#define UD_DMACONx_DMAMODE	(1<<0) // R/W

#define fUD_DMAUC_DATA	Fld(8,0)
#define UD_DMAUCx_DATA	FMsk(fUD_DMAUC_DATA)

#define fUD_DMAFC_DATA	Fld(8,0)
#define UD_DMAFCx_DATA	FMsk(fUD_DMAFC_DATA)

#define fUD_DMATC_DATA	Fld(8,0)
#define UD_DMATCL_DATA	FMsk(fUD_DMATC_DATA)
#define UD_DMATCM_DATA	FMsk(fUD_DMATC_DATA)
#define UD_DMATCH_DATA	FMsk(fUD_DMATC_DATA)

#define EP0_CSR_OPKRDY	(1<<0)
#define EP0_CSR_IPKRDY	(1<<1)
#define EP0_CSR_SENTSTL	(1<<2)
#define EP0_CSR_DE	(1<<3)
#define EP0_CSR_SE	(1<<4)
#define EP0_CSR_SENDSTL	(1<<5)
#define EP0_CSR_SOPKTRDY (1<<6)
#define EP0_CSR_SSE	(1<<7)
/* ---------------------------------------------*/

#define EP0_FIFO_SIZE	8
#define EP1_FIFO_SIZE	64
#define EP2_FIFO_SIZE	64

#if defined(CONFIG_S3C2440_USB_CDC_ENCM) || defined(CONFIG_S3C2440_USB_CDC_ENCM_MODULE)

/* Define this if there is any support for alternate interface settings */
#undef CDC_ALTERNATE_INTERFACE

/* CDC Device Class Code */ 
#define CDC_DEVICE_CLASS			0x02

/* CDC Interface Class and Subclass Codes */
#define CDC_COMM_INTERFACE_CLASS		0x02
#define CDC_COMM_INTERFACE_SUBCLASS_ENCM	0x06
#define CDC_DATA_INTERFACE_CLASS		0x0a

/* CDC Functional Descriptor Types */
#define CDC_CS_INTERFACE			0x24
#define CDC_CS_ENDPOINT				0x25

/* CDC Functional Descriptor types */ 
#define CDC_DESC_SUBTYPE_HEADER			0x00
#define CDC_DESC_SUBTYPE_UNION			0x06
#define CDC_DESC_SUBTYPE_ETHER			0x0f

/* CDC Spec Version */
#define CDC_CLASS_BCD_VERSION			0x0110

/* CDC ENCM Request Types */
#define CDC_ENCM_SEND_ENCAPSULATED_COMMAND		0x00
#define CDC_ENCM_GET_ENCAPSULATED_RESPONSE		0x01
#define CDC_ENCM_SET_ETHERNET_MULTICAST_FILTERS		0x40
#define CDC_ENCM_SET_ETHERNET_PM_PATTERN_FILTER		0x41
#define CDC_ENCM_GET_ETHERNET_PM_PATTERN_FILTER		0x42
#define CDC_ENCM_SET_ETHERNET_PACKET_FILTER		0x43
#define CDC_ENCM_GET_ETHERNET_STATISTIC			0x44

#endif /* CONFIG_S3C2440_USB_CDC_ENCM || CONFIG_S3C2440_USB_CDC_ENCM_MODULE */

typedef void (*usb_callback_t)(int flag, int size);

/* in usb_ctl.c (see also descriptor methods at bottom of file) */

// Open the USB client for client and initialize data structures
// to default values, but _do not_ start UDC.
int elfin_usb_open( const char * client_name );

// Start UDC running
int elfin_usb_start( void );

// Immediately stop udc, fire off completion routines w/-EINTR
int elfin_usb_stop( void ) ;

// Disconnect client from usb core
int elfin_usb_close( void ) ;

// set notify callback for when core reaches configured state
// return previous pointer (if any)
typedef void (*usb_notify_t)(void);
usb_notify_t elfin_set_configured_callback( usb_notify_t callback );

/* in usb_send.c */
int elfin_usb_xmitter_avail( void );
int elfin_usb_send(char *buf, int len, usb_callback_t callback);
void elfin_usb_send_reset(void);