pll_init.lst

ucos_ii在mini2440上的移植KEIL编译环境

ARM Macro Assembler    Page 1 


    1 00000000         ;************************************
    2 00000000         ;MPLL和UPLL参数配置
    3 00000000         ;***********************************
    4 00000000         
    5 00000000                 AREA             PLL, CODE, READONLY
    6 00000000                 ENTRY
    7 00000000                 CODE32
    8 00000000                 GET              2440addr.inc
    1 00000000         ;=======================================================
                       =============
    2 00000000         ; File Name : 2440addr.a
    3 00000000         ; Function  : S3C2440 Define Address Register (Assembly)
                       
    4 00000000         ; Date      : March 27, 2002
    5 00000000         ; Revision : Programming start (February 18,2002) -> SOP
                       
    6 00000000         ; Revision : 03.11.2003 ver 0.0 Attatched for 2440
    7 00000000         ;=======================================================
                       =============
    8 00000000         
    9 00000000                 GBLL             BIG_ENDIAN__
   10 00000000 FALSE    
                       BIG_ENDIAN__
                               SETL             {FALSE}
   11 00000000         
   12 00000000         ;=================
   13 00000000         ; Memory control
   14 00000000         ;=================
   15 00000000 48000000 
                       BWSCON  EQU              0x48000000  ;Bus width & wait s
                                                            tatus
   16 00000000 48000004 
                       BANKCON0
                               EQU              0x48000004  ;Boot ROM control
   17 00000000 48000008 
                       BANKCON1
                               EQU              0x48000008  ;BANK1 control
   18 00000000 4800000C 
                       BANKCON2
                               EQU              0x4800000c  ;BANK2 control
   19 00000000 48000010 
                       BANKCON3
                               EQU              0x48000010  ;BANK3 control
   20 00000000 48000014 
                       BANKCON4
                               EQU              0x48000014  ;BANK4 control
   21 00000000 48000018 
                       BANKCON5
                               EQU              0x48000018  ;BANK5 control
   22 00000000 4800001C 
                       BANKCON6
                               EQU              0x4800001c  ;BANK6 control
   23 00000000 48000020 
                       BANKCON7
                               EQU              0x48000020  ;BANK7 control
   24 00000000 48000024 
                       REFRESH EQU              0x48000024  ;DRAM/SDRAM refresh
                                                            
   25 00000000 48000028 



ARM Macro Assembler    Page 2 


                       BANKSIZE
                               EQU              0x48000028  ;Flexible Bank Size
                                                            
   26 00000000 4800002C 
                       MRSRB6  EQU              0x4800002c  ;Mode register set 
                                                            for SDRAM Bank6
   27 00000000 48000030 
                       MRSRB7  EQU              0x48000030  ;Mode register set 
                                                            for SDRAM Bank7
   28 00000000         
   29 00000000         
   30 00000000         ;==========================
   31 00000000         ; CLOCK & POWER MANAGEMENT
   32 00000000         ;==========================
   33 00000000 4C000000 
                       LOCKTIME
                               EQU              0x4c000000  ;PLL lock time coun
                                                            ter
   34 00000000 4C000004 
                       MPLLCON EQU              0x4c000004  ;MPLL Control
   35 00000000 4C000008 
                       UPLLCON EQU              0x4c000008  ;UPLL Control
   36 00000000 4C00000C 
                       CLKCON  EQU              0x4c00000c  ;Clock generator co
                                                            ntrol
   37 00000000 4C000010 
                       CLKSLOW EQU              0x4c000010  ;Slow clock control
                                                            
   38 00000000 4C000014 
                       CLKDIVN EQU              0x4c000014  ;Clock divider cont
                                                            rol
   39 00000000         
   40 00000000         
   41 00000000         ;=================
   42 00000000         ; INTERRUPT
   43 00000000         ;=================
   44 00000000 4A000000 
                       SRCPND  EQU              0x4a000000  ;Interrupt request 
                                                            status
   45 00000000 4A000004 
                       INTMOD  EQU              0x4a000004  ;Interrupt mode con
                                                            trol
   46 00000000 4A000008 
                       INTMSK  EQU              0x4a000008  ;Interrupt mask con
                                                            trol
   47 00000000 4A00000C 
                       PRIORITY
                               EQU              0x4a00000c  ;IRQ priority contr
                                                            ol           <-- Ma
                                                            y 06, 2002 SOP
   48 00000000 4A000010 
                       INTPND  EQU              0x4a000010  ;Interrupt request 
                                                            status
   49 00000000 4A000014 
                       INTOFFSET
                               EQU              0x4a000014  ;Interruot request 
                                                            source offset
   50 00000000 4A000018 
                       SUBSRCPND



ARM Macro Assembler    Page 3 


                               EQU              0x4a000018  ;Sub source pending
                                                            
   51 00000000 4A00001C 
                       INTSUBMSK
                               EQU              0x4a00001c  ;Interrupt sub mask
                                                            
   52 00000000         
   53 00000000         
   54 00000000         ;=================
   55 00000000         ; I/O PORT for LED
   56 00000000         ;=================
   57 00000000 56000050 
                       GPFCON  EQU              0x56000050  ;Port F control
   58 00000000 56000054 
                       GPFDAT  EQU              0x56000054  ;Port F data
   59 00000000 56000058 
                       GPFUP   EQU              0x56000058  ;Pull-up control F
   60 00000000         
   61 00000000 56000010 
                       GPBCON  EQU              0x56000010  ;Port B control
   62 00000000 56000014 
                       GPBDAT  EQU              0x56000014  ;Port B data
   63 00000000         
   64 00000000         
   65 00000000         ;Miscellaneous register
   66 00000000 56000080 
                       MISCCR  EQU              0x56000080  ;Miscellaneous cont
                                                            rol
   67 00000000 56000084 
                       DCKCON  EQU              0x56000084  ;DCLK0/1 control
   68 00000000 56000088 
                       EXTINT0 EQU              0x56000088  ;External interrupt
                                                             control register 0
                                                            
   69 00000000 5600008C 
                       EXTINT1 EQU              0x5600008c  ;External interrupt
                                                             control register 1
                                                            
   70 00000000 56000090 
                       EXTINT2 EQU              0x56000090  ;External interrupt
                                                             control register 2
                                                            
   71 00000000 56000094 
                       EINTFLT0
                               EQU              0x56000094  ;Reserved
   72 00000000 56000098 
                       EINTFLT1
                               EQU              0x56000098  ;Reserved
   73 00000000 5600009C 
                       EINTFLT2
                               EQU              0x5600009c  ;External interrupt
                                                             filter control reg
                                                            ister 2
   74 00000000 560000A0 
                       EINTFLT3
                               EQU              0x560000a0  ;External interrupt