pll_init.s

ucos_ii在mini2440上的移植KEIL编译环境

;************************************
;MPLL和UPLL参数配置
;***********************************

	AREA PLL, CODE, READONLY
	ENTRY
	CODE32
	GET 2440addr.inc
	EXPORT InitPLL

;UPLL时钟配置，UPLL只能48MHz或48MHz
UPLL_MDIV_VAL	EQU	0X38
UPLL_PDIV_VAL	EQU	0X2
UPLL_SDIV_VAL	EQU 0X2
UPLL_MDIV		EQU	(UPLL_MDIV_VAL << 12)
UPLL_PDIV		EQU	(UPLL_PDIV_VAL << 4)
UPLL_SDIV		EQU (UPLL_SDIV_VAL << 0)
DIVN_UPLL		EQU	0

;MPLL时钟配置，MPLL在200MHz-600MHz
MPLL_MDIV_VAL	EQU	0X44
MPLL_PDIV_VAL	EQU	1
MPLL_SDIV_VAL	EQU 1
MPLL_MDIV		EQU	(MPLL_MDIV_VAL << 12)
MPLL_PDIV		EQU	(MPLL_PDIV_VAL << 4)
MPLL_SDIV		EQU (MPLL_SDIV_VAL << 0)

HDIVN			EQU	3  
PDIVN			EQU 1

UPLL_VAL		EQU	(UPLL_MDIV | UPLL_PDIV | UPLL_SDIV)
MPLL_VAL		EQU	(MPLL_MDIV | MPLL_PDIV | MPLL_SDIV)
CLKDIVN_VAL		EQU	((DIVN_UPLL << 3) | (HDIVN << 1) | (PDIVN << 0))

;以上配置产生的MPLL时钟频率如下
;FCLK			EQU 304
;HCLK			EQU 101
;PCLK			EQU	50

;系统时钟MPLL和UPLL配置	
InitPLL 
	LDR R0, =LOCKTIME	;配置PLL的稳定周期时间
	LDR R1, =0xFFFFFFFF
	STR R1, [R0]

	LDR R0, =CLKDIVN	;配置CLKDIVN时钟分频器
	LDR R1, =CLKDIVN_VAL		  
	STR R1, [R0]		
			  
	mrc p15, 0, r0, c1, c0, 0  	;/*read ctrl register tekkaman*/
	orr r0, r0, #0xc0000000 	;/*Asynchronous tekkaman*/
	mcr p15, 0, r0, c1, c0, 0  	;/*write ctrl register tekkaman*/

	LDR R0, =UPLLCON		;配置UPLL
	LDR R1, =UPLL_VAL  		  
	STR R1, [R0]
	NOP
	NOP
	NOP
	NOP
	NOP
	NOP
	NOP

	LDR R0,=MPLLCON   		;配置MPLL	   
	LDR R1,=MPLL_VAL 	
	STR R1,[R0]

	BX LR
;	MOV PC, LR



	END