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📄 stm8s_uart3.ls

📁 STM8全部资料
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 816  019e c75244        	ld	21060,a
 818  01a1 202b          	jra	L572
 819  01a3               L772:
 820                     ; 259     else if (uartreg == 0x02)
 822  01a3 7b01          	ld	a,(OFST-1,sp)
 823  01a5 a102          	cp	a,#2
 824  01a7 260b          	jrne	L303
 825                     ; 261       UART3->CR2 &= (u8)(~itpos);
 827  01a9 7b02          	ld	a,(OFST+0,sp)
 828  01ab 43            	cpl	a
 829  01ac c45245        	and	a,21061
 830  01af c75245        	ld	21061,a
 832  01b2 201a          	jra	L572
 833  01b4               L303:
 834                     ; 263     else if (uartreg == 0x03)
 836  01b4 7b01          	ld	a,(OFST-1,sp)
 837  01b6 a103          	cp	a,#3
 838  01b8 260b          	jrne	L703
 839                     ; 265       UART3->CR4 &= (u8)(~itpos);
 841  01ba 7b02          	ld	a,(OFST+0,sp)
 842  01bc 43            	cpl	a
 843  01bd c45247        	and	a,21063
 844  01c0 c75247        	ld	21063,a
 846  01c3 2009          	jra	L572
 847  01c5               L703:
 848                     ; 269       UART3->CR6 &= (u8)(~itpos);
 850  01c5 7b02          	ld	a,(OFST+0,sp)
 851  01c7 43            	cpl	a
 852  01c8 c45249        	and	a,21065
 853  01cb c75249        	ld	21065,a
 854  01ce               L572:
 855                     ; 272 }
 858  01ce 5b04          	addw	sp,#4
 859  01d0 81            	ret
 918                     ; 290 void UART3_LINBreakDetectionConfig(UART3_LINBreakDetectionLength_TypeDef UART3_LINBreakDetectionLength)
 918                     ; 291 {
 919                     	switch	.text
 920  01d1               _UART3_LINBreakDetectionConfig:
 924                     ; 292   assert_param(IS_UART3_LINBREAKDETECTIONLENGTH_OK(UART3_LINBreakDetectionLength));
 926                     ; 294   if (UART3_LINBreakDetectionLength != UART3_LINBREAKDETECTIONLENGTH_10BITS)
 928  01d1 4d            	tnz	a
 929  01d2 2706          	jreq	L143
 930                     ; 296     UART3->CR4 |= UART3_CR4_LBDL;
 932  01d4 721a5247      	bset	21063,#5
 934  01d8 2004          	jra	L343
 935  01da               L143:
 936                     ; 300     UART3->CR4 &= ((u8)~UART3_CR4_LBDL);
 938  01da 721b5247      	bres	21063,#5
 939  01de               L343:
 940                     ; 302 }
 943  01de 81            	ret
1064                     ; 324 void UART3_LINConfig(UART3_LinMode_TypeDef UART3_Mode, UART3_LinAutosync_TypeDef UART3_Autosync, UART3_LinDivUp_TypeDef UART3_DivUp)
1064                     ; 325 {
1065                     	switch	.text
1066  01df               _UART3_LINConfig:
1068  01df 89            	pushw	x
1069       00000000      OFST:	set	0
1072                     ; 326   assert_param(IS_UART3_SLAVE_OK(UART3_Mode));
1074                     ; 328   assert_param(IS_UART3_AUTOSYNC_OK(UART3_Autosync));
1076                     ; 330   assert_param(IS_UART3_DIVUP_OK(UART3_DivUp));
1078                     ; 332   if (UART3_Mode != UART3_LIN_MODE_MASTER)
1080  01e0 9e            	ld	a,xh
1081  01e1 4d            	tnz	a
1082  01e2 2706          	jreq	L324
1083                     ; 334     UART3->CR6 |=  UART3_CR6_LSLV;
1085  01e4 721a5249      	bset	21065,#5
1087  01e8 2004          	jra	L524
1088  01ea               L324:
1089                     ; 338     UART3->CR6 &= ((u8)~UART3_CR6_LSLV);
1091  01ea 721b5249      	bres	21065,#5
1092  01ee               L524:
1093                     ; 341   if (UART3_Autosync != UART3_LIN_AUTOSYNC_DISABLE)
1095  01ee 0d02          	tnz	(OFST+2,sp)
1096  01f0 2706          	jreq	L724
1097                     ; 343     UART3->CR6 |=  UART3_CR6_LASE ;
1099  01f2 72185249      	bset	21065,#4
1101  01f6 2004          	jra	L134
1102  01f8               L724:
1103                     ; 347     UART3->CR6 &= ((u8)~ UART3_CR6_LASE );
1105  01f8 72195249      	bres	21065,#4
1106  01fc               L134:
1107                     ; 350   if (UART3_DivUp != UART3_LIN_DIVUP_LBRR1)
1109  01fc 0d05          	tnz	(OFST+5,sp)
1110  01fe 2706          	jreq	L334
1111                     ; 352     UART3->CR6 |=  UART3_CR6_LDUM;
1113  0200 721e5249      	bset	21065,#7
1115  0204 2004          	jra	L534
1116  0206               L334:
1117                     ; 356     UART3->CR6 &= ((u8)~ UART3_CR6_LDUM);
1119  0206 721f5249      	bres	21065,#7
1120  020a               L534:
1121                     ; 359 }
1124  020a 85            	popw	x
1125  020b 81            	ret
1160                     ; 379 void UART3_LINCmd(FunctionalState NewState)
1160                     ; 380 {
1161                     	switch	.text
1162  020c               _UART3_LINCmd:
1166                     ; 381   assert_param(IS_FUNCTIONALSTATE_OK(NewState));
1168                     ; 383   if (NewState != DISABLE)
1170  020c 4d            	tnz	a
1171  020d 2706          	jreq	L554
1172                     ; 386     UART3->CR3 |= UART3_CR3_LINEN;
1174  020f 721c5246      	bset	21062,#6
1176  0213 2004          	jra	L754
1177  0215               L554:
1178                     ; 391     UART3->CR3 &= ((u8)~UART3_CR3_LINEN);
1180  0215 721d5246      	bres	21062,#6
1181  0219               L754:
1182                     ; 393 }
1185  0219 81            	ret
1242                     ; 412 void UART3_WakeUpConfig(UART3_WakeUp_TypeDef UART3_WakeUp)
1242                     ; 413 {
1243                     	switch	.text
1244  021a               _UART3_WakeUpConfig:
1248                     ; 414   assert_param(IS_UART3_WAKEUP_OK(UART3_WakeUp));
1250                     ; 416   UART3->CR1 &= ((u8)~UART3_CR1_WAKE);
1252  021a 72175244      	bres	21060,#3
1253                     ; 417   UART3->CR1 |= (u8)UART3_WakeUp;
1255  021e ca5244        	or	a,21060
1256  0221 c75244        	ld	21060,a
1257                     ; 418 }
1260  0224 81            	ret
1296                     ; 438 void UART3_ReceiverWakeUpCmd(FunctionalState NewState)
1296                     ; 439 {
1297                     	switch	.text
1298  0225               _UART3_ReceiverWakeUpCmd:
1302                     ; 440   assert_param(IS_FUNCTIONALSTATE_OK(NewState));
1304                     ; 442   if (NewState != DISABLE)
1306  0225 4d            	tnz	a
1307  0226 2706          	jreq	L525
1308                     ; 445     UART3->CR2 |= UART3_CR2_RWU;
1310  0228 72125245      	bset	21061,#1
1312  022c 2004          	jra	L725
1313  022e               L525:
1314                     ; 450     UART3->CR2 &= ((u8)~UART3_CR2_RWU);
1316  022e 72135245      	bres	21061,#1
1317  0232               L725:
1318                     ; 452 }
1321  0232 81            	ret
1344                     ; 470 u8 UART3_ReceiveData8(void)
1344                     ; 471 {
1345                     	switch	.text
1346  0233               _UART3_ReceiveData8:
1350                     ; 472   return ((u8)UART3->DR);
1352  0233 c65241        	ld	a,21057
1355  0236 81            	ret
1378                     ; 490 u16 UART3_ReceiveData9(void)
1378                     ; 491 {
1379                     	switch	.text
1380  0237               _UART3_ReceiveData9:
1382  0237 89            	pushw	x
1383       00000002      OFST:	set	2
1386                     ; 492   return (u16)((((u16)UART3->DR) | ((u16)(((u16)((u16)UART3->CR1 & (u16)UART3_CR1_R8)) << 1))) & ((u16)0x01FF));
1388  0238 c65244        	ld	a,21060
1389  023b 5f            	clrw	x
1390  023c a480          	and	a,#128
1391  023e 5f            	clrw	x
1392  023f 02            	rlwa	x,a
1393  0240 58            	sllw	x
1394  0241 1f01          	ldw	(OFST-1,sp),x
1395  0243 c65241        	ld	a,21057
1396  0246 5f            	clrw	x
1397  0247 97            	ld	xl,a
1398  0248 01            	rrwa	x,a
1399  0249 1a02          	or	a,(OFST+0,sp)
1400  024b 01            	rrwa	x,a
1401  024c 1a01          	or	a,(OFST-1,sp)
1402  024e 01            	rrwa	x,a
1403  024f 01            	rrwa	x,a
1404  0250 a4ff          	and	a,#255
1405  0252 01            	rrwa	x,a
1406  0253 a401          	and	a,#1
1407  0255 01            	rrwa	x,a
1410  0256 5b02          	addw	sp,#2
1411  0258 81            	ret
1443                     ; 514 void UART3_SendData8(u8 Data)
1443                     ; 515 {
1444                     	switch	.text
1445  0259               _UART3_SendData8:
1449                     ; 517   UART3->DR = Data;
1451  0259 c75241        	ld	21057,a
1452                     ; 518 }
1455  025c 81            	ret
1487                     ; 537 void UART3_SendData9(u16 Data)
1487                     ; 538 {
1488                     	switch	.text
1489  025d               _UART3_SendData9:
1491  025d 89            	pushw	x
1492       00000000      OFST:	set	0
1495                     ; 539   UART3->CR1 &= ((u8)~UART3_CR1_T8);                  /**< Clear the transmit data bit 8     */
1497  025e 721d5244      	bres	21060,#6
1498                     ; 540   UART3->CR1 |= (u8)(((u8)(Data >> 2)) & UART3_CR1_T8); /**< Write the transmit data bit [8]   */
1500  0262 54            	srlw	x
1501  0263 54            	srlw	x
1502  0264 9f            	ld	a,xl
1503  0265 a440          	and	a,#64
1504  0267 ca5244        	or	a,21060
1505  026a c75244        	ld	21060,a
1506                     ; 541   UART3->DR   = (u8)(Data);                    /**< Write the transmit data bit [0:7] */
1508  026d 7b02          	ld	a,(OFST+2,sp)
1509  026f c75241        	ld	21057,a
1510                     ; 543 }
1513  0272 85            	popw	x
1514  0273 81            	ret
1537                     ; 558 void UART3_SendBreak(void)
1537                     ; 559 {
1538                     	switch	.text
1539  0274               _UART3_SendBreak:
1543                     ; 560   UART3->CR2 |= UART3_CR2_SBK;
1545  0274 72105245      	bset	21061,#0
1546                     ; 561 }
1549  0278 81            	ret
1581                     ; 580 void UART3_SetAddress(u8 UART3_Address)
1581                     ; 581 {
1582                     	switch	.text
1583  0279               _UART3_SetAddress:
1585  0279 88            	push	a
1586       00000000      OFST:	set	0
1589                     ; 583   assert_param(IS_UART3_ADDRESS_OK(UART3_Address));
1591                     ; 586   UART3->CR4 &= ((u8)~UART3_CR4_ADD);
1593  027a c65247        	ld	a,21063
1594  027d a4f0          	and	a,#240
1595  027f c75247        	ld	21063,a
1596                     ; 588   UART3->CR4 |= UART3_Address;
1598  0282 c65247        	ld	a,21063
1599  0285 1a01          	or	a,(OFST+1,sp)
1600  0287 c75247        	ld	21063,a
1601                     ; 589 }
1604  028a 84            	pop	a
1605  028b 81            	ret
1762                     ; 609 FlagStatus UART3_GetFlagStatus(UART3_Flag_TypeDef UART3_FLAG)
1762                     ; 610 {
1763                     	switch	.text
1764  028c               _UART3_GetFlagStatus:
1766  028c 89            	pushw	x
1767  028d 88            	push	a
1768       00000001      OFST:	set	1
1771                     ; 611   FlagStatus status = RESET;
1773                     ; 614   assert_param(IS_UART3_FLAG_OK(UART3_FLAG));
1775                     ; 617   if (UART3_FLAG == UART3_FLAG_LBDF)
1777  028e a30210        	cpw	x,#528
1778  0291 2610          	jrne	L317
1779                     ; 619     if ((UART3->CR4 & (u8)UART3_FLAG) != (u8)0x00)
1781  0293 9f            	ld	a,xl
1782  0294 c45247        	and	a,21063
1783  0297 2706          	jreq	L517
1784                     ; 622       status = SET;
1786  0299 a601          	ld	a,#1
1787  029b 6b01          	ld	(OFST+0,sp),a
1789  029d 2039          	jra	L127
1790  029f               L517:
1791                     ; 627       status = RESET;
1793  029f 0f01          	clr	(OFST+0,sp)
1794  02a1 2035          	jra	L127
1795  02a3               L317:
1796                     ; 630   else if (UART3_FLAG == UART3_FLAG_SBK)
1798  02a3 1e02          	ldw	x,(OFST+1,sp)
1799  02a5 a30101        	cpw	x,#257
1800  02a8 2611          	jrne	L327
1801                     ; 632     if ((UART3->CR2 & (u8)UART3_FLAG) != (u8)0x00)
1803  02aa c65245        	ld	a,21061
1804  02ad 1503          	bcp	a,(OFST+2,sp)
1805  02af 2706          	jreq	L527
1806                     ; 635       status = SET;
1808  02b1 a601          	ld	a,#1
1809  02b3 6b01          	ld	(OFST+0,sp),a
1811  02b5 2021          	jra	L127
1812  02b7               L527:
1813                     ; 640       status = RESET;
1815  02b7 0f01          	clr	(OFST+0,sp)
1816  02b9 201d          	jra	L127

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