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📄 stm8s_tim2.ls

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   1                     ; C Compiler for STM8 (COSMIC Software)
   2                     ; Parser V4.8.32.1 - 30 Mar 2010
   3                     ; Generator V4.3.4 - 23 Mar 2010
  43                     ; 63 void TIM2_DeInit(void)
  43                     ; 64 {
  45                     	switch	.text
  46  0000               _TIM2_DeInit:
  50                     ; 66   TIM2->CR1 = (u8)TIM2_CR1_RESET_VALUE;
  52  0000 725f5300      	clr	21248
  53                     ; 67   TIM2->IER = (u8)TIM2_IER_RESET_VALUE;
  55  0004 725f5301      	clr	21249
  56                     ; 68   TIM2->SR2 = (u8)TIM2_SR2_RESET_VALUE;
  58  0008 725f5303      	clr	21251
  59                     ; 71   TIM2->CCER1 = (u8)TIM2_CCER1_RESET_VALUE;
  61  000c 725f5308      	clr	21256
  62                     ; 72   TIM2->CCER2 = (u8)TIM2_CCER2_RESET_VALUE;
  64  0010 725f5309      	clr	21257
  65                     ; 76   TIM2->CCER1 = (u8)TIM2_CCER1_RESET_VALUE;
  67  0014 725f5308      	clr	21256
  68                     ; 77   TIM2->CCER2 = (u8)TIM2_CCER2_RESET_VALUE;
  70  0018 725f5309      	clr	21257
  71                     ; 78   TIM2->CCMR1 = (u8)TIM2_CCMR1_RESET_VALUE;
  73  001c 725f5305      	clr	21253
  74                     ; 79   TIM2->CCMR2 = (u8)TIM2_CCMR2_RESET_VALUE;
  76  0020 725f5306      	clr	21254
  77                     ; 80   TIM2->CCMR3 = (u8)TIM2_CCMR3_RESET_VALUE;
  79  0024 725f5307      	clr	21255
  80                     ; 81   TIM2->CNTRH = (u8)TIM2_CNTRH_RESET_VALUE;
  82  0028 725f530a      	clr	21258
  83                     ; 82   TIM2->CNTRL = (u8)TIM2_CNTRL_RESET_VALUE;
  85  002c 725f530b      	clr	21259
  86                     ; 83   TIM2->PSCR = (u8)TIM2_PSCR_RESET_VALUE;
  88  0030 725f530c      	clr	21260
  89                     ; 84   TIM2->ARRH  = (u8)TIM2_ARRH_RESET_VALUE;
  91  0034 35ff530d      	mov	21261,#255
  92                     ; 85   TIM2->ARRL  = (u8)TIM2_ARRL_RESET_VALUE;
  94  0038 35ff530e      	mov	21262,#255
  95                     ; 86   TIM2->CCR1H = (u8)TIM2_CCR1H_RESET_VALUE;
  97  003c 725f530f      	clr	21263
  98                     ; 87   TIM2->CCR1L = (u8)TIM2_CCR1L_RESET_VALUE;
 100  0040 725f5310      	clr	21264
 101                     ; 88   TIM2->CCR2H = (u8)TIM2_CCR2H_RESET_VALUE;
 103  0044 725f5311      	clr	21265
 104                     ; 89   TIM2->CCR2L = (u8)TIM2_CCR2L_RESET_VALUE;
 106  0048 725f5312      	clr	21266
 107                     ; 90   TIM2->CCR3H = (u8)TIM2_CCR3H_RESET_VALUE;
 109  004c 725f5313      	clr	21267
 110                     ; 91   TIM2->CCR3L = (u8)TIM2_CCR3L_RESET_VALUE;
 112  0050 725f5314      	clr	21268
 113                     ; 92   TIM2->SR1 = (u8)TIM2_SR1_RESET_VALUE;
 115  0054 725f5302      	clr	21250
 116                     ; 93 }
 119  0058 81            	ret
 285                     ; 113 void TIM2_TimeBaseInit( TIM2_Prescaler_TypeDef TIM2_Prescaler,
 285                     ; 114                         u16 TIM2_Period)
 285                     ; 115 {
 286                     	switch	.text
 287  0059               _TIM2_TimeBaseInit:
 289  0059 88            	push	a
 290       00000000      OFST:	set	0
 293                     ; 117   TIM2->PSCR = (u8)(TIM2_Prescaler);
 295  005a c7530c        	ld	21260,a
 296                     ; 119   TIM2->ARRH = (u8)(TIM2_Period >> 8);
 298  005d 7b04          	ld	a,(OFST+4,sp)
 299  005f c7530d        	ld	21261,a
 300                     ; 120   TIM2->ARRL = (u8)(TIM2_Period);
 302  0062 7b05          	ld	a,(OFST+5,sp)
 303  0064 c7530e        	ld	21262,a
 304                     ; 121 }
 307  0067 84            	pop	a
 308  0068 81            	ret
 463                     ; 145 void TIM2_OC1Init(TIM2_OCMode_TypeDef TIM2_OCMode,
 463                     ; 146                   TIM2_OutputState_TypeDef TIM2_OutputState,
 463                     ; 147                   u16 TIM2_Pulse,
 463                     ; 148                   TIM2_OCPolarity_TypeDef TIM2_OCPolarity)
 463                     ; 149 {
 464                     	switch	.text
 465  0069               _TIM2_OC1Init:
 467  0069 89            	pushw	x
 468  006a 88            	push	a
 469       00000001      OFST:	set	1
 472                     ; 151   assert_param(IS_TIM2_OC_MODE_OK(TIM2_OCMode));
 474                     ; 152   assert_param(IS_TIM2_OUTPUT_STATE_OK(TIM2_OutputState));
 476                     ; 153   assert_param(IS_TIM2_OC_POLARITY_OK(TIM2_OCPolarity));
 478                     ; 156   TIM2->CCER1 &= (u8)(~( TIM2_CCER1_CC1E | TIM2_CCER1_CC1P));
 480  006b c65308        	ld	a,21256
 481  006e a4fc          	and	a,#252
 482  0070 c75308        	ld	21256,a
 483                     ; 158   TIM2->CCER1 |= (u8)((TIM2_OutputState  & TIM2_CCER1_CC1E   ) | (TIM2_OCPolarity   & TIM2_CCER1_CC1P   ));
 485  0073 7b08          	ld	a,(OFST+7,sp)
 486  0075 a402          	and	a,#2
 487  0077 6b01          	ld	(OFST+0,sp),a
 488  0079 9f            	ld	a,xl
 489  007a a401          	and	a,#1
 490  007c 1a01          	or	a,(OFST+0,sp)
 491  007e ca5308        	or	a,21256
 492  0081 c75308        	ld	21256,a
 493                     ; 161   TIM2->CCMR1 = (u8)((TIM2->CCMR1 & (u8)(~TIM2_CCMR_OCM)) | (u8)TIM2_OCMode);
 495  0084 c65305        	ld	a,21253
 496  0087 a48f          	and	a,#143
 497  0089 1a02          	or	a,(OFST+1,sp)
 498  008b c75305        	ld	21253,a
 499                     ; 164   TIM2->CCR1H = (u8)(TIM2_Pulse >> 8);
 501  008e 7b06          	ld	a,(OFST+5,sp)
 502  0090 c7530f        	ld	21263,a
 503                     ; 165   TIM2->CCR1L = (u8)(TIM2_Pulse);
 505  0093 7b07          	ld	a,(OFST+6,sp)
 506  0095 c75310        	ld	21264,a
 507                     ; 166 }
 510  0098 5b03          	addw	sp,#3
 511  009a 81            	ret
 573                     ; 190 void TIM2_OC2Init(TIM2_OCMode_TypeDef TIM2_OCMode,
 573                     ; 191                   TIM2_OutputState_TypeDef TIM2_OutputState,
 573                     ; 192                   u16 TIM2_Pulse,
 573                     ; 193                   TIM2_OCPolarity_TypeDef TIM2_OCPolarity)
 573                     ; 194 {
 574                     	switch	.text
 575  009b               _TIM2_OC2Init:
 577  009b 89            	pushw	x
 578  009c 88            	push	a
 579       00000001      OFST:	set	1
 582                     ; 196   assert_param(IS_TIM2_OC_MODE_OK(TIM2_OCMode));
 584                     ; 197   assert_param(IS_TIM2_OUTPUT_STATE_OK(TIM2_OutputState));
 586                     ; 198   assert_param(IS_TIM2_OC_POLARITY_OK(TIM2_OCPolarity));
 588                     ; 202   TIM2->CCER1 &= (u8)(~( TIM2_CCER1_CC2E |  TIM2_CCER1_CC2P ));
 590  009d c65308        	ld	a,21256
 591  00a0 a4cf          	and	a,#207
 592  00a2 c75308        	ld	21256,a
 593                     ; 204   TIM2->CCER1 |= (u8)((TIM2_OutputState  & TIM2_CCER1_CC2E   ) | \
 593                     ; 205                       (TIM2_OCPolarity   & TIM2_CCER1_CC2P   ));
 595  00a5 7b08          	ld	a,(OFST+7,sp)
 596  00a7 a420          	and	a,#32
 597  00a9 6b01          	ld	(OFST+0,sp),a
 598  00ab 9f            	ld	a,xl
 599  00ac a410          	and	a,#16
 600  00ae 1a01          	or	a,(OFST+0,sp)
 601  00b0 ca5308        	or	a,21256
 602  00b3 c75308        	ld	21256,a
 603                     ; 209   TIM2->CCMR2 = (u8)((TIM2->CCMR2 & (u8)(~TIM2_CCMR_OCM)) | (u8)TIM2_OCMode);
 605  00b6 c65306        	ld	a,21254
 606  00b9 a48f          	and	a,#143
 607  00bb 1a02          	or	a,(OFST+1,sp)
 608  00bd c75306        	ld	21254,a
 609                     ; 213   TIM2->CCR2H = (u8)(TIM2_Pulse >> 8);
 611  00c0 7b06          	ld	a,(OFST+5,sp)
 612  00c2 c75311        	ld	21265,a
 613                     ; 214   TIM2->CCR2L = (u8)(TIM2_Pulse);
 615  00c5 7b07          	ld	a,(OFST+6,sp)
 616  00c7 c75312        	ld	21266,a
 617                     ; 215 }
 620  00ca 5b03          	addw	sp,#3
 621  00cc 81            	ret
 683                     ; 239 void TIM2_OC3Init(TIM2_OCMode_TypeDef TIM2_OCMode,
 683                     ; 240                   TIM2_OutputState_TypeDef TIM2_OutputState,
 683                     ; 241                   u16 TIM2_Pulse,
 683                     ; 242                   TIM2_OCPolarity_TypeDef TIM2_OCPolarity)
 683                     ; 243 {
 684                     	switch	.text
 685  00cd               _TIM2_OC3Init:
 687  00cd 89            	pushw	x
 688  00ce 88            	push	a
 689       00000001      OFST:	set	1
 692                     ; 245   assert_param(IS_TIM2_OC_MODE_OK(TIM2_OCMode));
 694                     ; 246   assert_param(IS_TIM2_OUTPUT_STATE_OK(TIM2_OutputState));
 696                     ; 247   assert_param(IS_TIM2_OC_POLARITY_OK(TIM2_OCPolarity));
 698                     ; 249   TIM2->CCER2 &= (u8)(~( TIM2_CCER2_CC3E  | TIM2_CCER2_CC3P));
 700  00cf c65309        	ld	a,21257
 701  00d2 a4fc          	and	a,#252
 702  00d4 c75309        	ld	21257,a
 703                     ; 251   TIM2->CCER2 |= (u8)((TIM2_OutputState  & TIM2_CCER2_CC3E   ) |  (TIM2_OCPolarity   & TIM2_CCER2_CC3P   ));
 705  00d7 7b08          	ld	a,(OFST+7,sp)
 706  00d9 a402          	and	a,#2
 707  00db 6b01          	ld	(OFST+0,sp),a
 708  00dd 9f            	ld	a,xl
 709  00de a401          	and	a,#1
 710  00e0 1a01          	or	a,(OFST+0,sp)
 711  00e2 ca5309        	or	a,21257
 712  00e5 c75309        	ld	21257,a
 713                     ; 254   TIM2->CCMR3 = (u8)((TIM2->CCMR3 & (u8)(~TIM2_CCMR_OCM)) | (u8)TIM2_OCMode);
 715  00e8 c65307        	ld	a,21255
 716  00eb a48f          	and	a,#143
 717  00ed 1a02          	or	a,(OFST+1,sp)
 718  00ef c75307        	ld	21255,a
 719                     ; 257   TIM2->CCR3H = (u8)(TIM2_Pulse >> 8);
 721  00f2 7b06          	ld	a,(OFST+5,sp)
 722  00f4 c75313        	ld	21267,a
 723                     ; 258   TIM2->CCR3L = (u8)(TIM2_Pulse);
 725  00f7 7b07          	ld	a,(OFST+6,sp)
 726  00f9 c75314        	ld	21268,a
 727                     ; 260 }
 730  00fc 5b03          	addw	sp,#3
 731  00fe 81            	ret
 922                     ; 291 void TIM2_ICInit(TIM2_Channel_TypeDef TIM2_Channel,
 922                     ; 292                  TIM2_ICPolarity_TypeDef TIM2_ICPolarity,
 922                     ; 293                  TIM2_ICSelection_TypeDef TIM2_ICSelection,
 922                     ; 294                  TIM2_ICPSC_TypeDef TIM2_ICPrescaler,
 922                     ; 295                  u8 TIM2_ICFilter)
 922                     ; 296 {
 923                     	switch	.text
 924  00ff               _TIM2_ICInit:
 926  00ff 89            	pushw	x
 927       00000000      OFST:	set	0
 930                     ; 298   assert_param(IS_TIM2_CHANNEL_OK(TIM2_Channel));
 932                     ; 299   assert_param(IS_TIM2_IC_POLARITY_OK(TIM2_ICPolarity));
 934                     ; 300   assert_param(IS_TIM2_IC_SELECTION_OK(TIM2_ICSelection));
 936                     ; 301   assert_param(IS_TIM2_IC_PRESCALER_OK(TIM2_ICPrescaler));
 938                     ; 302   assert_param(IS_TIM2_IC_FILTER_OK(TIM2_ICFilter));
 940                     ; 304   if (TIM2_Channel == TIM2_CHANNEL_1)
 942  0100 9e            	ld	a,xh
 943  0101 4d            	tnz	a
 944  0102 2614          	jrne	L763
 945                     ; 307     TI1_Config(TIM2_ICPolarity,
 945                     ; 308                TIM2_ICSelection,
 945                     ; 309                TIM2_ICFilter);
 947  0104 7b07          	ld	a,(OFST+7,sp)
 948  0106 88            	push	a
 949  0107 7b06          	ld	a,(OFST+6,sp)
 950  0109 97            	ld	xl,a
 951  010a 7b03          	ld	a,(OFST+3,sp)
 952  010c 95            	ld	xh,a
 953  010d cd0451        	call	L3_TI1_Config
 955  0110 84            	pop	a
 956                     ; 312     TIM2_SetIC1Prescaler(TIM2_ICPrescaler);
 958  0111 7b06          	ld	a,(OFST+6,sp)
 959  0113 cd0340        	call	_TIM2_SetIC1Prescaler
 962  0116 202c          	jra	L173
 963  0118               L763:
 964                     ; 314   else if (TIM2_Channel == TIM2_CHANNEL_2)
 966  0118 7b01          	ld	a,(OFST+1,sp)
 967  011a a101          	cp	a,#1
 968  011c 2614          	jrne	L373
 969                     ; 317     TI2_Config(TIM2_ICPolarity,
 969                     ; 318                TIM2_ICSelection,
 969                     ; 319                TIM2_ICFilter);
 971  011e 7b07          	ld	a,(OFST+7,sp)
 972  0120 88            	push	a
 973  0121 7b06          	ld	a,(OFST+6,sp)
 974  0123 97            	ld	xl,a
 975  0124 7b03          	ld	a,(OFST+3,sp)
 976  0126 95            	ld	xh,a
 977  0127 cd0481        	call	L5_TI2_Config
 979  012a 84            	pop	a
 980                     ; 322     TIM2_SetIC2Prescaler(TIM2_ICPrescaler);
 982  012b 7b06          	ld	a,(OFST+6,sp)
 983  012d cd034d        	call	_TIM2_SetIC2Prescaler
 986  0130 2012          	jra	L173
 987  0132               L373:
 988                     ; 327     TI3_Config(TIM2_ICPolarity,
 988                     ; 328                TIM2_ICSelection,
 988                     ; 329                TIM2_ICFilter);
 990  0132 7b07          	ld	a,(OFST+7,sp)
 991  0134 88            	push	a
 992  0135 7b06          	ld	a,(OFST+6,sp)
 993  0137 97            	ld	xl,a
 994  0138 7b03          	ld	a,(OFST+3,sp)
 995  013a 95            	ld	xh,a
 996  013b cd04b1        	call	L7_TI3_Config
 998  013e 84            	pop	a
 999                     ; 332     TIM2_SetIC3Prescaler(TIM2_ICPrescaler);
1001  013f 7b06          	ld	a,(OFST+6,sp)
1002  0141 cd035a        	call	_TIM2_SetIC3Prescaler
1004  0144               L173:
1005                     ; 334 }
1008  0144 85            	popw	x
1009  0145 81            	ret
1099                     ; 363 void TIM2_PWMIConfig(TIM2_Channel_TypeDef TIM2_Channel,
1099                     ; 364                      TIM2_ICPolarity_TypeDef TIM2_ICPolarity,
1099                     ; 365                      TIM2_ICSelection_TypeDef TIM2_ICSelection,
1099                     ; 366                      TIM2_ICPSC_TypeDef TIM2_ICPrescaler,
1099                     ; 367                      u8 TIM2_ICFilter)
1099                     ; 368 {
1100                     	switch	.text
1101  0146               _TIM2_PWMIConfig:
1103  0146 89            	pushw	x
1104  0147 89            	pushw	x
1105       00000002      OFST:	set	2
1108                     ; 369   u8 icpolarity = (u8)TIM2_ICPOLARITY_RISING;
1110                     ; 370   u8 icselection = (u8)TIM2_ICSELECTION_DIRECTTI;
1112                     ; 373   assert_param(IS_TIM2_PWMI_CHANNEL_OK(TIM2_Channel));
1114                     ; 374   assert_param(IS_TIM2_IC_POLARITY_OK(TIM2_ICPolarity));
1116                     ; 375   assert_param(IS_TIM2_IC_SELECTION_OK(TIM2_ICSelection));
1118                     ; 376   assert_param(IS_TIM2_IC_PRESCALER_OK(TIM2_ICPrescaler));
1120                     ; 379   if (TIM2_ICPolarity != TIM2_ICPOLARITY_FALLING)
1122  0148 9f            	ld	a,xl
1123  0149 a144          	cp	a,#68
1124  014b 2706          	jreq	L734
1125                     ; 381     icpolarity = (u8)TIM2_ICPOLARITY_FALLING;
1127  014d a644          	ld	a,#68
1128  014f 6b01          	ld	(OFST-1,sp),a
1130  0151 2002          	jra	L144
1131  0153               L734:
1132                     ; 385     icpolarity = (u8)TIM2_ICPOLARITY_RISING;
1134  0153 0f01          	clr	(OFST-1,sp)
1135  0155               L144:
1136                     ; 389   if (TIM2_ICSelection == TIM2_ICSELECTION_DIRECTTI)
1138  0155 7b07          	ld	a,(OFST+5,sp)
1139  0157 a101          	cp	a,#1
1140  0159 2606          	jrne	L344
1141                     ; 391     icselection = (u8)TIM2_ICSELECTION_INDIRECTTI;
1143  015b a602          	ld	a,#2
1144  015d 6b02          	ld	(OFST+0,sp),a
1146  015f 2004          	jra	L544
1147  0161               L344:
1148                     ; 395     icselection = (u8)TIM2_ICSELECTION_DIRECTTI;
1150  0161 a601          	ld	a,#1
1151  0163 6b02          	ld	(OFST+0,sp),a
1152  0165               L544:
1153                     ; 398   if (TIM2_Channel == TIM2_CHANNEL_1)
1155  0165 0d03          	tnz	(OFST+1,sp)
1156  0167 2626          	jrne	L744

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