📄 stm8s_i2c.ls
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1763 025b 1d1000 subw x,#4096
1764 025e 270c jreq L506
1765 0260 1d1000 subw x,#4096
1766 0263 2718 jreq L706
1767 0265 1d1000 subw x,#4096
1768 0268 2724 jreq L116
1769 026a 2031 jra L517
1770 026c L506:
1771 ; 679 case 0x1000:
1771 ; 680 /* Check the status of the specified I2C flag */
1771 ; 681 if ((I2C->SR1 & (u8)Flag) != 0)
1773 026c c65217 ld a,21015
1774 026f 1503 bcp a,(OFST+2,sp)
1775 0271 2706 jreq L717
1776 ; 684 bitstatus = SET;
1778 0273 a601 ld a,#1
1779 0275 6b01 ld (OFST+0,sp),a
1781 0277 2024 jra L517
1782 0279 L717:
1783 ; 689 bitstatus = RESET;
1785 0279 0f01 clr (OFST+0,sp)
1786 027b 2020 jra L517
1787 027d L706:
1788 ; 694 case 0x2000:
1788 ; 695 /* Check the status of the specified I2C flag */
1788 ; 696 if ((I2C->SR2 & (u8)Flag) != 0)
1790 027d c65218 ld a,21016
1791 0280 1503 bcp a,(OFST+2,sp)
1792 0282 2706 jreq L327
1793 ; 699 bitstatus = SET;
1795 0284 a601 ld a,#1
1796 0286 6b01 ld (OFST+0,sp),a
1798 0288 2013 jra L517
1799 028a L327:
1800 ; 704 bitstatus = RESET;
1802 028a 0f01 clr (OFST+0,sp)
1803 028c 200f jra L517
1804 028e L116:
1805 ; 709 case 0x3000:
1805 ; 710 /* Check the status of the specified I2C flag */
1805 ; 711 if ((I2C->SR3 & (u8)Flag) != 0)
1807 028e c65219 ld a,21017
1808 0291 1503 bcp a,(OFST+2,sp)
1809 0293 2706 jreq L727
1810 ; 714 bitstatus = SET;
1812 0295 a601 ld a,#1
1813 0297 6b01 ld (OFST+0,sp),a
1815 0299 2002 jra L517
1816 029b L727:
1817 ; 719 bitstatus = RESET;
1819 029b 0f01 clr (OFST+0,sp)
1820 029d L316:
1821 ; 723 default:
1821 ; 724 break;
1823 029d L517:
1824 ; 729 return bitstatus;
1826 029d 7b01 ld a,(OFST+0,sp)
1829 029f 5b03 addw sp,#3
1830 02a1 81 ret
1886 ; 748 void I2C_ClearFlag(I2C_Flag_TypeDef Flag)
1886 ; 749 {
1887 switch .text
1888 02a2 _I2C_ClearFlag:
1890 02a2 89 pushw x
1891 02a3 5204 subw sp,#4
1892 00000004 OFST: set 4
1895 ; 750 u8 tmp1 = 0;
1897 ; 751 u8 tmp2 = 0;
1899 ; 752 u16 tmp3 = 0;
1901 ; 755 assert_param(IS_I2C_CLEAR_FLAG_OK(Flag));
1903 ; 758 tmp3 = ((u16)Flag & (u16)0x0F00);
1905 02a5 01 rrwa x,a
1906 02a6 9f ld a,xl
1907 02a7 a40f and a,#15
1908 02a9 97 ld xl,a
1909 02aa 4f clr a
1910 02ab 02 rlwa x,a
1911 02ac 1f03 ldw (OFST-1,sp),x
1912 02ae 01 rrwa x,a
1913 ; 761 if(tmp3 == 0x0100)
1915 02af 1e03 ldw x,(OFST-1,sp)
1916 02b1 a30100 cpw x,#256
1917 02b4 2608 jrne L757
1918 ; 764 I2C->SR2 = (u8)(~(u8)Flag);
1920 02b6 7b06 ld a,(OFST+2,sp)
1921 02b8 43 cpl a
1922 02b9 c75218 ld 21016,a
1924 02bc 2026 jra L167
1925 02be L757:
1926 ; 767 else if(tmp3 == 0x0200)
1928 02be 1e03 ldw x,(OFST-1,sp)
1929 02c0 a30200 cpw x,#512
1930 02c3 260a jrne L367
1931 ; 770 tmp1 = I2C->SR1;
1933 02c5 c65217 ld a,21015
1934 ; 772 I2C->CR2 = I2C->CR2;
1936 02c8 5552115211 mov 21009,21009
1938 02cd 2015 jra L167
1939 02cf L367:
1940 ; 775 else if(tmp3 == 0x0300)
1942 02cf 1e03 ldw x,(OFST-1,sp)
1943 02d1 a30300 cpw x,#768
1944 02d4 2608 jrne L767
1945 ; 779 tmp1 = I2C->SR1;
1947 02d6 c65217 ld a,21015
1948 ; 781 tmp2 = I2C->SR3;
1950 02d9 c65219 ld a,21017
1952 02dc 2006 jra L167
1953 02de L767:
1954 ; 788 tmp1 = I2C->SR1;
1956 02de c65217 ld a,21015
1957 ; 790 tmp2 = I2C->DR;
1959 02e1 c65216 ld a,21014
1960 02e4 L167:
1961 ; 792 }
1964 02e4 5b06 addw sp,#6
1965 02e6 81 ret
2113 ; 811 ITStatus I2C_GetITStatus(I2C_ITPendingBit_TypeDef ITPendingBit)
2113 ; 812 {
2114 switch .text
2115 02e7 _I2C_GetITStatus:
2117 02e7 89 pushw x
2118 02e8 88 push a
2119 00000001 OFST: set 1
2122 ; 813 ITStatus itstatus = RESET;
2124 ; 816 assert_param(IS_I2C_ITPENDINGBIT_OK(ITPendingBit));
2126 ; 819 if (((u16)ITPendingBit & 0xF000) == 0x1000) /* Returns whether the status register to check is SR1 */
2128 02e9 01 rrwa x,a
2129 02ea 9f ld a,xl
2130 02eb a4f0 and a,#240
2131 02ed 97 ld xl,a
2132 02ee 4f clr a
2133 02ef 02 rlwa x,a
2134 02f0 a31000 cpw x,#4096
2135 02f3 2611 jrne L1501
2136 ; 822 if ((I2C->SR1 & (u8)ITPendingBit) != 0)
2138 02f5 c65217 ld a,21015
2139 02f8 1503 bcp a,(OFST+2,sp)
2140 02fa 2706 jreq L3501
2141 ; 825 itstatus = SET;
2143 02fc a601 ld a,#1
2144 02fe 6b01 ld (OFST+0,sp),a
2146 0300 2013 jra L7501
2147 0302 L3501:
2148 ; 830 itstatus = RESET;
2150 0302 0f01 clr (OFST+0,sp)
2151 0304 200f jra L7501
2152 0306 L1501:
2153 ; 836 if ((I2C->SR2 & (u8)ITPendingBit) != 0)
2155 0306 c65218 ld a,21016
2156 0309 1503 bcp a,(OFST+2,sp)
2157 030b 2706 jreq L1601
2158 ; 839 itstatus = SET;
2160 030d a601 ld a,#1
2161 030f 6b01 ld (OFST+0,sp),a
2163 0311 2002 jra L7501
2164 0313 L1601:
2165 ; 844 itstatus = RESET;
2167 0313 0f01 clr (OFST+0,sp)
2168 0315 L7501:
2169 ; 849 return itstatus;
2171 0315 7b01 ld a,(OFST+0,sp)
2174 0317 5b03 addw sp,#3
2175 0319 81 ret
2232 ; 868 void I2C_ClearITPendingBit(I2C_ITPendingBit_TypeDef ITPendingBit)
2232 ; 869 {
2233 switch .text
2234 031a _I2C_ClearITPendingBit:
2236 031a 89 pushw x
2237 031b 5204 subw sp,#4
2238 00000004 OFST: set 4
2241 ; 870 u8 tmp1 = 0;
2243 ; 871 u8 tmp2 = 0;
2245 ; 872 u16 tmp3 = 0;
2247 ; 875 assert_param(IS_I2C_ITPENDINGBIT_OK(ITPendingBit));
2249 ; 878 tmp3 = ((u16)ITPendingBit & (u16)0x0F00);
2251 031d 01 rrwa x,a
2252 031e 9f ld a,xl
2253 031f a40f and a,#15
2254 0321 97 ld xl,a
2255 0322 4f clr a
2256 0323 02 rlwa x,a
2257 0324 1f03 ldw (OFST-1,sp),x
2258 0326 01 rrwa x,a
2259 ; 881 if(tmp3 == 0x0100)
2261 0327 1e03 ldw x,(OFST-1,sp)
2262 0329 a30100 cpw x,#256
2263 032c 2608 jrne L1111
2264 ; 884 I2C->SR2 = (u8)(~(u8)ITPendingBit);
2266 032e 7b06 ld a,(OFST+2,sp)
2267 0330 43 cpl a
2268 0331 c75218 ld 21016,a
2270 0334 2026 jra L3111
2271 0336 L1111:
2272 ; 887 else if(tmp3 == 0x0200)
2274 0336 1e03 ldw x,(OFST-1,sp)
2275 0338 a30200 cpw x,#512
2276 033b 260a jrne L5111
2277 ; 890 tmp1 = I2C->SR1;
2279 033d c65217 ld a,21015
2280 ; 892 I2C->CR2 = I2C->CR2;
2282 0340 5552115211 mov 21009,21009
2284 0345 2015 jra L3111
2285 0347 L5111:
2286 ; 895 else if(tmp3 == 0x0300)
2288 0347 1e03 ldw x,(OFST-1,sp)
2289 0349 a30300 cpw x,#768
2290 034c 2608 jrne L1211
2291 ; 899 tmp1 = I2C->SR1;
2293 034e c65217 ld a,21015
2294 ; 901 tmp2 = I2C->SR3;
2296 0351 c65219 ld a,21017
2298 0354 2006 jra L3111
2299 0356 L1211:
2300 ; 908 tmp1 = I2C->SR1;
2302 0356 c65217 ld a,21015
2303 ; 910 tmp2 = I2C->DR;
2305 0359 c65216 ld a,21014
2306 035c L3111:
2307 ; 912 }
2310 035c 5b06 addw sp,#6
2311 035e 81 ret
2324 xdef _I2C_ClearITPendingBit
2325 xdef _I2C_GetITStatus
2326 xdef _I2C_ClearFlag
2327 xdef _I2C_GetFlagStatus
2328 xdef _I2C_SendData
2329 xdef _I2C_Send7bitAddress
2330 xdef _I2C_ReceiveData
2331 xdef _I2C_CheckEvent
2332 xdef _I2C_ITConfig
2333 xdef _I2C_FastModeDutyCycleConfig
2334 xdef _I2C_AcknowledgeConfig
2335 xdef _I2C_StretchClockCmd
2336 xdef _I2C_SoftwareResetCmd
2337 xdef _I2C_GenerateSTOP
2338 xdef _I2C_GenerateSTART
2339 xdef _I2C_GeneralCallCmd
2340 xdef _I2C_Cmd
2341 xdef _I2C_Init
2342 xdef _I2C_DeInit
2343 xref.b c_lreg
2344 xref.b c_x
2363 xref c_sdivx
2364 xref c_ludv
2365 xref c_rtol
2366 xref c_smul
2367 xref c_lmul
2368 xref c_lcmp
2369 xref c_ltor
2370 end
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