📄 stm8s_i2c.ls
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633 0178 721d5210 bres 21008,#6
634 017c L302:
635 ; 261 }
638 017c 81 ret
673 ; 278 void I2C_GenerateSTART(FunctionalState NewState)
673 ; 279 {
674 switch .text
675 017d _I2C_GenerateSTART:
679 ; 282 assert_param(IS_FUNCTIONALSTATE_OK(NewState));
681 ; 284 if (NewState != DISABLE)
683 017d 4d tnz a
684 017e 2706 jreq L322
685 ; 287 I2C->CR2 |= I2C_CR2_START;
687 0180 72105211 bset 21009,#0
689 0184 2004 jra L522
690 0186 L322:
691 ; 292 I2C->CR2 &= (u8)(~I2C_CR2_START);
693 0186 72115211 bres 21009,#0
694 018a L522:
695 ; 295 }
698 018a 81 ret
733 ; 312 void I2C_GenerateSTOP(FunctionalState NewState)
733 ; 313 {
734 switch .text
735 018b _I2C_GenerateSTOP:
739 ; 316 assert_param(IS_FUNCTIONALSTATE_OK(NewState));
741 ; 318 if (NewState != DISABLE)
743 018b 4d tnz a
744 018c 2706 jreq L542
745 ; 321 I2C->CR2 |= I2C_CR2_STOP;
747 018e 72125211 bset 21009,#1
749 0192 2004 jra L742
750 0194 L542:
751 ; 326 I2C->CR2 &= (u8)(~I2C_CR2_STOP);
753 0194 72135211 bres 21009,#1
754 0198 L742:
755 ; 329 }
758 0198 81 ret
794 ; 346 void I2C_SoftwareResetCmd(FunctionalState NewState)
794 ; 347 {
795 switch .text
796 0199 _I2C_SoftwareResetCmd:
800 ; 349 assert_param(IS_FUNCTIONALSTATE_OK(NewState));
802 ; 351 if (NewState != DISABLE)
804 0199 4d tnz a
805 019a 2706 jreq L762
806 ; 354 I2C->CR2 |= I2C_CR2_SWRST;
808 019c 721e5211 bset 21009,#7
810 01a0 2004 jra L172
811 01a2 L762:
812 ; 359 I2C->CR2 &= (u8)(~I2C_CR2_SWRST);
814 01a2 721f5211 bres 21009,#7
815 01a6 L172:
816 ; 361 }
819 01a6 81 ret
855 ; 379 void I2C_StretchClockCmd(FunctionalState NewState)
855 ; 380 {
856 switch .text
857 01a7 _I2C_StretchClockCmd:
861 ; 382 assert_param(IS_FUNCTIONALSTATE_OK(NewState));
863 ; 384 if (NewState != DISABLE)
865 01a7 4d tnz a
866 01a8 2706 jreq L113
867 ; 387 I2C->CR1 &= (u8)(~I2C_CR1_NOSTRETCH);
869 01aa 721f5210 bres 21008,#7
871 01ae 2004 jra L313
872 01b0 L113:
873 ; 393 I2C->CR1 |= I2C_CR1_NOSTRETCH;
875 01b0 721e5210 bset 21008,#7
876 01b4 L313:
877 ; 395 }
880 01b4 81 ret
916 ; 412 void I2C_AcknowledgeConfig(I2C_Ack_TypeDef Ack)
916 ; 413 {
917 switch .text
918 01b5 _I2C_AcknowledgeConfig:
920 01b5 88 push a
921 00000000 OFST: set 0
924 ; 416 assert_param(IS_I2C_ACK_OK(Ack));
926 ; 418 if (Ack == I2C_ACK_NONE)
928 01b6 4d tnz a
929 01b7 2606 jrne L333
930 ; 421 I2C->CR2 &= (u8)(~I2C_CR2_ACK);
932 01b9 72155211 bres 21009,#2
934 01bd 2014 jra L533
935 01bf L333:
936 ; 426 I2C->CR2 |= I2C_CR2_ACK;
938 01bf 72145211 bset 21009,#2
939 ; 428 if (Ack == I2C_ACK_CURR)
941 01c3 7b01 ld a,(OFST+1,sp)
942 01c5 a101 cp a,#1
943 01c7 2606 jrne L733
944 ; 431 I2C->CR2 &= (u8)(~I2C_CR2_POS);
946 01c9 72175211 bres 21009,#3
948 01cd 2004 jra L533
949 01cf L733:
950 ; 436 I2C->CR2 |= I2C_CR2_POS;
952 01cf 72165211 bset 21009,#3
953 01d3 L533:
954 ; 440 }
957 01d3 84 pop a
958 01d4 81 ret
1030 ; 459 void I2C_ITConfig(I2C_IT_TypeDef ITName, FunctionalState NewState)
1030 ; 460 {
1031 switch .text
1032 01d5 _I2C_ITConfig:
1034 01d5 89 pushw x
1035 00000000 OFST: set 0
1038 ; 463 assert_param(IS_I2C_INTERRUPT_OK(ITName));
1040 ; 464 assert_param(IS_FUNCTIONALSTATE_OK(NewState));
1042 ; 466 if (NewState != DISABLE)
1044 01d6 9f ld a,xl
1045 01d7 4d tnz a
1046 01d8 2709 jreq L773
1047 ; 469 I2C->ITR |= (u8)ITName;
1049 01da 9e ld a,xh
1050 01db ca521a or a,21018
1051 01de c7521a ld 21018,a
1053 01e1 2009 jra L104
1054 01e3 L773:
1055 ; 474 I2C->ITR &= (u8)(~(u8)ITName);
1057 01e3 7b01 ld a,(OFST+1,sp)
1058 01e5 43 cpl a
1059 01e6 c4521a and a,21018
1060 01e9 c7521a ld 21018,a
1061 01ec L104:
1062 ; 476 }
1065 01ec 85 popw x
1066 01ed 81 ret
1102 ; 493 void I2C_FastModeDutyCycleConfig(I2C_DutyCycle_TypeDef DutyCycle)
1102 ; 494 {
1103 switch .text
1104 01ee _I2C_FastModeDutyCycleConfig:
1108 ; 497 assert_param(IS_I2C_DUTYCYCLE_OK(DutyCycle));
1110 ; 499 if (DutyCycle == I2C_DUTYCYCLE_16_9)
1112 01ee a140 cp a,#64
1113 01f0 2606 jrne L124
1114 ; 502 I2C->CCRH |= I2C_CCRH_DUTY;
1116 01f2 721c521c bset 21020,#6
1118 01f6 2004 jra L324
1119 01f8 L124:
1120 ; 507 I2C->CCRH &= (u8)(~I2C_CCRH_DUTY);
1122 01f8 721d521c bres 21020,#6
1123 01fc L324:
1124 ; 510 }
1127 01fc 81 ret
1301 ; 531 ErrorStatus I2C_CheckEvent(I2C_Event_TypeDef I2C_Event)
1301 ; 532 {
1302 switch .text
1303 01fd _I2C_CheckEvent:
1305 01fd 89 pushw x
1306 01fe 89 pushw x
1307 00000002 OFST: set 2
1310 ; 534 u8 flag1 = 0;
1312 ; 535 u8 flag2 = 0;
1314 ; 536 ErrorStatus status = ERROR;
1316 ; 539 assert_param(IS_I2C_EVENT_OK(I2C_Event));
1318 ; 541 flag1 = I2C->SR1;
1320 01ff c65217 ld a,21015
1321 0202 6b01 ld (OFST-1,sp),a
1322 ; 542 flag2 = I2C->SR2;
1324 0204 c65218 ld a,21016
1325 0207 6b02 ld (OFST+0,sp),a
1326 ; 545 if (((u16)I2C_Event & (u16)0x0F00) == 0x0700)
1328 0209 01 rrwa x,a
1329 020a 9f ld a,xl
1330 020b a40f and a,#15
1331 020d 97 ld xl,a
1332 020e 4f clr a
1333 020f 02 rlwa x,a
1334 0210 a30700 cpw x,#1792
1335 0213 2610 jrne L515
1336 ; 548 if (flag1 & (u8)I2C_Event)
1338 0215 7b04 ld a,(OFST+2,sp)
1339 0217 1501 bcp a,(OFST-1,sp)
1340 0219 2706 jreq L715
1341 ; 551 status = SUCCESS;
1343 021b a601 ld a,#1
1344 021d 6b02 ld (OFST+0,sp),a
1346 021f 2012 jra L325
1347 0221 L715:
1348 ; 556 status = ERROR;
1350 0221 0f02 clr (OFST+0,sp)
1351 0223 200e jra L325
1352 0225 L515:
1353 ; 561 if (flag2 & (u8)I2C_Event)
1355 0225 7b04 ld a,(OFST+2,sp)
1356 0227 1502 bcp a,(OFST+0,sp)
1357 0229 2706 jreq L525
1358 ; 564 status = SUCCESS;
1360 022b a601 ld a,#1
1361 022d 6b02 ld (OFST+0,sp),a
1363 022f 2002 jra L325
1364 0231 L525:
1365 ; 569 status = ERROR;
1367 0231 0f02 clr (OFST+0,sp)
1368 0233 L325:
1369 ; 574 return status;
1371 0233 7b02 ld a,(OFST+0,sp)
1374 0235 5b04 addw sp,#4
1375 0237 81 ret
1398 ; 594 u8 I2C_ReceiveData(void)
1398 ; 595 {
1399 switch .text
1400 0238 _I2C_ReceiveData:
1404 ; 597 return ((u8)I2C->DR);
1406 0238 c65216 ld a,21014
1409 023b 81 ret
1472 ; 616 void I2C_Send7bitAddress(u8 Address, I2C_Direction_TypeDef Direction)
1472 ; 617 {
1473 switch .text
1474 023c _I2C_Send7bitAddress:
1476 023c 89 pushw x
1477 00000000 OFST: set 0
1480 ; 619 assert_param(IS_I2C_ADDRESS_OK(Address));
1482 ; 620 assert_param(IS_I2C_DIRECTION_OK(Direction));
1484 ; 623 Address &= (u8)0xFE;
1486 023d 7b01 ld a,(OFST+1,sp)
1487 023f a4fe and a,#254
1488 0241 6b01 ld (OFST+1,sp),a
1489 ; 626 I2C->DR = (u8)(Address | (u8)Direction);
1491 0243 7b01 ld a,(OFST+1,sp)
1492 0245 1a02 or a,(OFST+2,sp)
1493 0247 c75216 ld 21014,a
1494 ; 627 }
1497 024a 85 popw x
1498 024b 81 ret
1530 ; 643 void I2C_SendData(u8 Data)
1530 ; 644 {
1531 switch .text
1532 024c _I2C_SendData:
1536 ; 646 I2C->DR = Data;
1538 024c c75216 ld 21014,a
1539 ; 647 }
1542 024f 81 ret
1739 ; 666 FlagStatus I2C_GetFlagStatus(I2C_Flag_TypeDef Flag)
1739 ; 667 {
1740 switch .text
1741 0250 _I2C_GetFlagStatus:
1743 0250 89 pushw x
1744 0251 88 push a
1745 00000001 OFST: set 1
1748 ; 669 FlagStatus bitstatus = RESET;
1750 0252 0f01 clr (OFST+0,sp)
1751 ; 672 assert_param(IS_I2C_FLAG_OK(Flag));
1753 ; 675 switch ((u16)Flag & (u16)0xF000)
1755 0254 01 rrwa x,a
1756 0255 9f ld a,xl
1757 0256 a4f0 and a,#240
1758 0258 97 ld xl,a
1759 0259 4f clr a
1760 025a 02 rlwa x,a
1762 ; 723 default:
1762 ; 724 break;
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