📄 stm8s_i2c.ls
字号:
1 ; C Compiler for STM8 (COSMIC Software)
2 ; Parser V4.8.32.1 - 30 Mar 2010
3 ; Generator V4.3.4 - 23 Mar 2010
43 ; 64 void I2C_DeInit(void)
43 ; 65 {
45 switch .text
46 0000 _I2C_DeInit:
50 ; 66 I2C->CR1 = I2C_CR1_RESET_VALUE;
52 0000 725f5210 clr 21008
53 ; 67 I2C->CR2 = I2C_CR2_RESET_VALUE;
55 0004 725f5211 clr 21009
56 ; 68 I2C->FREQR = I2C_FREQR_RESET_VALUE;
58 0008 725f5212 clr 21010
59 ; 69 I2C->OARL = I2C_OARL_RESET_VALUE;
61 000c 725f5213 clr 21011
62 ; 70 I2C->OARH = I2C_OARH_RESET_VALUE;
64 0010 725f5214 clr 21012
65 ; 71 I2C->ITR = I2C_ITR_RESET_VALUE;
67 0014 725f521a clr 21018
68 ; 72 I2C->CCRL = I2C_CCRL_RESET_VALUE;
70 0018 725f521b clr 21019
71 ; 73 I2C->CCRH = I2C_CCRH_RESET_VALUE;
73 001c 725f521c clr 21020
74 ; 74 I2C->TRISER = I2C_TRISER_RESET_VALUE;
76 0020 3502521d mov 21021,#2
77 ; 75 }
80 0024 81 ret
247 .const: section .text
248 0000 L01:
249 0000 000186a1 dc.l 100001
250 0004 L21:
251 0004 000f4240 dc.l 1000000
252 ; 99 void I2C_Init(u32 OutputClockFrequencyHz, u16 OwnAddress, I2C_DutyCycle_TypeDef DutyCycle, I2C_Ack_TypeDef Ack, I2C_AddMode_TypeDef AddMode, u8 InputClockFrequencyMHz )
252 ; 100 {
253 switch .text
254 0025 _I2C_Init:
256 0025 5209 subw sp,#9
257 00000009 OFST: set 9
260 ; 101 u16 result = 0x0004;
262 ; 102 u16 tmpval = 0;
264 ; 103 u8 tmpccrh = 0;
266 0027 0f07 clr (OFST-2,sp)
267 ; 106 assert_param(IS_I2C_ACK_OK(Ack));
269 ; 107 assert_param(IS_I2C_ADDMODE_OK(AddMode));
271 ; 108 assert_param(IS_I2C_OWN_ADDRESS_OK(OwnAddress));
273 ; 109 assert_param(IS_I2C_INPUT_CLOCK_FREQ_OK(InputClockFrequencyMHz));
275 ; 110 assert_param(IS_I2C_OUTPUT_CLOCK_FREQ_OK(OutputClockFrequencyHz));
277 ; 115 I2C->FREQR &= (u8)(~I2C_FREQR_FREQ);
279 0029 c65212 ld a,21010
280 002c a4c0 and a,#192
281 002e c75212 ld 21010,a
282 ; 117 I2C->FREQR |= InputClockFrequencyMHz;
284 0031 c65212 ld a,21010
285 0034 1a15 or a,(OFST+12,sp)
286 0036 c75212 ld 21010,a
287 ; 121 I2C->CR1 &= (u8)(~I2C_CR1_PE);
289 0039 72115210 bres 21008,#0
290 ; 124 I2C->CCRH &= (u8)(~(I2C_CCRH_FS | I2C_CCRH_DUTY | I2C_CCRH_CCR));
292 003d c6521c ld a,21020
293 0040 a430 and a,#48
294 0042 c7521c ld 21020,a
295 ; 125 I2C->CCRL &= (u8)(~I2C_CCRL_CCR);
297 0045 725f521b clr 21019
298 ; 128 if (OutputClockFrequencyHz > I2C_MAX_STANDARD_FREQ) /* FAST MODE */
300 0049 96 ldw x,sp
301 004a 1c000c addw x,#OFST+3
302 004d cd0000 call c_ltor
304 0050 ae0000 ldw x,#L01
305 0053 cd0000 call c_lcmp
307 0056 2403 jruge L41
308 0058 cc00e5 jp L511
309 005b L41:
310 ; 131 tmpccrh = I2C_CCRH_FS;
312 005b a680 ld a,#128
313 005d 6b07 ld (OFST-2,sp),a
314 ; 133 if (DutyCycle == I2C_DUTYCYCLE_2)
316 005f 0d12 tnz (OFST+9,sp)
317 0061 2630 jrne L711
318 ; 136 result = (u16) ((InputClockFrequencyMHz * 1000000) / (OutputClockFrequencyHz * 3));
320 0063 96 ldw x,sp
321 0064 1c000c addw x,#OFST+3
322 0067 cd0000 call c_ltor
324 006a a603 ld a,#3
325 006c cd0000 call c_smul
327 006f 96 ldw x,sp
328 0070 1c0001 addw x,#OFST-8
329 0073 cd0000 call c_rtol
331 0076 7b15 ld a,(OFST+12,sp)
332 0078 b703 ld c_lreg+3,a
333 007a 3f02 clr c_lreg+2
334 007c 3f01 clr c_lreg+1
335 007e 3f00 clr c_lreg
336 0080 ae0004 ldw x,#L21
337 0083 cd0000 call c_lmul
339 0086 96 ldw x,sp
340 0087 1c0001 addw x,#OFST-8
341 008a cd0000 call c_ludv
343 008d be02 ldw x,c_lreg+2
344 008f 1f08 ldw (OFST-1,sp),x
346 0091 2034 jra L121
347 0093 L711:
348 ; 141 result = (u16) ((InputClockFrequencyMHz * 1000000) / (OutputClockFrequencyHz * 25));
350 0093 96 ldw x,sp
351 0094 1c000c addw x,#OFST+3
352 0097 cd0000 call c_ltor
354 009a a619 ld a,#25
355 009c cd0000 call c_smul
357 009f 96 ldw x,sp
358 00a0 1c0001 addw x,#OFST-8
359 00a3 cd0000 call c_rtol
361 00a6 7b15 ld a,(OFST+12,sp)
362 00a8 b703 ld c_lreg+3,a
363 00aa 3f02 clr c_lreg+2
364 00ac 3f01 clr c_lreg+1
365 00ae 3f00 clr c_lreg
366 00b0 ae0004 ldw x,#L21
367 00b3 cd0000 call c_lmul
369 00b6 96 ldw x,sp
370 00b7 1c0001 addw x,#OFST-8
371 00ba cd0000 call c_ludv
373 00bd be02 ldw x,c_lreg+2
374 00bf 1f08 ldw (OFST-1,sp),x
375 ; 143 tmpccrh |= I2C_CCRH_DUTY;
377 00c1 7b07 ld a,(OFST-2,sp)
378 00c3 aa40 or a,#64
379 00c5 6b07 ld (OFST-2,sp),a
380 00c7 L121:
381 ; 147 if (result < (u16)0x01)
383 00c7 1e08 ldw x,(OFST-1,sp)
384 00c9 2605 jrne L321
385 ; 150 result = (u16)0x0001;
387 00cb ae0001 ldw x,#1
388 00ce 1f08 ldw (OFST-1,sp),x
389 00d0 L321:
390 ; 156 tmpval = ((InputClockFrequencyMHz * 3) / 10) + 1;
392 00d0 7b15 ld a,(OFST+12,sp)
393 00d2 97 ld xl,a
394 00d3 a603 ld a,#3
395 00d5 42 mul x,a
396 00d6 a60a ld a,#10
397 00d8 cd0000 call c_sdivx
399 00db 5c incw x
400 00dc 1f05 ldw (OFST-4,sp),x
401 ; 157 I2C->TRISER = (u8)tmpval;
403 00de 7b06 ld a,(OFST-3,sp)
404 00e0 c7521d ld 21021,a
406 00e3 2043 jra L521
407 00e5 L511:
408 ; 164 result = (u16)((InputClockFrequencyMHz * 1000000) / (OutputClockFrequencyHz << (u8)1));
410 00e5 96 ldw x,sp
411 00e6 1c000c addw x,#OFST+3
412 00e9 cd0000 call c_ltor
414 00ec 3803 sll c_lreg+3
415 00ee 3902 rlc c_lreg+2
416 00f0 3901 rlc c_lreg+1
417 00f2 3900 rlc c_lreg
418 00f4 96 ldw x,sp
419 00f5 1c0001 addw x,#OFST-8
420 00f8 cd0000 call c_rtol
422 00fb 7b15 ld a,(OFST+12,sp)
423 00fd b703 ld c_lreg+3,a
424 00ff 3f02 clr c_lreg+2
425 0101 3f01 clr c_lreg+1
426 0103 3f00 clr c_lreg
427 0105 ae0004 ldw x,#L21
428 0108 cd0000 call c_lmul
430 010b 96 ldw x,sp
431 010c 1c0001 addw x,#OFST-8
432 010f cd0000 call c_ludv
434 0112 be02 ldw x,c_lreg+2
435 0114 1f08 ldw (OFST-1,sp),x
436 ; 167 if (result < (u16)0x0004)
438 0116 1e08 ldw x,(OFST-1,sp)
439 0118 a30004 cpw x,#4
440 011b 2405 jruge L721
441 ; 170 result = (u16)0x0004;
443 011d ae0004 ldw x,#4
444 0120 1f08 ldw (OFST-1,sp),x
445 0122 L721:
446 ; 176 I2C->TRISER = (u8)(InputClockFrequencyMHz + 1);
448 0122 7b15 ld a,(OFST+12,sp)
449 0124 4c inc a
450 0125 c7521d ld 21021,a
451 0128 L521:
452 ; 181 I2C->CCRL = (u8)result;
454 0128 7b09 ld a,(OFST+0,sp)
455 012a c7521b ld 21019,a
456 ; 182 I2C->CCRH = (u8)(((u8)(result >> 8) & I2C_CCRH_CCR) | tmpccrh);
458 012d 7b08 ld a,(OFST-1,sp)
459 012f a40f and a,#15
460 0131 1a07 or a,(OFST-2,sp)
461 0133 c7521c ld 21020,a
462 ; 185 I2C->CR1 |= I2C_CR1_PE;
464 0136 72105210 bset 21008,#0
465 ; 188 I2C_AcknowledgeConfig(Ack);
467 013a 7b13 ld a,(OFST+10,sp)
468 013c ad77 call _I2C_AcknowledgeConfig
470 ; 191 I2C->OARL = (u8)(OwnAddress);
472 013e 7b11 ld a,(OFST+8,sp)
473 0140 c75213 ld 21011,a
474 ; 192 I2C->OARH = (u8)((u8)AddMode |
474 ; 193 I2C_OARH_ADDCONF |
474 ; 194 (u8)((OwnAddress & (u16)0x0300) >> (u8)7));
476 0143 7b10 ld a,(OFST+7,sp)
477 0145 97 ld xl,a
478 0146 7b11 ld a,(OFST+8,sp)
479 0148 9f ld a,xl
480 0149 a403 and a,#3
481 014b 97 ld xl,a
482 014c 4f clr a
483 014d 02 rlwa x,a
484 014e 4f clr a
485 014f 01 rrwa x,a
486 0150 48 sll a
487 0151 59 rlcw x
488 0152 9f ld a,xl
489 0153 6b04 ld (OFST-5,sp),a
490 0155 7b14 ld a,(OFST+11,sp)
491 0157 aa40 or a,#64
492 0159 1a04 or a,(OFST-5,sp)
493 015b c75214 ld 21012,a
494 ; 195 }
497 015e 5b09 addw sp,#9
498 0160 81 ret
553 ; 212 void I2C_Cmd(FunctionalState NewState)
553 ; 213 {
554 switch .text
555 0161 _I2C_Cmd:
559 ; 216 assert_param(IS_FUNCTIONALSTATE_OK(NewState));
561 ; 218 if (NewState != DISABLE)
563 0161 4d tnz a
564 0162 2706 jreq L751
565 ; 221 I2C->CR1 |= I2C_CR1_PE;
567 0164 72105210 bset 21008,#0
569 0168 2004 jra L161
570 016a L751:
571 ; 226 I2C->CR1 &= (u8)(~I2C_CR1_PE);
573 016a 72115210 bres 21008,#0
574 016e L161:
575 ; 228 }
578 016e 81 ret
613 ; 245 void I2C_GeneralCallCmd(FunctionalState NewState)
613 ; 246 {
614 switch .text
615 016f _I2C_GeneralCallCmd:
619 ; 249 assert_param(IS_FUNCTIONALSTATE_OK(NewState));
621 ; 251 if (NewState != DISABLE)
623 016f 4d tnz a
624 0170 2706 jreq L102
625 ; 254 I2C->CR1 |= I2C_CR1_ENGC;
627 0172 721c5210 bset 21008,#6
629 0176 2004 jra L302
630 0178 L102:
631 ; 259 I2C->CR1 &= (u8)(~I2C_CR1_ENGC);
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -