📄 stm8s_adc2.ls
字号:
990 00da 43 cpl a
991 00db c45406 and a,21510
992 00de c75406 ld 21510,a
994 00e1 2015 jra L304
995 00e3 L514:
996 ; 296 ADC2->TDRH |= (u8)((u8)0x01 << ((u8)ADC2_SchmittTriggerChannel - (u8)8));
998 00e3 7b01 ld a,(OFST+1,sp)
999 00e5 a008 sub a,#8
1000 00e7 5f clrw x
1001 00e8 97 ld xl,a
1002 00e9 a601 ld a,#1
1003 00eb 5d tnzw x
1004 00ec 2704 jreq L43
1005 00ee L63:
1006 00ee 48 sll a
1007 00ef 5a decw x
1008 00f0 26fc jrne L63
1009 00f2 L43:
1010 00f2 ca5406 or a,21510
1011 00f5 c75406 ld 21510,a
1012 00f8 L304:
1013 ; 300 }
1016 00f8 85 popw x
1017 00f9 81 ret
1074 ; 322 void ADC2_ConversionConfig(ADC2_ConvMode_TypeDef ADC2_ConversionMode, ADC2_Channel_TypeDef ADC2_Channel, ADC2_Align_TypeDef ADC2_Align)
1074 ; 323 {
1075 switch .text
1076 00fa _ADC2_ConversionConfig:
1078 00fa 89 pushw x
1079 00000000 OFST: set 0
1082 ; 326 assert_param(IS_ADC2_CONVERSIONMODE_OK(ADC2_ConversionMode));
1084 ; 327 assert_param(IS_ADC2_CHANNEL_OK(ADC2_Channel));
1086 ; 328 assert_param(IS_ADC2_ALIGN_OK(ADC2_Align));
1088 ; 331 ADC2->CR2 &= (u8)(~ADC2_CR2_ALIGN);
1090 00fb 72175402 bres 21506,#3
1091 ; 333 ADC2->CR2 |= (u8)(ADC2_Align);
1093 00ff c65402 ld a,21506
1094 0102 1a05 or a,(OFST+5,sp)
1095 0104 c75402 ld 21506,a
1096 ; 335 if (ADC2_ConversionMode == ADC2_CONVERSIONMODE_CONTINUOUS)
1098 0107 9e ld a,xh
1099 0108 a101 cp a,#1
1100 010a 2606 jrne L744
1101 ; 338 ADC2->CR1 |= ADC2_CR1_CONT;
1103 010c 72125401 bset 21505,#1
1105 0110 2004 jra L154
1106 0112 L744:
1107 ; 343 ADC2->CR1 &= (u8)(~ADC2_CR1_CONT);
1109 0112 72135401 bres 21505,#1
1110 0116 L154:
1111 ; 347 ADC2->CSR &= (u8)(~ADC2_CSR_CH);
1113 0116 c65400 ld a,21504
1114 0119 a4f0 and a,#240
1115 011b c75400 ld 21504,a
1116 ; 349 ADC2->CSR |= (u8)(ADC2_Channel);
1118 011e c65400 ld a,21504
1119 0121 1a02 or a,(OFST+2,sp)
1120 0123 c75400 ld 21504,a
1121 ; 351 }
1124 0126 85 popw x
1125 0127 81 ret
1171 ; 373 void ADC2_ExternalTriggerConfig(ADC2_ExtTrig_TypeDef ADC2_ExtTrigger, FunctionalState ADC2_ExtTrigState)
1171 ; 374 {
1172 switch .text
1173 0128 _ADC2_ExternalTriggerConfig:
1175 0128 89 pushw x
1176 00000000 OFST: set 0
1179 ; 377 assert_param(IS_ADC2_EXTTRIG_OK(ADC2_ExtTrigger));
1181 ; 378 assert_param(IS_FUNCTIONALSTATE_OK(ADC2_ExtTrigState));
1183 ; 381 ADC2->CR2 &= (u8)(~ADC2_CR2_EXTSEL);
1185 0129 c65402 ld a,21506
1186 012c a4cf and a,#207
1187 012e c75402 ld 21506,a
1188 ; 383 if (ADC2_ExtTrigState != DISABLE)
1190 0131 9f ld a,xl
1191 0132 4d tnz a
1192 0133 2706 jreq L574
1193 ; 386 ADC2->CR2 |= (u8)(ADC2_CR2_EXTTRIG);
1195 0135 721c5402 bset 21506,#6
1197 0139 2004 jra L774
1198 013b L574:
1199 ; 391 ADC2->CR2 &= (u8)(~ADC2_CR2_EXTTRIG);
1201 013b 721d5402 bres 21506,#6
1202 013f L774:
1203 ; 395 ADC2->CR2 |= (u8)(ADC2_ExtTrigger);
1205 013f c65402 ld a,21506
1206 0142 1a01 or a,(OFST+1,sp)
1207 0144 c75402 ld 21506,a
1208 ; 397 }
1211 0147 85 popw x
1212 0148 81 ret
1236 ; 417 void ADC2_StartConversion(void)
1236 ; 418 {
1237 switch .text
1238 0149 _ADC2_StartConversion:
1242 ; 419 ADC2->CR1 |= ADC2_CR1_ADON;
1244 0149 72105401 bset 21505,#0
1245 ; 420 }
1248 014d 81 ret
1288 ; 438 u16 ADC2_GetConversionValue(void)
1288 ; 439 {
1289 switch .text
1290 014e _ADC2_GetConversionValue:
1292 014e 5205 subw sp,#5
1293 00000005 OFST: set 5
1296 ; 441 u16 temph = 0;
1298 ; 442 u8 templ = 0;
1300 ; 444 if (ADC2->CR2 & ADC2_CR2_ALIGN) /* Right alignment */
1302 0150 c65402 ld a,21506
1303 0153 a508 bcp a,#8
1304 0155 2715 jreq L725
1305 ; 447 templ = ADC2->DRL;
1307 0157 c65405 ld a,21509
1308 015a 6b03 ld (OFST-2,sp),a
1309 ; 449 temph = ADC2->DRH;
1311 015c c65404 ld a,21508
1312 015f 5f clrw x
1313 0160 97 ld xl,a
1314 0161 1f04 ldw (OFST-1,sp),x
1315 ; 451 temph = (u16)(templ | (u16)(temph << (u8)8));
1317 0163 1e04 ldw x,(OFST-1,sp)
1318 0165 7b03 ld a,(OFST-2,sp)
1319 0167 02 rlwa x,a
1320 0168 1f04 ldw (OFST-1,sp),x
1322 016a 2021 jra L135
1323 016c L725:
1324 ; 456 temph = ADC2->DRH;
1326 016c c65404 ld a,21508
1327 016f 5f clrw x
1328 0170 97 ld xl,a
1329 0171 1f04 ldw (OFST-1,sp),x
1330 ; 458 templ = ADC2->DRL;
1332 0173 c65405 ld a,21509
1333 0176 6b03 ld (OFST-2,sp),a
1334 ; 460 temph = (u16)((u16)(templ << (u8)6) | (u16)(temph << (u8)8));
1336 0178 1e04 ldw x,(OFST-1,sp)
1337 017a 4f clr a
1338 017b 02 rlwa x,a
1339 017c 1f01 ldw (OFST-4,sp),x
1340 017e 7b03 ld a,(OFST-2,sp)
1341 0180 97 ld xl,a
1342 0181 a640 ld a,#64
1343 0183 42 mul x,a
1344 0184 01 rrwa x,a
1345 0185 1a02 or a,(OFST-3,sp)
1346 0187 01 rrwa x,a
1347 0188 1a01 or a,(OFST-4,sp)
1348 018a 01 rrwa x,a
1349 018b 1f04 ldw (OFST-1,sp),x
1350 018d L135:
1351 ; 463 return ((u16)temph);
1353 018d 1e04 ldw x,(OFST-1,sp)
1356 018f 5b05 addw sp,#5
1357 0191 81 ret
1401 ; 483 FlagStatus ADC2_GetFlagStatus(void)
1401 ; 484 {
1402 switch .text
1403 0192 _ADC2_GetFlagStatus:
1407 ; 486 return ((u8)(ADC2->CSR & ADC2_CSR_EOC));
1409 0192 c65400 ld a,21504
1410 0195 a480 and a,#128
1413 0197 81 ret
1436 ; 505 void ADC2_ClearFlag(void)
1436 ; 506 {
1437 switch .text
1438 0198 _ADC2_ClearFlag:
1442 ; 507 ADC2->CSR &= (u8)(~ADC2_CSR_EOC);
1444 0198 721f5400 bres 21504,#7
1445 ; 508 }
1448 019c 81 ret
1472 ; 526 ITStatus ADC2_GetITStatus(void)
1472 ; 527 {
1473 switch .text
1474 019d _ADC2_GetITStatus:
1478 ; 528 return ((u8)(ADC2->CSR & ADC2_CSR_EOC));
1480 019d c65400 ld a,21504
1481 01a0 a480 and a,#128
1484 01a2 81 ret
1508 ; 546 void ADC2_ClearITPendingBit(void)
1508 ; 547 {
1509 switch .text
1510 01a3 _ADC2_ClearITPendingBit:
1514 ; 548 ADC2->CSR &= (u8)(~ADC2_CSR_EOC);
1516 01a3 721f5400 bres 21504,#7
1517 ; 549 }
1520 01a7 81 ret
1533 xdef _ADC2_ClearITPendingBit
1534 xdef _ADC2_GetITStatus
1535 xdef _ADC2_ClearFlag
1536 xdef _ADC2_GetFlagStatus
1537 xdef _ADC2_GetConversionValue
1538 xdef _ADC2_StartConversion
1539 xdef _ADC2_ExternalTriggerConfig
1540 xdef _ADC2_ConversionConfig
1541 xdef _ADC2_SchmittTriggerConfig
1542 xdef _ADC2_PrescalerConfig
1543 xdef _ADC2_ITConfig
1544 xdef _ADC2_Cmd
1545 xdef _ADC2_Init
1546 xdef _ADC2_DeInit
1565 end
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