📄 stm8s_tim2.c
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* @param[in] NewState new state of the Capture Compare Preload register.
* This parameter can be ENABLE or DISABLE.
* @retval void None
* @par Required preconditions:
* None
* @par Called functions:
* None
* @par Example:
* Enable the TIM2 peripheral Preload Register on CCR1.
* @code
* TIM2_OC1PreloadConfig(ENABLE);
* @endcode
*/
void TIM2_OC1PreloadConfig(FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_FUNCTIONALSTATE_OK(NewState));
/* Set or Reset the OC1PE Bit */
if (NewState != DISABLE)
{
TIM2->CCMR1 |= TIM2_CCMR_OCxPE;
}
else
{
TIM2->CCMR1 &= (u8)(~TIM2_CCMR_OCxPE);
}
}
/**
* @brief Enables or disables the TIM2 peripheral Preload Register on CCR2.
* @param[in] NewState new state of the Capture Compare Preload register.
* This parameter can be ENABLE or DISABLE.
* @retval void None
* @par Required preconditions:
* None
* @par Called functions:
* None
* @par Example:
* Enable the TIM2 peripheral Preload Register on CCR2.
* @code
* TIM2_OC2PreloadConfig(ENABLE);
* @endcode
*/
void TIM2_OC2PreloadConfig(FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_FUNCTIONALSTATE_OK(NewState));
/* Set or Reset the OC2PE Bit */
if (NewState != DISABLE)
{
TIM2->CCMR2 |= TIM2_CCMR_OCxPE;
}
else
{
TIM2->CCMR2 &= (u8)(~TIM2_CCMR_OCxPE);
}
}
/**
* @brief Enables or disables the TIM2 peripheral Preload Register on CCR3.
* @param[in] NewState new state of the Capture Compare Preload register.
* This parameter can be ENABLE or DISABLE.
* @retval void None
* @par Required preconditions:
* None
* @par Called functions:
* None
* @par Example:
* Enable the TIM2 peripheral Preload Register on CCR3.
* @code
* TIM2_OC3PreloadConfig(ENABLE);
* @endcode
*/
void TIM2_OC3PreloadConfig(FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_FUNCTIONALSTATE_OK(NewState));
/* Set or Reset the OC3PE Bit */
if (NewState != DISABLE)
{
TIM2->CCMR3 |= TIM2_CCMR_OCxPE;
}
else
{
TIM2->CCMR3 &= (u8)(~TIM2_CCMR_OCxPE);
}
}
/**
* @brief Configures the TIM2 event to be generated by software.
* @param[in] TIM2_EventSource specifies the event source.
* This parameter can be one of the following values:
* - TIM2_EVENTSOURCE_UPDATE: TIM2 update Event source
* - TIM2_EVENTSOURCE_CC1: TIM2 Capture Compare 1 Event source
* - TIM2_EVENTSOURCE_CC2: TIM2 Capture Compare 2 Event source
* - TIM2_EVENTSOURCE_CC3: TIM2 Capture Compare 3 Event source
* @retval void None
* @par Required preconditions:
* None
* @par Called functions:
* None
* @par Example:
* Configure the TIM2 event to be generated by software.
* @code
* TIM2_GenerateEvent(TIM2_EVENTSOURCE_UPDATE);
* @endcode
*/
void TIM2_GenerateEvent(TIM2_EventSource_TypeDef TIM2_EventSource)
{
/* Check the parameters */
assert_param(IS_TIM2_EVENT_SOURCE_OK(TIM2_EventSource));
/* Set the event sources */
TIM2->EGR = TIM2_EventSource;
}
/**
* @brief Configures the TIM2 Channel 1 polarity.
* @param[in] TIM2_OCPolarity specifies the OC1 Polarity.
* This parameter can be one of the following values:
* - TIM2_OCPOLARITY_LOW: Output Compare active low
* - TIM2_OCPOLARITY_HIGH: Output Compare active high
* @retval void None
* @par Required preconditions:
* None
* @par Called functions:
* None
* @par Example:
* Configure the TIM2 Channel 1 polarity to High.
* @code
* TIM2_OC1PolarityConfig(TIM2_OCPOLARITY_HIGH);
* @endcode
*/
void TIM2_OC1PolarityConfig(TIM2_OCPolarity_TypeDef TIM2_OCPolarity)
{
/* Check the parameters */
assert_param(IS_TIM2_OC_POLARITY_OK(TIM2_OCPolarity));
/* Set or Reset the CC1P Bit */
if (TIM2_OCPolarity != TIM2_OCPOLARITY_HIGH)
{
TIM2->CCER1 |= TIM2_CCER1_CC1P;
}
else
{
TIM2->CCER1 &= (u8)(~TIM2_CCER1_CC1P);
}
}
/**
* @brief Configures the TIM2 Channel 2 polarity.
* @param[in] TIM2_OCPolarity specifies the OC2 Polarity.
* This parameter can be one of the following values:
* - TIM2_OCPOLARITY_LOW: Output Compare active low
* - TIM2_OCPOLARITY_HIGH: Output Compare active high
* @retval void None
* @par Required preconditions:
* None
* @par Called functions:
* None
* @par Example:
* Configure the TIM2 Channel 2 polarity to High.
* @code
* TIM2_OC2PolarityConfig(TIM2_OCPOLARITY_HIGH);
* @endcode
*/
void TIM2_OC2PolarityConfig(TIM2_OCPolarity_TypeDef TIM2_OCPolarity)
{
/* Check the parameters */
assert_param(IS_TIM2_OC_POLARITY_OK(TIM2_OCPolarity));
/* Set or Reset the CC2P Bit */
if (TIM2_OCPolarity != TIM2_OCPOLARITY_HIGH)
{
TIM2->CCER1 |= TIM2_CCER1_CC2P;
}
else
{
TIM2->CCER1 &= (u8)(~TIM2_CCER1_CC2P);
}
}
/**
* @brief Configures the TIM2 Channel 3 polarity.
* @param[in] TIM2_OCPolarity specifies the OC3 Polarity.
* This parameter can be one of the following values:
* - TIM2_OCPOLARITY_LOW: Output Compare active low
* - TIM2_OCPOLARITY_HIGH: Output Compare active high
* @retval void None
* @par Required preconditions:
* None
* @par Called functions:
* None
* @par Example:
* Configure the TIM2 Channel 3 polarity to High.
* @code
* TIM2_OC3PolarityConfig(TIM2_OCPOLARITY_HIGH);
* @endcode
*/
void TIM2_OC3PolarityConfig(TIM2_OCPolarity_TypeDef TIM2_OCPolarity)
{
/* Check the parameters */
assert_param(IS_TIM2_OC_POLARITY_OK(TIM2_OCPolarity));
/* Set or Reset the CC3P Bit */
if (TIM2_OCPolarity != TIM2_OCPOLARITY_HIGH)
{
TIM2->CCER2 |= TIM2_CCER2_CC3P;
}
else
{
TIM2->CCER2 &= (u8)(~TIM2_CCER2_CC3P);
}
}
/**
* @brief Enables or disables the TIM2 Capture Compare Channel x.
* @param[in] TIM2_Channel specifies the TIM2 Channel.
* This parameter can be one of the following values:
* - TIM2_CHANNEL_1: TIM2 Channel1
* - TIM2_CHANNEL_2: TIM2 Channel2
* - TIM2_CHANNEL_3: TIM2 Channel3
* @param[in] NewState specifies the TIM2 Channel CCxE bit new state.
* This parameter can be: ENABLE or DISABLE.
* @retval void None
* @par Required preconditions:
* None
* @par Called functions:
* None
* @par Example:
* Enable the TIM2 Capture Compare Channel 1.
* @code
* TIM2_CCxCmd(TIM2_CHANNEL_1, ENABLE);
* @endcode
*/
void TIM2_CCxCmd(TIM2_Channel_TypeDef TIM2_Channel, FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_TIM2_CHANNEL_OK(TIM2_Channel));
assert_param(IS_FUNCTIONALSTATE_OK(NewState));
if (TIM2_Channel == TIM2_CHANNEL_1)
{
/* Set or Reset the CC1E Bit */
if (NewState != DISABLE)
{
TIM2->CCER1 |= TIM2_CCER1_CC1E;
}
else
{
TIM2->CCER1 &= (u8)(~TIM2_CCER1_CC1E);
}
}
else if (TIM2_Channel == TIM2_CHANNEL_2)
{
/* Set or Reset the CC2E Bit */
if (NewState != DISABLE)
{
TIM2->CCER1 |= TIM2_CCER1_CC2E;
}
else
{
TIM2->CCER1 &= (u8)(~TIM2_CCER1_CC2E);
}
}
else
{
/* Set or Reset the CC3E Bit */
if (NewState != DISABLE)
{
TIM2->CCER2 |= TIM2_CCER2_CC3E;
}
else
{
TIM2->CCER2 &= (u8)(~TIM2_CCER2_CC3E);
}
}
}
/**
* @brief Selects the TIM2 Output Compare Mode. This function disables the
* selected channel before changing the Output Compare Mode. User has to
* enable this channel using TIM2_CCxCmd and TIM2_CCxNCmd functions.
* @param[in] TIM2_Channel specifies the TIM2 Channel.
* This parameter can be one of the following values:
* - TIM2_CHANNEL_1: TIM2 Channel1
* - TIM2_CHANNEL_2: TIM2 Channel2
* - TIM2_CHANNEL_3: TIM2 Channel3
* @param[in] TIM2_OCMode specifies the TIM2 Output Compare Mode.
* This paramter can be one of the following values:
* - TIM2_OCMODE_TIMING
* - TIM2_OCMODE_ACTIVE
* - TIM2_OCMODE_TOGGLE
* - TIM2_OCMODE_PWM1
* - TIM2_OCMODE_PWM2
* - TIM2_FORCEDACTION_ACTIVE
* - TIM2_FORCEDACTION_INACTIVE
* @retval void None
* @par Required preconditions:
* None
* @par Called functions:
* None
* @par Example:
* Selects the TIM2 Output Compare Mode TIM2_OCMODE_TIMING for channel1.
* @code
* TIM2_SelectOCxM(TIM2_CHANNEL_1, TIM2_OCMODE_TIMING);
* @endcode
*/
void TIM2_SelectOCxM(TIM2_Channel_TypeDef TIM2_Channel, TIM2_OCMode_TypeDef TIM2_OCMode)
{
/* Check the parameters */
assert_param(IS_TIM2_CHANNEL_OK(TIM2_Channel));
assert_param(IS_TIM2_OCM_OK(TIM2_OCMode));
if (TIM2_Channel == TIM2_CHANNEL_1)
{
/* Disable the Channel 1: Reset the CCE Bit */
TIM2->CCER1 &= (u8)(~TIM2_CCER1_CC1E);
/* Reset the Output Compare Bits & Set the Output Compare Mode */
TIM2->CCMR1 = (u8)((TIM2->CCMR1 & (u8)(~TIM2_CCMR_OCM)) | (u8)TIM2_OCMode);
}
else if (TIM2_Channel == TIM2_CHANNEL_2)
{
/* Disable the Channel 2: Reset the CCE Bit */
TIM2->CCER1 &= (u8)(~TIM2_CCER1_CC2E);
/* Reset the Output Compare Bits & Set the Output Compare Mode */
TIM2->CCMR2 = (u8)((TIM2->CCMR2 & (u8)(~TIM2_CCMR_OCM)) | (u8)TIM2_OCMode);
}
else
{
/* Disable the Channel 3: Reset the CCE Bit */
TIM2->CCER2 &= (u8)(~TIM2_CCER2_CC3E);
/* Reset the Output Compare Bits & Set the Output Compare Mode */
TIM2->CCMR3 = (u8)((TIM2->CCMR3 & (u8)(~TIM2_CCMR_OCM)) | (u8)TIM2_OCMode);
}
}
/**
* @brief Sets the TIM2 Counter Register value.
* @param[in] Counter specifies the Counter register new value.
* This parameter is between 0x0000 and 0xFFFF.
* @retval void None
* @par Required preconditions:
* None
* @par Called functions:
* None
* @par Example:
* Set the TIM2 Counter Register value to 0xFFEE.
* @code
* TIM2_SetCounter(0xFFEE);
* @endcode
*/
void TIM2_SetCounter(u16 Counter)
{
/* Set the Counter Register value */
TIM2->CNTRH = (u8)(Counter >> 8);
TIM2->CNTRL = (u8)(Counter);
}
/**
* @brief Sets the TIM2 Autoreload Register value.
* @param[in] Autoreload specifies the Autoreload register new value.
* This parameter is between 0x0000 and 0xFFFF.
* @retval void None
* @par Required preconditions:
* None
* @par Called functions:
* None
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