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📄 syslib.c

📁 LoPEC Early Access VxWorks BSP
💻 C
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    if (sysPhysMemSize == NULL)	{#ifdef LOCAL_MEM_AUTOSIZE	/*	 * Do dynamic memory sizing.	 *	 * Since the memory controller interface has already been set to	 * control all memory, just read and interpret its DRAM Attributes	 * Register.	 */        sysPhysMemSize = (char *)sysMemParamConfig(&MemControlReg);        /* Adjust initial DRAM size to actual physical memory. */        sysPhysMemDesc[1].len = (ULONG)sysPhysMemSize -			        (ULONG)sysPhysMemDesc[1].physicalAddr;#else /* not LOCAL_MEM_AUTOSIZE */	/* Don't do auto-sizing, use defined constants. */	sysPhysMemSize = (char *)(LOCAL_MEM_LOCAL_ADRS + LOCAL_MEM_SIZE);#endif /* LOCAL_MEM_AUTOSIZE */	}    return sysPhysMemSize;    }/********************************************************************************* sysMemTop - get the address of the top of VxWorks memory** This routine returns a pointer to the first byte of memory not* controlled or used by VxWorks.** The user can reserve memory space by defining the macro USER_RESERVED_MEM* in config.h.  This routine returns the address of the reserved memory* area.  The value of USER_RESERVED_MEM is in bytes.** RETURNS: The address of the top of VxWorks memory.*/char * sysMemTop (void)    {    static char * memTop = NULL;    if (memTop == NULL)	{	memTop = sysPhysMemTop () - USER_RESERVED_MEM;	}    return memTop;    }/******************************************************************************** sysToMonitor - transfer control to the ROM monitor** This routine transfers control to the ROM monitor.  Normally, it is called* only by reboot()--which services ^X--and by bus errors at interrupt level.* However, in some circumstances, the user may wish to introduce a* <startType> to enable special boot ROM facilities.** RETURNS: Does not return.*/STATUS sysToMonitor    (    int startType	/* parameter passed to ROM to tell it how to boot */    )    {    FUNCPTR pRom = (FUNCPTR) (ROM_TEXT_ADRS + 8); /* Warm reboot */#if defined(INCLUDE_CACHE_L2)    sysL2CacheDisable ();    /* Disable the L2 Cache */#endif    cacheDisable (0);   	/* Disable the Instruction Cache */    cacheDisable (1);   	/* Disable the Data Cache */#if defined(INCLUDE_CACHE_L2)    sysL2CacheDisable ();    /* Disable the L2 Cache */#endif#if     (CPU == PPC604)    vxHid0Set (vxHid0Get () & ~_PPC_HID0_SIED);	/* Enable Serial Instr Exec */#endif  /* (CPU == PPC604) */    sysSerialReset ();		/* reset serial devices */    /* Clear the MSR */    vxMsrSet (0);    /* Reset the EPIC */    sysPciOutLong((UINT32)EPIC_GLOBAL_CONFIG_REG, EPIC_GC_RESET);    /* set the Board Fail LED */    *(UINT8 *)LOPEC_SYS_STAT_REG2 |= LOPEC_BD_FAIL;    (*pRom) (startType);    return (OK);	/* in case we ever continue from ROM monitor */    }/******************************************************************************** sysHwInit2 - initialize additional system hardware** This routine connects system interrupt vectors and configures any * required features not configured by sysHwInit().** RETURNS: N/A*/void sysHwInit2 (void)    {    static BOOL configured = FALSE;    /* Int connects for various devices */    if (!configured)	{#ifdef INCLUDE_AUXCLK        sysAuxClkInit ();        intConnect (INUM_TO_IVEC(TIMER0_INT_VEC), sysAuxClkInt, 0);        intEnable (TIMER0_INT_LVL);#endif /* INCLUDE_AUXCLK */	/* initialize serial interrupts */	sysSerialHwInit2();#if (( defined INCLUDE_RTC ) || ( defined INCLUDE_FAILSAFE ))        /* initialize the RTC device */        m48t37Init();#endif /* INCLUDE_RTC, INCLUDE_FAILSAFE */#if (( defined INCLUDE_RTC ) && ( defined INCLUDE_DOSFS ))        dosFsDateTimeInstall((FUNCPTR)sysRtcDateTimeHook);#endif /* INCLUDE_RTC, INCLUDE_DOSFS */#ifdef INCLUDE_CACHE_L2        /* initialize the L2 cache */        sysL2CacheInit();#else        sysL2CacheDisable();#endif	configured = TRUE;	}    }/******************************************************************************** sysProcNumGet - get the processor number** This routine returns the processor number for the CPU board, which is* set with sysProcNumSet().** RETURNS: The processor number for the CPU board.** SEE ALSO: sysProcNumSet()*/int sysProcNumGet (void)    {    return (sysProcNum);    }/******************************************************************************** sysProcNumSet - set the processor number** This routine sets the processor number for the CPU board.  Processor numbers* should be unique on a single backplane. ** RETURNS: N/A** SEE ALSO: sysProcNumGet()**/void sysProcNumSet    (    int 	procNum			/* processor number */    )    {    /* Initialize global processor number variable. */        sysProcNum = procNum;    }/* miscellaneous support routines *//******************************************************************************** sysIntEnablePIC - enable an ISA/PCI interrupt** This function call is used to enable an ISA/PCI interrupt.** RETURNS: OK or ERROR if unable to enable interrupt.*/STATUS sysIntEnablePIC    (    int intNum    )    {    return (intEnable (intNum));    }/******************************************************************************** sysSpuriousIntHandler - spurious interrupt handler** This is the entry point for spurious interrupts.** NOTE: This routine has no effect.** This routine catches all spurious interrupts.  It does nothing at all.** RETURNS: N/A.** RETURNS: N/A** NOMANUAL*/void sysSpuriousIntHandler (void)    {    }/******************************************************************************** sysNvRead - read one byte from NVRAM** This routine reads a single byte from a specified offset in NVRAM.** RETURNS: The byte from the specified NVRAM offset.*/UCHAR sysNvRead    (    ULONG	offset	/* NVRAM offset to read the byte from */    )    {    return (sysInByte (NVRAM_BASE + offset));    }/******************************************************************************** sysNvWrite - write one byte to NVRAM** This routine writes a single byte to a specified offset in NVRAM.** RETURNS: N/A*/void sysNvWrite    (    ULONG	offset,	/* NVRAM offset to write the byte to */    UCHAR	data	/* datum byte */    )    {    sysOutByte (NVRAM_BASE + offset, data);    }/********************************************************************************* sysCpuCheck - confirm the CPU type** This routine validates the cpu type.  If the wrong cpu type is discovered* a message is printed using the serial channel in polled mode.** RETURNS: N/A.*/void sysCpuCheck (void)    {    /* Check for a valid CPU type;  If one is found, just return */#if    (CPU == PPC603)    if ((CPU_TYPE == CPU_TYPE_603) || (CPU_TYPE == CPU_TYPE_603E) ||        (CPU_TYPE == CPU_TYPE_603P))        {        return;        }#else    /* (CPU == PPC604) */    if ((CPU_TYPE == CPU_TYPE_604) || (CPU_TYPE == CPU_TYPE_604E) ||        (CPU_TYPE == CPU_TYPE_604R) || (CPU_TYPE == CPU_TYPE_750) ||        (CPU_TYPE == CPU_TYPE_MAX) || (CPU_TYPE == CPU_TYPE_NITRO))        {        return;        }#endif    /* (CPU == PPC604) */    /* Invalid CPU type; print error message and terminate */    sysDebugMsg (wrongCpuMsg, EXIT_TO_SYSTEM_MONITOR); /* does not return */    }/******************************************************************************** sysMemProbeTrap - trap handler for vxMemProbe exception** This routine is called from the excConnectCode stub if sysMemProbeSup* generates an exception. By default, sysMemProbeSup returns OK.* This code changes the PC value to "sysProbeExc" (within the sysMemProbeSup* routine), and sysProbeExc sets the return value to ERROR.** RETURNS: 0*/static int sysMemProbeTrap    (    ESFPPC *    pEsf		/* pointer to exception stack frame */    )    {    REG_SET *pRegSet = &pEsf->regSet;    pRegSet->pc = (_RType)sysProbeExc;	/* sysProbeExc forces an ERROR return */    return (0);    }/******************************************************************************** sysMemProbeBus - probe an address on a bus.** This routine probes a specified address to see if it is readable or* writable, as specified by <mode>.  The address will be read or written as* 1, 2, or 4 bytes as specified by <length> (values other than 1, 2, or 4* yield unpredictable results).  If the probe is a VX_READ, the value read will* be copied to the location pointed to by <pVal>.  If the probe is a VX_WRITE,* the value written will be taken from the location pointed to by <pVal>.* In either case, <pVal> should point to a value of 1, 2, or 4 bytes, as* specified by <length>.** This routine probes the specified address with interrupts disabled and* a special handler for Machine Check, Data Access and Alignment exceptions.** RETURNS: OK if probe succeeded or ERROR if an exception occured.*/static STATUS sysMemProbeBus    (    char   * adrs,	/* address to be probed */    int      mode,	/* VX_READ or VX_WRITE */    int      length,	/* 1, 2 or 4 byte probe */    char   * pVal	/* address of value to write OR */			/* address of location to place value read */    )    {    int      oldLevel;    FUNCPTR  oldVec1;    FUNCPTR  oldVec2;    STATUS   status;    UINT32   ppcHid0;   /* H/W Implementation Dependent reg (PPC60x) */    UINT32   ppcMsr;    /* PPC Machine Status Reg */    UINT16   temp;    /* Probes performed with interrupts disabled */    oldLevel = intLock ();    /* Handle Machine Check Exceptions locally */    oldVec1 = excVecGet ((FUNCPTR *) _EXC_OFF_MACH);    excVecSet ((FUNCPTR *) _EXC_OFF_MACH, FUNCREF(sysMemProbeTrap));     /*     *  Handle Data Access Exceptions locally     *     *  Data Access Exceptions will occur when trying to probe addresses     *  that have not been mapped by the MMU.     */    oldVec2 = excVecGet ((FUNCPTR *) _EXC_OFF_DATA);    excVecSet ((FUNCPTR *) _EXC_OFF_DATA, FUNCREF(sysMemProbeTrap));    /* Enable Machine Check Pin (EMCP) */    ppcHid0 = vxHid0Get();    vxHid0Set(ppcHid0 | _PPC_HID0_EMCP);    /* Enable Machine Check exception */    ppcMsr = vxMsrGet();    vxMsrSet(ppcMsr | _PPC_MSR_ME);    /* clear the PCI abort bits in the PCI status word */    pciConfigOutWord(CNFG_PCI_HOST_BRDG_BUS, CNFG_PCI_HOST_BRDG_DEV,		     CNFG_PCI_HOST_BRDG_FCN, MPC107_CFG_STATUS, 		     (MPC107_PCI_RCV_MSTR_ABORT | MPC107_PCI_RCV_TGT_ABORT));    /* do probe */    if (mode == VX_READ)        {        status = sysMemProbeSup (length, adrs, pVal);        SYNC;        }    else        {        status = sysMemProbeSup (length, pVal, adrs);        SYNC;        }    /* check for valid address */    pciConfigInWord (CNFG_PCI_HOST_BRDG_BUS, CNFG_PCI_HOST_BRDG_DEV,		     CNFG_PCI_HOST_BRDG_FCN, MPC107_CFG_STATUS, &temp);    if (temp & (MPC107_PCI_RCV_MSTR_ABORT | MPC107_PCI_RCV_TGT_ABORT))        status = ERROR;    /* clear the PCI status reg. bits */    pciConfigOutWord(CNFG_PCI_HOST_BRDG_BUS, CNFG_PCI_HOST_BRDG_DEV,		     CNFG_PCI_HOST_BRDG_FCN, MPC107_CFG_STATUS, 		     (MPC107_PCI_RCV_MSTR_ABORT | MPC107_PCI_RCV_TGT_ABORT));

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