config.h

LoPEC Early Access VxWorks BSP

/* config.h - Motorola PowerChap board configuration header */

/* Copyright 1984-2001 Wind River Systems, Inc. */
/* Copyright 1996-2001 Motorola, Inc. All Rights Reserved */

/*
modification history
--------------------
01v,03apr01,cak  Removed alpha release note regarding ECC
01u,02apr01,scb  undef autosize and ecc when BYPASS_SPD #define'd
01t,14mar01,cak  Corrected PCI documentation
01s,13feb01,cak  Added support for RTC, alarm clock, and failsafe timer 
01r,07feb01,cak  Removed ULTRA2_SCSI define, moved to lopec.h
01q,06feb01,cak  Added SCSI support.
01p,02feb01,scb  remvoved shared memory related infomation
01o,02feb01,scb  removed INCLUDE_CACHE_L2 #define
01n,26jan01,scb  L2 cache support.
01m,18jan01,scb  Modified for MPC107 address map B (CHRP)
01l,12jan01,djs  Changed BYPASS_SPD to be undef'd by default
01k,11jan01,cak  Edited ATA_DEVn_STATE comments for 2.5" EIDE header 
01j,02jan01,cak  Added IDE/ATA support
01i,18dec00,scb  #define FLASH_BOOT by default
01h,13dec00,djs  Cleanup/rename macros
01g,01dec00,djs  Added a BYPASS_SPD around LOCAL_AUTO_MEMSIZE
01f,30nov00,djs  support for i82559
01e,28nov00,scb  Added BYPASS_SPD #define
01d,20nov00,scb  Processor support
01c,14nov00,djs  removed EXT interrupt source vectors
01b,10nov00,djs  modified EPIC edge/level and priority macros
01a,02nov00,djs  created from 01o,16feb00,rhk (mv2100/config.h)
*/

/*
DESCRIPTION
This file contains the configuration parameters for the
Motorola PowerChap architecture

*/

#ifndef	INCconfigh
#define	INCconfigh

#ifdef __cplusplus
extern "C" {
#endif

/* The following defines must precede configAll.h */

/* BSP version/revision identification */

#define BSP_VER_1_1     1
#define BSP_VER_1_2     1
#define BSP_VERSION     "1.2"
#define BSP_REV         "/0.1"		/* 0 for first revision */

/* PRIMARY INCLUDES */

#include "configAll.h"

/* defines */

#if (CPU == PPC604)
#   define DEFAULT_BOOT_LINE \
	"er(0,0)host:/tornado/lopec/vxWorks h=90.0.0.1 e=90.0.0.2 u=vxworks"
#   define WRONG_CPU_MSG "A PPC604 VxWorks image cannot run on a PPC603!\n";
#endif	/* (CPU == PPC604) */

/*
 * Default board configurations
 *
 * If a supported feature is desired,
 *         change to: #define
 * If a feature is not desired or not supported
 *         change to: #undef
 *
 * NOTE: Not all functionality is supported on all boards
 */


#undef	INCLUDE_SCSI		/* SCSI Support */
#define	INCLUDE_AUXCLK		/* Auxiliary clock support */
#undef	INCLUDE_ECC		/* MPC107 ECC */
#define	FLASH_BOOT		/* select soldered Flash boot base */
#define	INCLUDE_END		/* Enhanced Network Driver */
#undef  INCLUDE_ATA             /* ATA-2 portion of EIDE support */
#undef	INCLUDE_SM_NET		/* Leave as #undef, no support on this board */
#undef	INCLUDE_RTC  		/* Real-Time Clock and alarm clock support */
#undef	INCLUDE_FAILSAFE	/* Failsafe timer support */

/*
 * BYPASS_SPD is a debug build switch which, when defined, forces the BSP
 * to ignore SPD information and assume a 32MB SDRAM array and configures
 * the MPC107 for default (worst case) memory timing.
 */

#undef BYPASS_SPD

/*
 * Cache and MMU options - 
 * The symbol INCLUDE_CACHE_SUPPORT (in "configAll.h") is #defined by
 * default and causes both L1 and L2 cache support (including enabling
 * of the caches) to be provided.  In the event that no cache enabling
 * is desired include a #undef INCLUDE_CACHE_SUPPORT here and all caches,
 * (L1 and L2) will be disabled.
 */

#define	INCLUDE_MMU_BASIC       /* bundled mmu support */
#undef	USER_D_CACHE_MODE
#define	USER_D_CACHE_MODE       (CACHE_COPYBACK | CACHE_SNOOP_ENABLE)

/* timestamp option not included by default;  #define to include it */

#undef  INCLUDE_TIMESTAMP

#define INCLUDE_ERR_END        /* support for onboard i82559 devices */
#undef  INCLUDE_SECONDARY_ENET /* Enable Secondary Ethernet */
#define  INCLUDE_DEC_END        /* DEC21x4x PMC add-in cards */

/*
 * SCSI Support
 *
 * INCLUDE_SCSI_BOOT : Enables booting from a SCSI device.
 *     INCLUDE_DOSFS : Enables DOS file system support.
 *  SCSI_AUTO_CONFIG : Enables an automatic scan of the SCSI bus at
 *                     startup.
 *   SYS_SCSI_CONFIG : Enables you to declare a SCSI peripheral
 *                     configuration, and is meant as a substitute for
 *                     SCSI_AUTO_CONFIG.  You must also edit
 *                     sysScsiConfig in sysScsi.c, so that it reflects
 *                     the actual configuration of your SCSI bus.
 */

#ifdef  INCLUDE_SCSI
#   define INCLUDE_SCSI_BOOT    /* include ability to boot from SCSI */
#   define INCLUDE_DOSFS        /* DOS file system support */
#   undef  SCSI_AUTO_CONFIG     /* scan SCSI bus automatically on startup */
#   undef  SYS_SCSI_CONFIG      /* call sysScsiConfig in sysScsi.c */
#endif  /* INCLUDE_SCSI */

/* ATA-2 portion of EIDE support */

#ifdef  INCLUDE_ATA
#ifndef INCLUDE_DOSFS
#   define INCLUDE_DOSFS        /* file system to be used */
#endif  /* INCLUDE_DOSFS */

/*
 *  The ATA_DEVx_STATE determines whether the ATA driver should probe
 *  for a device.  DEV_PRESENT = probe; DEV_NOT_PRESENT = do not probe.
 *
 *  To probe for all devices connected to both controllers, change all
 *  ATA_DEVx_STATE values to DEV_PRESENT.
 *
 *  ATA_DEV0_STATE = cntrl 0 / device 0
 *  ATA_DEV1_STATE = cntrl 0 / device 1
 *  ATA_DEV2_STATE = cntrl 1 / device 0
 *  ATA_DEV3_STATE = cntrl 1 / device 1
 *
 *  If your board contains a 3.5" EIDE header:
 *        ATA_DEV0_STATE corresponds to the master device
 *        ATA_DEV1_STATE corresponds to the slave device
 *
 *  If your board contains a 2.5" EIDE header:
 *        ATA_DEV0_STATE corresponds to the master device
 *        ATA_DEV1_STATE corresponds to the slave device
 *
 *  If your board contains a Compact FLASH header:
 *        ATA_DEV2_STATE corresponds to the compact FLASH
 *        ATA_DEV3_STATE should remain undefined
 */

#define DEV_PRESENT     1
#define DEV_NOT_PRESENT 0
#   define  ATA_DEV0_STATE  DEV_NOT_PRESENT
#   define  ATA_DEV1_STATE  DEV_NOT_PRESENT
#   define  ATA_DEV2_STATE  DEV_NOT_PRESENT
#   define  ATA_DEV3_STATE  DEV_NOT_PRESENT
#endif  /* INCLUDE_ATA */

/* PCI bus numbers for secondary and subordinate buses */

#define PCI_SECONDARY_BUS       1
#define PCI_SUBORD_BUS          1
#define PCI_MAX_BUS             2       /* Max. number of PCI buses in system */

/* serial parameters */

#undef	NUM_TTY
#define	NUM_TTY			N_SIO_CHANNELS

/*
 * Auxiliary Clock support is an optional feature that is not supported
 * by all BSPs.
 */

#ifndef  INCLUDE_AUXCLK
#    undef INCLUDE_SPY
#else
#    define INCLUDE_SPY
#endif /* INCLUDE_AUXCLK */

/*
 * Local Memory definitions
 *
 * By default, the available DRAM memory is sized at bootup (LOCAL_MEM_AUTOSIZE
 * is defined).  If auto-sizing is not selected, make certain that
 * LOCAL_MEM_SIZE is set to the actual amount of memory on the board.
 * By default, it is set to the minimum memory configuration: 16 MB.
 * Failure to do so can cause unpredictable system behavior!
 * 
 * When LOCAL_MEM_AUTOSIZE is defined, it goes out and reads the
 * SPD (Serial Presence Detect) for memory size information. When 
 * the use of the SPD is being by bypassed, LOCAL_MEM_AUTOSIZE needs 
 * to be undefined. Also, the use of ECC depends upon being able to 
 * read SPD.  Thus if SPD is being bypassed, ECC must be bypassed
 * as well.
 */

#define		LOCAL_MEM_AUTOSIZE		/* undef for fixed size */
#ifdef BYPASS_SPD
#   undef	LOCAL_MEM_AUTOSIZE		/* undef for fixed size */
#   undef	INCLUDE_ECC			/* SPD required for ECC */
#endif

#define LOCAL_MEM_LOCAL_ADRS	0x00000000	/* fixed at zero */