📄 via-rhine.c
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/* via-rhine.c: A Linux Ethernet device driver for VIA Rhine family chips. *//* Written 1998-2003 by Donald Becker. This software may be used and distributed according to the terms of the GNU General Public License (GPL), incorporated herein by reference. Drivers based on or derived from this code fall under the GPL and must retain the authorship, copyright and license notice. This file is not a complete program and may only be used when the entire operating system is licensed under the GPL. This driver is designed for the VIA VT86c100A Rhine-II PCI Fast Ethernet controller. It also works with the older 3043 Rhine-I chip. The author may be reached as becker@scyld.com, or C/O Scyld Computing Corporation 914 Bay Ridge Road, Suite 220 Annapolis MD 21403 Support information and updates available at http://www.scyld.com/network/via-rhine.html The information and support mailing lists are based at http://www.scyld.com/mailman/listinfo/*//* These identify the driver base version and may not be removed. */static const char version1[] ="via-rhine.c:v1.16 7/22/2003 Written by Donald Becker <becker@scyld.com>\n";static const char version2[] =" http://www.scyld.com/network/via-rhine.html\n";/* Automatically extracted configuration info:probe-func: via_rhine_probeconfig-in: tristate 'VIA "Rhine" vt86c100, vt3043, and vt3065 series PCI Ethernet support' CONFIG_VIA_RHINEc-help-name: VIA Rhine series PCI Ethernet supportc-help-symbol: CONFIG_VIA_RHINEc-help: This driver is for the VIA Rhine (v3043) and Rhine-IIc-help: (vt3065 AKA vt86c100) network adapter chip series.c-help: More specific information and updates are available from c-help: http://www.scyld.com/network/via-rhine.html*//* The user-configurable values. These may be modified when a driver module is loaded.*//* Message enable level: 0..31 = no..all messages. See NETIF_MSG docs. */static int debug = 2;/* Maximum events (Rx packets, etc.) to handle at each interrupt. */static int max_interrupt_work = 20;/* Set the copy breakpoint for the copy-only-tiny-frames scheme. Setting to > 1518 effectively disables this feature. */static int rx_copybreak = 0;/* Used to pass the media type, etc. Both 'options[]' and 'full_duplex[]' should exist for driver interoperability. The media type is usually passed in 'options[]'. The default is autonegotation for speed and duplex. This should rarely be overridden. Use option values 0x10/0x20 for 10Mbps, 0x100,0x200 for 100Mbps. Use option values 0x10 and 0x100 for forcing half duplex fixed speed. Use option values 0x20 and 0x200 for forcing full duplex operation.*/#define MAX_UNITS 8 /* More are supported, limit only on options */static int options[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};/* Maximum number of multicast addresses to filter (vs. rx-all-multicast). The Rhine has a 64 element 8390-like hash table. */static const int multicast_filter_limit = 32;/* Operational parameters that are set at compile time. *//* Making the Tx ring too large decreases the effectiveness of channel bonding and packet priority. There are no ill effects from too-large receive rings. */#define TX_RING_SIZE 16#define TX_QUEUE_LEN 10 /* Limit ring entries actually used. */#define RX_RING_SIZE 32/* Operational parameters that usually are not changed. *//* Time in jiffies before concluding the transmitter is hung. */#define TX_TIMEOUT (6*HZ)/* Allocation size of Rx buffers with normal sized Ethernet frames. Do not change this value without good reason. This is not a limit, but a way to keep a consistent allocation size among drivers. */#define PKT_BUF_SZ 1536#ifndef __KERNEL__#define __KERNEL__#endif#if !defined(__OPTIMIZE__)#warning You must compile this file with the correct options!#warning See the last lines of the source file.#error You must compile this driver with "-O".#endif/* Include files, designed to support most kernel versions 2.0.0 and later. */#include <linux/config.h>#if defined(CONFIG_SMP) && ! defined(__SMP__)#define __SMP__#endif#if defined(MODULE) && defined(CONFIG_MODVERSIONS) && ! defined(MODVERSIONS)#define MODVERSIONS#endif#include <linux/version.h>#if defined(MODVERSIONS)#include <linux/modversions.h>#endif#include <linux/module.h>#include <linux/kernel.h>#include <linux/string.h>#include <linux/timer.h>#include <linux/errno.h>#include <linux/ioport.h>#if LINUX_VERSION_CODE >= 0x20400#include <linux/slab.h>#else#include <linux/malloc.h>#endif#include <linux/interrupt.h>#include <linux/pci.h>#include <linux/netdevice.h>#include <linux/etherdevice.h>#include <linux/skbuff.h>#include <asm/processor.h> /* Processor type for cache alignment. */#include <asm/bitops.h>#include <asm/io.h>#ifdef INLINE_PCISCAN#include "k_compat.h"#else#include "pci-scan.h"#include "kern_compat.h"#endif/* Condensed bus+endian portability operations. */#define virt_to_le32desc(addr) cpu_to_le32(virt_to_bus(addr))#define le32desc_to_virt(addr) bus_to_virt(le32_to_cpu(addr))/* This driver was written to use PCI memory space, however most versions of the Rhine only work correctly with I/O space accesses. */#if defined(VIA_USE_MEMORY)#warning Many adapters using the VIA Rhine chip are not configured to work#warning with PCI memory space accesses.#else#define USE_IO_OPS#undef readb#undef readw#undef readl#undef writeb#undef writew#undef writel#define readb inb#define readw inw#define readl inl#define writeb outb#define writew outw#define writel outl#endif#if (LINUX_VERSION_CODE >= 0x20100) && defined(MODULE)char kernel_version[] = UTS_RELEASE;#endifMODULE_AUTHOR("Donald Becker <becker@scyld.com>");MODULE_DESCRIPTION("VIA Rhine PCI Fast Ethernet driver");MODULE_LICENSE("GPL");MODULE_PARM(max_interrupt_work, "i");MODULE_PARM(debug, "i");MODULE_PARM(rx_copybreak, "i");MODULE_PARM(options, "1-" __MODULE_STRING(MAX_UNITS) "i");MODULE_PARM(full_duplex, "1-" __MODULE_STRING(MAX_UNITS) "i");MODULE_PARM(multicast_filter_limit, "i");MODULE_PARM_DESC(debug, "Driver message level (0-31)");MODULE_PARM_DESC(options, "Force transceiver type or fixed speed+duplex");MODULE_PARM_DESC(max_interrupt_work, "Driver maximum events handled per interrupt");MODULE_PARM_DESC(full_duplex, "Non-zero to set forced full duplex " "(deprecated, use options[] instead).");MODULE_PARM_DESC(rx_copybreak, "Breakpoint in bytes for copy-only-tiny-frames");MODULE_PARM_DESC(multicast_filter_limit, "Multicast addresses before switching to Rx-all-multicast");/* Theory of OperationI. Board CompatibilityThis driver is designed for the VIA 86c100A Rhine-II PCI Fast Ethernetcontroller.II. Board-specific settingsBoards with this chip are functional only in a bus-master PCI slot.Many operational settings are loaded from the EEPROM to the Config word atoffset 0x78. This driver assumes that they are correct.If this driver is compiled to use PCI memory space operations the EEPROMmust be configured to enable memory ops.III. Driver operationIIIa. Ring buffersThis driver uses two statically allocated fixed-size descriptor listsformed into rings by a branch from the final descriptor to the beginning ofthe list. The ring sizes are set at compile time by RX/TX_RING_SIZE.IIIb/c. Transmit/Receive StructureThis driver attempts to use a zero-copy receive and transmit scheme.Alas, all data buffers are required to start on a 32 bit boundary, sothe driver must often copy transmit packets into bounce buffers.The driver allocates full frame size skbuffs for the Rx ring buffers atopen() time and passes the skb->data field to the chip as receive databuffers. When an incoming frame is less than RX_COPYBREAK bytes long,a fresh skbuff is allocated and the frame is copied to the new skbuff.When the incoming frame is larger, the skbuff is passed directly up theprotocol stack. Buffers consumed this way are replaced by newly allocatedskbuffs in the last phase of netdev_rx().The RX_COPYBREAK value is chosen to trade-off the memory wasted byusing a full-sized skbuff for small frames vs. the copying costs of largerframes. New boards are typically used in generously configured machinesand the underfilled buffers have negligible impact compared to the benefit ofa single allocation size, so the default value of zero results in nevercopying packets. When copying is done, the cost is usually mitigated by usinga combined copy/checksum routine. Copying also preloads the cache, which ismost useful with small frames.Since the VIA chips are only able to transfer data to buffers on 32 bitboundaries, the the IP header at offset 14 in an ethernet frame isn'tlongword aligned for further processing. Copying these unaligned buffershas the beneficial effect of 16-byte aligning the IP header.IIId. SynchronizationThe driver runs as two independent, single-threaded flows of control. Oneis the send-packet routine, which enforces single-threaded use by thedev->tbusy flag. The other thread is the interrupt handler, which is singlethreaded by the hardware and interrupt handling software.The send packet thread has partial control over the Tx ring and 'dev->tbusy'flag. It sets the tbusy flag whenever it's queuing a Tx packet. If the nextqueue slot is empty, it clears the tbusy flag when finished otherwise it setsthe 'lp->tx_full' flag.The interrupt handler has exclusive control over the Rx ring and records statsfrom the Tx ring. After reaping the stats, it marks the Tx queue entry asempty by incrementing the dirty_tx mark. Iff the 'lp->tx_full' flag is set, itclears both the tx_full and tbusy flags.IV. NotesIVb. ReferencesThis driver was originally written using a preliminary VT86C100A manualfrom http://www.via.com.tw/ The usual background material was used: http://www.scyld.com/expert/100mbps.html http://scyld.com/expert/NWay.htmlAdditional information is now available, especially for the newer chips. http://www.via.com.tw/en/Networking/DS6105LOM100.pdfIVc. ErrataThe VT86C100A manual is not reliable information.The 3043 chip does not handle unaligned transmit or receive buffers,resulting in significant performance degradation for bounce buffercopies on transmit and unaligned IP headers on receive.The chip does not pad to minimum transmit length.There is a bug with the transmit descriptor pointer handling when thechip encounters a transmit error.*/static void *via_probe1(struct pci_dev *pdev, void *init_dev, long ioaddr, int irq, int chip_idx, int find_cnt);static int via_pwr_event(void *dev_instance, int event);enum chip_capability_flags { CanHaveMII=1, HasESIPhy=2, HasDavicomPhy=4, HasV1TxStat=8, ReqTxAlign=0x10, HasWOL=0x20, HasIPChecksum=0x40, HasVLAN=0x80, };#if defined(VIA_USE_MEMORY)#define RHINE_IOTYPE (PCI_USES_MEM | PCI_USES_MASTER | PCI_ADDR1)#define RHINE_I_IOSIZE 128#define RHINEII_IOSIZE 4096#else#define RHINE_IOTYPE (PCI_USES_IO | PCI_USES_MASTER | PCI_ADDR0)#define RHINE_I_IOSIZE 128#define RHINEII_IOSIZE 256#endifstatic struct pci_id_info pci_tbl[] = { { "VIA VT3043 Rhine", { 0x30431106, 0xffffffff,}, RHINE_IOTYPE, RHINE_I_IOSIZE, CanHaveMII | ReqTxAlign | HasV1TxStat }, { "VIA VT86C100A Rhine", { 0x61001106, 0xffffffff,}, RHINE_IOTYPE, RHINE_I_IOSIZE, CanHaveMII | ReqTxAlign | HasV1TxStat }, { "VIA VT6102 Rhine-II", { 0x30651106, 0xffffffff,}, RHINE_IOTYPE, RHINEII_IOSIZE, CanHaveMII | HasWOL }, { "VIA VT6105LOM Rhine-III (3106)", { 0x31061106, 0xffffffff,}, RHINE_IOTYPE, RHINEII_IOSIZE, CanHaveMII | HasWOL }, /* Duplicate entry, with 'M' features enabled. */ { "VIA VT6105M Rhine-III (3106)", { 0x31061106, 0xffffffff,}, RHINE_IOTYPE, RHINEII_IOSIZE, CanHaveMII|HasWOL|HasIPChecksum|HasVLAN}, { "VIA VT6105M Rhine-III (3053 prototype)", { 0x30531106, 0xffffffff,}, RHINE_IOTYPE, RHINEII_IOSIZE, CanHaveMII | HasWOL }, {0,}, /* 0 terminated list. */};struct drv_id_info via_rhine_drv_id = { "via-rhine", PCI_HOTSWAP, PCI_CLASS_NETWORK_ETHERNET<<8, pci_tbl, via_probe1, via_pwr_event};/* Offsets to the device registers.*/enum register_offsets { StationAddr=0x00, RxConfig=0x06, TxConfig=0x07, ChipCmd=0x08, IntrStatus=0x0C, IntrEnable=0x0E, MulticastFilter0=0x10, MulticastFilter1=0x14, RxRingPtr=0x18, TxRingPtr=0x1C, MIIPhyAddr=0x6C, MIIStatus=0x6D, PCIBusConfig=0x6E, MIICmd=0x70, MIIRegAddr=0x71, MIIData=0x72, MACRegEEcsr=0x74, Config=0x78, ConfigA=0x7A, RxMissed=0x7C, RxCRCErrs=0x7E, StickyHW=0x83, WOLcrClr=0xA4, WOLcgClr=0xA7, PwrcsrClr=0xAC,};/* Bits in the interrupt status/mask registers. */enum intr_status_bits { IntrRxDone=0x0001, IntrRxErr=0x0004, IntrRxEmpty=0x0020, IntrTxDone=0x0002, IntrTxAbort=0x0008, IntrTxUnderrun=0x0010, IntrPCIErr=0x0040, IntrStatsMax=0x0080, IntrRxEarly=0x0100, IntrMIIChange=0x0200, IntrRxOverflow=0x0400, IntrRxDropped=0x0800, IntrRxNoBuf=0x1000, IntrTxAborted=0x2000, IntrLinkChange=0x4000, IntrRxWakeUp=0x8000, IntrNormalSummary=0x0003, IntrAbnormalSummary=0xC260,};
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