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📄 natsemi.c

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/* natsemi.c: A Linux PCI Ethernet driver for the NatSemi DP83810 series. *//*	Written/copyright 1999-2003 by Donald Becker.	This software may be used and distributed according to the terms of	the GNU General Public License (GPL), incorporated herein by reference.	Drivers based on or derived from this code fall under the GPL and must	retain the authorship, copyright and license notice.  This file is not	a complete program and may only be used when the entire operating	system is licensed under the GPL.  License for under other terms may be	available.  Contact the original author for details.	The original author may be reached as becker@scyld.com, or at	Scyld Computing Corporation	914 Bay Ridge Road, Suite 220	Annapolis MD 21403	Support information and updates available at		http://www.scyld.com/network/natsemi.html	The information and support mailing lists are based at		http://www.scyld.com/mailman/listinfo/*//* These identify the driver base version and may not be removed. */static const char version1[] ="natsemi.c:v1.17b 10/21/2003  Written by Donald Becker <becker@scyld.com>\n";static const char version2[] ="  http://www.scyld.com/network/natsemi.html\n";/* Updated to recommendations in pci-skeleton v2.11. *//* Automatically extracted configuration info:probe-func: natsemi_probeconfig-in: tristate 'National Semiconductor DP8381x series PCI Ethernet support' CONFIG_NATSEMIc-help-name: National Semiconductor DP8381x series PCI Ethernet supportc-help-symbol: CONFIG_NATSEMIc-help: This driver is for the National Semiconductor DP83810 series,c-help: including the 83815 chip.c-help: Usage information and updates are available fromc-help: http://www.scyld.com/network/natsemi.html*//* The user-configurable values.   These may be modified when a driver module is loaded.*//* Message enable level: 0..31 = no..all messages.  See NETIF_MSG docs. */static int debug = 2;/* Maximum events (Rx packets, etc.) to handle at each interrupt. */static int max_interrupt_work = 20;/* Maximum number of multicast addresses to filter (vs. rx-all-multicast).   This chip uses a 512 element hash table based on the Ethernet CRC.   Some chip versions are reported to have unreliable multicast filter   circuitry.  To work around an observed problem set this value to '0',   which will immediately switch to Rx-all-multicast.*/static int multicast_filter_limit = 100;/* Set the copy breakpoint for the copy-only-tiny-frames scheme.   Setting to > 1518 effectively disables this feature.   This chip can only receive into aligned buffers, so architectures such   as the Alpha AXP might benefit from a copy-align.*/static int rx_copybreak = 0;/* Used to pass the media type, etc.   Both 'options[]' and 'full_duplex[]' should exist for driver   interoperability, however setting full_duplex[] is deprecated.   The media type is usually passed in 'options[]'.	The default is autonegotation for speed and duplex.	This should rarely be overridden.	Use option values 0x10/0x20 for 10Mbps, 0x100,0x200 for 100Mbps.	Use option values 0x10 and 0x100 for forcing half duplex fixed speed.	Use option values 0x20 and 0x200 for forcing full duplex operation.*/#define MAX_UNITS 8		/* More are supported, limit only on options */static int options[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};/* Operational parameters that are set at compile time. *//* Keep the ring sizes a power of two for compile efficiency.   Understand the implications before changing these settings!   The compiler will convert <unsigned>'%'<2^N> into a bit mask.   Making the Tx ring too large decreases the effectiveness of channel   bonding and packet priority.   Too-large receive rings waste memory and confound network buffer limits. */#define TX_RING_SIZE	16#define TX_QUEUE_LEN	10		/* Limit ring entries actually used, min 4. */#define RX_RING_SIZE	32/* Operational parameters that usually are not changed. *//* Time in jiffies before concluding the transmitter is hung.   Re-autonegotiation may take up to 3 seconds. */#define TX_TIMEOUT  (6*HZ)/* Allocation size of Rx buffers with normal sized Ethernet frames.   Do not change this value without good reason.  This is not a limit,   but a way to keep a consistent allocation size among drivers. */#define PKT_BUF_SZ		1536#ifndef __KERNEL__#define __KERNEL__#endif#if !defined(__OPTIMIZE__)#warning  You must compile this file with the correct options!#warning  See the last lines of the source file.#error You must compile this driver with "-O".#endif/* Include files, designed to support most kernel versions 2.0.0 and later. */#include <linux/config.h>#if defined(CONFIG_SMP) && ! defined(__SMP__)#define __SMP__#endif#if defined(MODULE) && defined(CONFIG_MODVERSIONS) && ! defined(MODVERSIONS)#define MODVERSIONS#endif#include <linux/version.h>#if defined(MODVERSIONS)#include <linux/modversions.h>#endif#include <linux/module.h>#include <linux/kernel.h>#include <linux/string.h>#include <linux/timer.h>#include <linux/errno.h>#include <linux/ioport.h>#if LINUX_VERSION_CODE >= 0x20400#include <linux/slab.h>#else#include <linux/malloc.h>#endif#include <linux/interrupt.h>#include <linux/pci.h>#include <linux/netdevice.h>#include <linux/etherdevice.h>#include <linux/skbuff.h>#include <asm/processor.h>		/* Processor type for cache alignment. */#include <asm/bitops.h>#include <asm/io.h>#ifdef INLINE_PCISCAN#include "k_compat.h"#else#include "pci-scan.h"#include "kern_compat.h"#endif/* Condensed operations for readability. */#define virt_to_le32desc(addr)  cpu_to_le32(virt_to_bus(addr))#define le32desc_to_virt(addr)  bus_to_virt(le32_to_cpu(addr))#if (LINUX_VERSION_CODE >= 0x20100)  &&  defined(MODULE)char kernel_version[] = UTS_RELEASE;#endifMODULE_AUTHOR("Donald Becker <becker@scyld.com>");MODULE_DESCRIPTION("National Semiconductor DP83810 series PCI Ethernet driver");MODULE_LICENSE("GPL");MODULE_PARM(debug, "i");MODULE_PARM(options, "1-" __MODULE_STRING(MAX_UNITS) "i");MODULE_PARM(rx_copybreak, "i");MODULE_PARM(full_duplex, "1-" __MODULE_STRING(MAX_UNITS) "i");MODULE_PARM(multicast_filter_limit, "i");MODULE_PARM(max_interrupt_work, "i");MODULE_PARM_DESC(debug, "Driver message level (0-31)");MODULE_PARM_DESC(options, "Force transceiver type or fixed speed+duplex");MODULE_PARM_DESC(max_interrupt_work,				 "Driver maximum events handled per interrupt");MODULE_PARM_DESC(full_duplex,				 "Non-zero to force full duplex, non-negotiated link "				 "(deprecated).");MODULE_PARM_DESC(rx_copybreak,				 "Breakpoint in bytes for copy-only-tiny-frames");MODULE_PARM_DESC(multicast_filter_limit,				 "Multicast addresses before switching to Rx-all-multicast");/*				Theory of OperationI. Board CompatibilityThis driver is designed for National Semiconductor DP83815 PCI Ethernet NIC.It also works with other chips in in the DP83810 series.The most common board is the Netgear FA311 using the 83815.II. Board-specific settingsThis driver requires the PCI interrupt line to be valid.It honors the EEPROM-set values.III. Driver operationIIIa. Ring buffersThis driver uses two statically allocated fixed-size descriptor listsformed into rings by a branch from the final descriptor to the beginning ofthe list.  The ring sizes are set at compile time by RX/TX_RING_SIZE.The NatSemi design uses a 'next descriptor' pointer that the driver formsinto a list, thus rings can be arbitrarily sized.  Before changing thering sizes you should understand the flow and cache effects of thefull/available/empty hysteresis.IIIb/c. Transmit/Receive StructureThis driver uses a zero-copy receive and transmit scheme.The driver allocates full frame size skbuffs for the Rx ring buffers atopen() time and passes the skb->data field to the chip as receive databuffers.  When an incoming frame is less than RX_COPYBREAK bytes long,a fresh skbuff is allocated and the frame is copied to the new skbuff.When the incoming frame is larger, the skbuff is passed directly up theprotocol stack.  Buffers consumed this way are replaced by newly allocatedskbuffs in a later phase of receives.The RX_COPYBREAK value is chosen to trade-off the memory wasted byusing a full-sized skbuff for small frames vs. the copying costs of largerframes.  New boards are typically used in generously configured machinesand the underfilled buffers have negligible impact compared to the benefit ofa single allocation size, so the default value of zero results in nevercopying packets.  When copying is done, the cost is usually mitigated by usinga combined copy/checksum routine.  Copying also preloads the cache, which ismost useful with small frames.A subtle aspect of the operation is that unaligned buffers are not permittedby the hardware.  Thus the IP header at offset 14 in an ethernet frame isn'tlongword aligned for further processing.  On copies frames are put into theskbuff at an offset of "+2", 16-byte aligning the IP header.IIId. SynchronizationThe driver runs as two independent, single-threaded flows of control.  Oneis the send-packet routine, which enforces single-threaded use by thedev->tbusy flag.  The other thread is the interrupt handler, which is singlethreaded by the hardware and interrupt handling software.The send packet thread has partial control over the Tx ring and 'dev->tbusy'flag.  It sets the tbusy flag whenever it's queuing a Tx packet. If the nextqueue slot is empty, it clears the tbusy flag when finished otherwise it setsthe 'lp->tx_full' flag.The interrupt handler has exclusive control over the Rx ring and records statsfrom the Tx ring.  After reaping the stats, it marks the Tx queue entry asempty by incrementing the dirty_tx mark. Iff the 'lp->tx_full' flag is set, itclears both the tx_full and tbusy flags.IV. NotesThe older dp83810 chips are so uncommon that support is not relevant.No NatSemi datasheet was publically available at the initial release date,but the dp83815 has now been published.IVb. Referenceshttp://www.scyld.com/expert/100mbps.htmlhttp://www.scyld.com/expert/NWay.htmlIVc. ErrataQustionable multicast filter implementation.The EEPROM format is obviously the result of a chip bug.*/static void *natsemi_probe1(struct pci_dev *pdev, void *init_dev,							long ioaddr, int irq, int chip_idx, int find_cnt);static int power_event(void *dev_instance, int event);#ifdef USE_IO_OPS#define PCI_IOTYPE (PCI_USES_MASTER | PCI_USES_IO  | PCI_ADDR0)#else#define PCI_IOTYPE (PCI_USES_MASTER | PCI_USES_MEM | PCI_ADDR1)#endifstatic struct pci_id_info pci_id_tbl[] = {	{"Netgear FA311 (NatSemi DP83815)",	 { 0x0020100B, 0xffffffff, 0xf3111385, 0xffffffff, },	 PCI_IOTYPE, 256, 0},	{"NatSemi DP83815", { 0x0020100B, 0xffffffff },	 PCI_IOTYPE, 256, 0},	{0,},						/* 0 terminated list. */};struct drv_id_info natsemi_drv_id = {	"natsemi", PCI_HOTSWAP, PCI_CLASS_NETWORK_ETHERNET<<8, pci_id_tbl,	natsemi_probe1, power_event };/* Offsets to the device registers.   Unlike software-only systems, device drivers interact with complex hardware.   It's not useful to define symbolic names for every register bit in the   device.  Please do not change these names without good reason.*/enum register_offsets {	ChipCmd=0x00, ChipConfig=0x04, EECtrl=0x08, PCIBusCfg=0x0C,	IntrStatus=0x10, IntrMask=0x14, IntrEnable=0x18,	TxRingPtr=0x20, TxConfig=0x24,	RxRingPtr=0x30, RxConfig=0x34, ClkRunCtrl=0x3C,	WOLCmd=0x40, PauseCmd=0x44, RxFilterAddr=0x48, RxFilterData=0x4C,	BootRomAddr=0x50, BootRomData=0x54, ChipRevReg=0x58,	StatsCtrl=0x5C, StatsData=0x60,	RxPktErrs=0x60, RxMissed=0x68, RxCRCErrs=0x64,	NS_Xcvr_Mgmt = 0x80, NS_MII_BMCR=0x80, NS_MII_BMSR=0x84,	NS_MII_Advert=0x90, NS_MIILinkPartner=0x94,};/* Bits in ChipCmd. */enum ChipCmdBits {	ChipReset=0x100, SoftIntr=0x80, RxReset=0x20, TxReset=0x10,	RxOff=0x08, RxOn=0x04, TxOff=0x02, TxOn=0x01,};/* Bits in ChipConfig. */enum ChipConfigBits {	CfgLinkGood=0x80000000, CfgFDX=0x20000000,};/* Bits in the interrupt status/mask registers. */enum intr_status_bits {	IntrRxDone=0x0001, IntrRxIntr=0x0002, IntrRxErr=0x0004, IntrRxEarly=0x0008,	IntrRxIdle=0x0010, IntrRxOverrun=0x0020,	IntrTxDone=0x0040, IntrTxIntr=0x0080, IntrTxErr=0x0100,	IntrTxIdle=0x0200, IntrTxUnderrun=0x0400,	StatsMax=0x0800, IntrDrv=0x1000, WOLPkt=0x2000, LinkChange=0x4000,	RxStatusOverrun=0x10000,	RxResetDone=0x1000000, TxResetDone=0x2000000,	IntrPCIErr=0x00f00000,	IntrNormalSummary=0x0251, IntrAbnormalSummary=0xED20,};/* Bits in the RxMode register. */enum rx_mode_bits {	AcceptErr=0x20, AcceptRunt=0x10,	AcceptBroadcast=0xC0000000,	AcceptMulticast=0x00200000, AcceptAllMulticast=0x20000000,	AcceptAllPhys=0x10000000, AcceptMyPhys=0x08000000,};/* The Rx and Tx buffer descriptors. *//* Note that using only 32 bit fields simplifies conversion to big-endian   architectures. */struct netdev_desc {	u32 next_desc;	s32 cmd_status;	u32 buf_addr;	u32 software_use;};/* Bits in network_desc.status */enum desc_status_bits {	DescOwn=0x80000000, DescMore=0x40000000, DescIntr=0x20000000,	DescNoCRC=0x10000000,	DescPktOK=0x08000000, RxTooLong=0x00400000,};#define PRIV_ALIGN	15	/* Required alignment mask */struct netdev_private {	/* Descriptor rings first for alignment. */

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