sh-intr.h

this is ipl loader for hitachi SH4 processor.

/* sh-intr.h: A header file for sh-intr
 *
 *  Copyright (C) 2001 KOMORIYA Takeru
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
 *
 * See the file "GPL" for more details.
 *
 * Contact to author:
 *   KOMORIYA Takeru, AAF Sendai Lab., Japan
 *   E-mail: [e-mail]
 *      URL: http://chmodx.dyndns.org/aaf/
 */

#ifndef __SH_INTR_H
#define __SH_INTR_H

/* Interrupt code definition */
#define INTR_IRQ0        16
#define INTR_IRQ1        17
#define INTR_IRQ2        18
#define INTR_IRQ3        19
#define INTR_IRQ4        20
#define INTR_IRQ5        21
#define INTR_IRQ6        22
#define INTR_IRQ7        23
#define INTR_IRQ8        24
#define INTR_IRQ9        25
#define INTR_IRQ10       26
#define INTR_IRQ11       27
#define INTR_IRQ12       28
#define INTR_IRQ13       29
#define INTR_IRQ14       30
#define INTR_TMU0_TUNI0  32
#define INTR_TMU1_TUNI1  33
#define INTR_TMU2_TUNI2  34
#define INTR_TMU2_TICPI2 35
#define INTR_RTC_ATI     36
#define INTR_RTC_PRI     37
#define INTR_RTC_CUI     38
#define INTR_SCI_ERI     39
#define INTR_SCI_RXI     40
#define INTR_SCI_TXI     41
#define INTR_SCI_TEI     42
#define INTR_WDT_ITI     43
#define INTR_REF_RCMI    44
#define INTR_REF_ROVI    45
#define INTR_UDI         48
#define INTR_GPIO_GPIOI  49
#define INTR_DMAC_DMTE0  50
#define INTR_DMAC_DMTE1  51
#define INTR_DMAC_DMTE2  52
#define INTR_DMAC_DMTE3  53
#define INTR_DMAC_DMAE   54
#define INTR_SCIF_ERI    56
#define INTR_SCIF_RXI    57
#define INTR_SCIF_BRI    58
#define INTR_SCIF_TXI    59

/* Module code definition for priority settings */
#define MOD_UDI     0x20
#define MOD_GPIO    0x2c
#define MOD_DMAC    0x28
#define MOD_TMU0    0x0c
#define MOD_TMU1    0x08
#define MOD_TMU2    0x04
#define MOD_RTC     0x00
#define MOD_SCI     0x14
#define MOD_SCIF    0x24
#define MOD_WDT     0x1c
#define MOD_REF     0x18

/* Register interrupt */
extern int intr_register (int intr, void *function);

/* Unregister interrupt */
extern int intr_unregister (int intr);

/* Set priority for peripheral modules */
extern void intr_set_priority (int intr, int pri);

/* Disable interrupt */
extern __inline__ void intr_disable(void)
{
  unsigned long tmp;
  __asm__ __volatile__("stc	sr,%0\n\t"
		       "or	%1,%0\n\t"
		       "ldc	%0,sr"
		       : "=&z" (tmp)
		       : "r" (0x10000000)
		       : "memory" );
}

/* Enable interrupt */
extern __inline__ void intr_enable(void)
{
  unsigned long tmp;
  __asm__ __volatile__("stc	sr,%0\n\t"
		       "and	%1,%0\n\t"
		       "ldc	%0,sr"
		       : "=&z" (tmp)
		       : "r" (0xefffffff)
		       : "memory" );
}

#endif /* __SH_INTR_H */