sh4-ipl.map

this is ipl loader for hitachi SH4 processor.

Memory Configuration

Name             Origin             Length             Attributes
ROM              0x80010000         0x00040000         xr
RAM              0x8c000000         0x00010000         rw
*default*        0x00000000         0xffffffff

Linker script and memory map


.text           0x80010000     0x2198
 entry.o(.text)
 .text          0x80010000     0x1000 entry.o
                0x80010000                start
 *(.text)
 .text          0x80011000      0x540 sh4-ipl.o
                0x80011020                lowhex
                0x80011400                start_main
                0x80011000                highhex
                0x80011040                hex
 .text          0x80011540      0x640 sh-sci.o
                0x80011a40                scif_disable
                0x80011a80                scif_put_decimal
                0x800118a0                scif_getcw
                0x80011900                scif_putc
                0x80011b20                scif_put_hex
                0x80011840                scif_getc
                0x80011760                scif_init
                0x80011980                scif_puts
                0x80011a00                scif_flush
 .text          0x80011b80       0xc0 sh-cache.o
                0x80011c00                sh_cache_control
 .text          0x80011c40      0x140 sh-intr.o
                0x80011c60                intr_register
                0x80011c40                intr_noop
                0x80011ce0                intr_set_priority
                0x80011ca0                intr_unregister
 *(.rodata)
 .rodata        0x80011d80      0x418 sh4-ipl.o
                0x80012198                __etext=.

.tors           0x8c000000        0x0 load address 0x80012198
                0x8c000000                __init_values_start=.
 *(.ctors)
 *(.dtors)

.data           0x8c000000      0x1e4 load address 0x80012198
 *(.data)
 .data          0x8c000000        0x4 sh4-ipl.o
 .data          0x8c000004      0x1e0 sh-intr.o
                0x8c0000f4                interrupt_table_bak
                0x8c000004                interrupt_table
                0x8c0001e4                __init_values_end=.
                0x8c0001e4                .=ALIGN(0x4)
                0x8c0001e4                __bss_start=.

.bss            0x8c0001e4      0x810
 *(.bss)
 .bss           0x8c0001e4      0x810 sh-sci.o
 *(COMMON)
                0x8c0009f4                .=ALIGN(0x4)
                0x8c0009f4                __bss_end=.

.stack          0x8cffffe0        0x0
 *(.stack)
                0x8cffffe0                __init_stack=.

.stab
 *(.stab)

.comment        0x8cffffe0       0xa4
 *(.comment)
 .comment       0x8cffffe0       0x29 sh4-ipl.o
 .comment       0x8d000009       0x29 sh-sci.o
 .comment       0x8d000032       0x29 sh-cache.o
 .comment       0x8d00005b       0x29 sh-intr.o

.stabstr
 *(.stabstr)
LOAD entry.o
LOAD sh4-ipl.o
LOAD sh-sci.o
LOAD sh-cache.o
LOAD sh-intr.o
LOAD /usr/sh4eb-linux/lib/libm.a
LOAD /usr/sh4eb-linux/lib/libc.a
LOAD /usr/lib/gcc-lib/sh4eb-linux/2.97/libgcc.a
OUTPUT(sh4-ipl elf32-shbig-linux)