apsh4.lds

this is ipl loader for hitachi SH4 processor.

OUTPUT_FORMAT
             ("elf32-shbig-linux", "elf32-shbig-linux", "elf32-shbig-linux")
OUTPUT_ARCH(sh)
MEMORY
{
        /* 0x00000000: P0 cached TLB-enabled
	   0x80000000: P1 cached
           0xA0000000: P2 non-cached
	   0xC0000000: P3 cached TLB-enabled
	   0xE0000000: P4 internal I/O mapped */
        ROM
            (
             rx
               )
                : ORIGIN = 0x80010000, LENGTH = 256k
        RAM (rw): ORIGIN = 0x8c000000, LENGTH = 64k
}
SECTIONS
{
  .text :
  {
    entry.o(.text)
    *(.text)
    *(.rodata)
    __etext = .;
  } > ROM
  .tors :
  AT ( ADDR(.text)+SIZEOF(.text) )
  {
    __init_values_start = .;
    *(.ctors)
    *(.dtors)
  } > RAM
  .data :
  AT ( ADDR(.text)+SIZEOF(.text)+SIZEOF(.tors) )
  {
    *(.data)
    __init_values_end = .;
  } > RAM
  . = ALIGN(4);
  __bss_start = .; /* BSS */
  .bss :
  {
    *(.bss)
    *(COMMON)
  } > RAM
  . = ALIGN(4);
  __bss_end = .;
  .stack 0x8cffffe0 :
  {
    *(.stack)
    __init_stack = .;
  }
  .stab :
  {
    *(.stab)
  }
  .comment :
  {
    *(.comment)
  }
  .stabstr :
  {
    *(.stabstr)
  }
}