stm32l1xx_rcc.c

VS1003_MP3_SPI_SDHC_FAT32

  *     @arg RCC_APB2Periph_TIM11:        TIM11 clock
  *     @arg RCC_APB2Periph_ADC1:         ADC1 clock
  *     @arg RCC_APB2Periph_SDIO:         SDIO clock
  *     @arg RCC_APB2Periph_SPI1:         SPI1 clock
  *     @arg RCC_APB2Periph_USART1:       USART1 clock
  * @param  NewState: new state of the specified peripheral reset.
  *         This parameter can be: ENABLE or DISABLE.
  * @retval None
  */
void RCC_APB2PeriphResetCmd(uint32_t RCC_APB2Periph, FunctionalState NewState)
{
  /* Check the parameters */
  assert_param(IS_RCC_APB2_PERIPH(RCC_APB2Periph));
  assert_param(IS_FUNCTIONAL_STATE(NewState));

  if (NewState != DISABLE)
  {
    RCC->APB2RSTR |= RCC_APB2Periph;
  }
  else
  {
    RCC->APB2RSTR &= ~RCC_APB2Periph;
  }
}

/**
  * @brief  Forces or releases Low Speed APB (APB1) peripheral reset.
  * @param  RCC_APB1Periph: specifies the APB1 peripheral to reset.
  *   This parameter can be any combination of the following values:
  *     @arg RCC_APB1Periph_TIM2:           TIM2 clock
  *     @arg RCC_APB1Periph_TIM3:           TIM3 clock
  *     @arg RCC_APB1Periph_TIM4:           TIM4 clock
  *     @arg RCC_APB1Periph_TIM5:           TIM5 clock  
  *     @arg RCC_APB1Periph_TIM6:           TIM6 clock
  *     @arg RCC_APB1Periph_TIM7:           TIM7 clock
  *     @arg RCC_APB1Periph_LCD:            LCD clock
  *     @arg RCC_APB1Periph_WWDG:           WWDG clock
  *     @arg RCC_APB1Periph_SPI2:           SPI2 clock
  *     @arg RCC_APB1Periph_SPI3:           SPI3 clock  
  *     @arg RCC_APB1Periph_USART2:         USART2 clock
  *     @arg RCC_APB1Periph_USART3:         USART3 clock
  *     @arg RCC_APB1Periph_UART4:          UART4 clock
  *     @arg RCC_APB1Periph_UART5:          UART5 clock  
  *     @arg RCC_APB1Periph_I2C1:           I2C1 clock
  *     @arg RCC_APB1Periph_I2C2:           I2C2 clock
  *     @arg RCC_APB1Periph_USB:            USB clock
  *     @arg RCC_APB1Periph_PWR:            PWR clock
  *     @arg RCC_APB1Periph_DAC:            DAC clock
  *     @arg RCC_APB1Periph_COMP    
  * @param  NewState: new state of the specified peripheral clock.
  *         This parameter can be: ENABLE or DISABLE.
  * @retval None
  */
void RCC_APB1PeriphResetCmd(uint32_t RCC_APB1Periph, FunctionalState NewState)
{
  /* Check the parameters */
  assert_param(IS_RCC_APB1_PERIPH(RCC_APB1Periph));
  assert_param(IS_FUNCTIONAL_STATE(NewState));

  if (NewState != DISABLE)
  {
    RCC->APB1RSTR |= RCC_APB1Periph;
  }
  else
  {
    RCC->APB1RSTR &= ~RCC_APB1Periph;
  }
}

/**
  * @brief  Enables or disables the AHB peripheral clock during SLEEP mode.
  * @note     Peripheral clock gating in SLEEP mode can be used to further reduce
  *           power consumption.
  *         - After wakeup from SLEEP mode, the peripheral clock is enabled again.
  *         - By default, all peripheral clocks are enabled during SLEEP mode. 
  * @param  RCC_AHBPeriph: specifies the AHB peripheral to gates its clock.
  *   This parameter can be any combination of the following values:
  *     @arg RCC_AHBPeriph_GPIOA:           GPIOA clock
  *     @arg RCC_AHBPeriph_GPIOB:           GPIOB clock
  *     @arg RCC_AHBPeriph_GPIOC:           GPIOC clock  
  *     @arg RCC_AHBPeriph_GPIOD:           GPIOD clock
  *     @arg RCC_AHBPeriph_GPIOE:           GPIOE clock
  *     @arg RCC_AHBPeriph_GPIOH:           GPIOH clock
  *     @arg RCC_AHBPeriph_GPIOF:           GPIOF clock
  *     @arg RCC_AHBPeriph_GPIOG:           GPIOG clock  
  *     @arg RCC_AHBPeriph_CRC:             CRC clock
  *     @arg RCC_AHBPeriph_FLITF: (has effect only when the Flash memory is in power down mode)  
  *     @arg RCC_AHBPeriph_SRAM:            SRAM clock     
  *     @arg RCC_AHBPeriph_DMA1:            DMA1 clock
  *     @arg RCC_AHBPeriph_DMA2:            DMA2 clock
  *     @arg RCC_AHBPeriph_AES:             AES clock
  *     @arg RCC_AHBPeriph_FSMC:            FSMC clock
  * @param  NewState: new state of the specified peripheral clock.
  *         This parameter can be: ENABLE or DISABLE.
  * @retval None
  */
void RCC_AHBPeriphClockLPModeCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState)
{
  /* Check the parameters */
  assert_param(IS_RCC_AHB_LPMODE_PERIPH(RCC_AHBPeriph));
  assert_param(IS_FUNCTIONAL_STATE(NewState));
  
  if (NewState != DISABLE)
  {
    RCC->AHBLPENR |= RCC_AHBPeriph;
  }
  else
  {
    RCC->AHBLPENR &= ~RCC_AHBPeriph;
  }
}

/**
  * @brief  Enables or disables the APB2 peripheral clock during SLEEP mode.
  * @note     Peripheral clock gating in SLEEP mode can be used to further reduce
  *           power consumption.
  * @note     After wakeup from SLEEP mode, the peripheral clock is enabled again.
  * @note     By default, all peripheral clocks are enabled during SLEEP mode. 
  * @param  RCC_APB2Periph: specifies the APB2 peripheral to gates its clock.
  *   This parameter can be any combination of the following values:
  *     @arg RCC_APB2Periph_SYSCFG:          SYSCFG clock
  *     @arg RCC_APB2Periph_TIM9:            TIM9 clock
  *     @arg RCC_APB2Periph_TIM10:           TIM10 clock
  *     @arg RCC_APB2Periph_TIM11:           TIM11 clock
  *     @arg RCC_APB2Periph_ADC1:            ADC1 clock
  *     @arg RCC_APB2Periph_SDIO:            SDIO clock  
  *     @arg RCC_APB2Periph_SPI1:            SPI1 clock
  *     @arg RCC_APB2Periph_USART1:          USART1 clock
  * @param  NewState: new state of the specified peripheral clock.
  *         This parameter can be: ENABLE or DISABLE.
  * @retval None
  */
void RCC_APB2PeriphClockLPModeCmd(uint32_t RCC_APB2Periph, FunctionalState NewState)
{
  /* Check the parameters */
  assert_param(IS_RCC_APB2_PERIPH(RCC_APB2Periph));
  assert_param(IS_FUNCTIONAL_STATE(NewState));
  
  if (NewState != DISABLE)
  {
    RCC->APB2LPENR |= RCC_APB2Periph;
  }
  else
  {
    RCC->APB2LPENR &= ~RCC_APB2Periph;
  }
}

/**
  * @brief  Enables or disables the APB1 peripheral clock during SLEEP mode.
  * @note     Peripheral clock gating in SLEEP mode can be used to further reduce
  *           power consumption.
  * @note     After wakeup from SLEEP mode, the peripheral clock is enabled again.
  * @note     By default, all peripheral clocks are enabled during SLEEP mode.        
  * @param  RCC_APB1Periph: specifies the APB1 peripheral to gates its clock.
  *   This parameter can be any combination of the following values:
  *     @arg RCC_APB1Periph_TIM2:                 TIM2 clock
  *     @arg RCC_APB1Periph_TIM3:                 TIM3 clock
  *     @arg RCC_APB1Periph_TIM4:                 TIM4 clock
  *     @arg RCC_APB1Periph_TIM5:                 TIM5 clock
  *     @arg RCC_APB1Periph_TIM6:                 TIM6 clock
  *     @arg RCC_APB1Periph_TIM7:                 TIM7 clock
  *     @arg RCC_APB1Periph_LCD:                  LCD clock
  *     @arg RCC_APB1Periph_WWDG:                 WWDG clock
  *     @arg RCC_APB1Periph_SPI2:                 SPI2 clock
  *     @arg RCC_APB1Periph_SPI3:                 SPI3 clock
  *     @arg RCC_APB1Periph_USART2:               USART2 clock
  *     @arg RCC_APB1Periph_USART3:               USART3 clock
  *     @arg RCC_APB1Periph_UART4:                UART4 clock
  *     @arg RCC_APB1Periph_UART5:                UART5 clock  
  *     @arg RCC_APB1Periph_I2C1:                 I2C1 clock
  *     @arg RCC_APB1Periph_I2C2:                 I2C2 clock
  *     @arg RCC_APB1Periph_USB:                  USB clock
  *     @arg RCC_APB1Periph_PWR:                  PWR clock
  *     @arg RCC_APB1Periph_DAC:                  DAC clock
  *     @arg RCC_APB1Periph_COMP:                 COMP clock
  * @param  NewState: new state                                 
  * @param  NewState: new state of the specified peripheral clock.
  *         This parameter can be: ENABLE or DISABLE.
  * @retval None
  */
void RCC_APB1PeriphClockLPModeCmd(uint32_t RCC_APB1Periph, FunctionalState NewState)
{
  /* Check the parameters */
  assert_param(IS_RCC_APB1_PERIPH(RCC_APB1Periph));
  assert_param(IS_FUNCTIONAL_STATE(NewState));
  
  if (NewState != DISABLE)
  {
    RCC->APB1LPENR |= RCC_APB1Periph;
  }
  else
  {
    RCC->APB1LPENR &= ~RCC_APB1Periph;
  }
}

/**
  * @}
  */

/** @defgroup RCC_Group4 Interrupts and flags management functions
 *  @brief   Interrupts and flags management functions 
 *
@verbatim
 ===============================================================================
             ##### Interrupts and flags management functions #####
 ===============================================================================

@endverbatim
  * @{
  */

/**
  * @brief  Enables or disables the specified RCC interrupts.
  * @note   The CSS interrupt doesn't have an enable bit; once the CSS is enabled
  *         and if the HSE clock fails, the CSS interrupt occurs and an NMI is
  *         automatically generated. The NMI will be executed indefinitely, and 
  *         since NMI has higher priority than any other IRQ (and main program)
  *         the application will be stacked in the NMI ISR unless the CSS interrupt
  *         pending bit is cleared.
  * @param  RCC_IT: specifies the RCC interrupt sources to be enabled or disabled.
  *   This parameter can be any combination of the following values:
  *     @arg RCC_IT_LSIRDY: LSI ready interrupt
  *     @arg RCC_IT_LSERDY: LSE ready interrupt
  *     @arg RCC_IT_HSIRDY: HSI ready interrupt
  *     @arg RCC_IT_HSERDY: HSE ready interrupt
  *     @arg RCC_IT_PLLRDY: PLL ready interrupt
  *     @arg RCC_IT_MSIRDY: MSI ready interrupt
  *     @arg RCC_IT_LSECSS: LSE CSS interrupt  
  * @param  NewState: new state of the specified RCC interrupts.
  *   This parameter can be: ENABLE or DISABLE.
  * @retval None
  */
void RCC_ITConfig(uint8_t RCC_IT, FunctionalState NewState)
{
  /* Check the parameters */
  assert_param(IS_RCC_IT(RCC_IT));
  assert_param(IS_FUNCTIONAL_STATE(NewState));
  
  if (NewState != DISABLE)
  {
    /* Perform Byte access to RCC_CIR[12:8] bits to enable the selected interrupts */
    *(__IO uint8_t *) CIR_BYTE2_ADDRESS |= RCC_IT;
  }
  else
  {
    /* Perform Byte access to RCC_CIR[12:8] bits to disable the selected interrupts */
    *(__IO uint8_t *) CIR_BYTE2_ADDRESS &= (uint8_t)~RCC_IT;
  }
}

/**
  * @brief  Checks whether the specified RCC flag is set or not.
  * @param  RCC_FLAG: specifies the flag to check.
  *   This parameter can be one of the following values:
  *     @arg RCC_FLAG_HSIRDY: HSI oscillator clock ready
  *     @arg RCC_FLAG_MSIRDY: MSI oscillator clock ready  
  *     @arg RCC_FLAG_HSERDY: HSE oscillator clock ready
  *     @arg RCC_FLAG_PLLRDY: PLL clock ready
  *     @arg RCC_FLAG_LSECSS: LSE oscillator clock CSS detected  
  *     @arg RCC_FLAG_LSERDY: LSE oscillator clock ready
  *     @arg RCC_FLAG_LSIRDY: LSI oscillator clock ready
  *     @arg RCC_FLAG_OBLRST: Option Byte Loader (OBL) reset 
  *     @arg RCC_FLAG_PINRST: Pin reset
  *     @arg RCC_FLAG_PORRST: POR/PDR reset
  *     @arg RCC_FLAG_SFTRST: Software reset
  *     @arg RCC_FLAG_IWDGRST: Independent Watchdog reset
  *     @arg RCC_FLAG_WWDGRST: Window Watchdog reset
  *     @arg RCC_FLAG_LPWRRST: Low Power reset
  * @retval The new state of RCC_FLAG (SET or RESET).
  */
FlagStatus RCC_GetFlagStatus(uint8_t RCC_FLAG)
{
  uint32_t tmp = 0;
  uint32_t statusreg = 0;
  FlagStatus bitstatus = RESET;

  /* Check the parameters */
  assert_param(IS_RCC_FLAG(RCC_FLAG));

  /* Get the RCC register index */
  tmp = RCC_FLAG >> 5;

  if (tmp == 1)               /* The flag to check is in CR register */
  {
    statusreg = RCC->CR;
  }
  else          /* The flag to check is in CSR register (tmp == 2) */
  {
    statusreg = RCC->CSR;
  }

  /* Get the flag position */
  tmp = RCC_FLAG & FLAG_MASK;

  if ((statusreg & ((uint32_t)1 << tmp)) != (uint32_t)RESET)
  {
    bitstatus = SET;
  }
  else
  {
    bitstatus = RESET;
  }
  /* Return the flag status */
  return bitstatus;
}

/**
  * @brief  Clears the RCC r