stm32l1xx_adc.c

VS1003_MP3_SPI_SDHC_FAT32

  */
FlagStatus ADC_GetSoftwareStartConvStatus(ADC_TypeDef* ADCx)
{
  FlagStatus bitstatus = RESET;

  /* Check the parameters */
  assert_param(IS_ADC_ALL_PERIPH(ADCx));

  /* Check the status of SWSTART bit */
  if ((ADCx->CR2 & ADC_CR2_SWSTART) != (uint32_t)RESET)
  {
    /* SWSTART bit is set */
    bitstatus = SET;
  }
  else
  {
    /* SWSTART bit is reset */
    bitstatus = RESET;
  }
  /* Return the SWSTART bit status */
  return  bitstatus;
}

/**
  * @brief  Enables or disables the EOC on each regular channel conversion.
  * @param  ADCx: where x can be 1 to select the ADC1 peripheral.
  * @param  NewState: new state of the selected ADC EOC flag rising
  *    This parameter can be: ENABLE or DISABLE.
  * @retval None
  */
void ADC_EOCOnEachRegularChannelCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
{
  /* Check the parameters */
  assert_param(IS_ADC_ALL_PERIPH(ADCx));
  assert_param(IS_FUNCTIONAL_STATE(NewState));

  if (NewState != DISABLE)
  {
    /* Enable the selected ADC EOC rising on each regular channel conversion */
    ADCx->CR2 |= ADC_CR2_EOCS;
  }
  else
  {
    /* Disable the selected ADC EOC rising on each regular channel conversion */
    ADCx->CR2 &= (uint32_t)~ADC_CR2_EOCS;
  }
}

/**
  * @brief  Enables or disables the ADC continuous conversion mode.
  * @param  ADCx: where x can be 1 to select the ADC1 peripheral.
  * @param  NewState: new state of the selected ADC continuous conversion mode.
  *         This parameter can be: ENABLE or DISABLE.
  * @retval None
  */
void ADC_ContinuousModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
{
  /* Check the parameters */
  assert_param(IS_ADC_ALL_PERIPH(ADCx));
  assert_param(IS_FUNCTIONAL_STATE(NewState));

  if (NewState != DISABLE)
  {
    /* Enable the selected ADC continuous conversion mode */
    ADCx->CR2 |= (uint32_t)ADC_CR2_CONT;
  }
  else
  {
    /* Disable the selected ADC continuous conversion mode */
    ADCx->CR2 &= (uint32_t)(~ADC_CR2_CONT);
  }
}

/**
  * @brief  Configures the discontinuous mode for the selected ADC regular
  *         group channel.
  * @param  ADCx: where x can be 1 to select the ADC1 peripheral.
  * @param  Number: specifies the discontinuous mode regular channel count value.
  *         This number must be between 1 and 8.
  * @retval None
  */
void ADC_DiscModeChannelCountConfig(ADC_TypeDef* ADCx, uint8_t Number)
{
  uint32_t tmpreg1 = 0;
  uint32_t tmpreg2 = 0;

  /* Check the parameters */
  assert_param(IS_ADC_ALL_PERIPH(ADCx));
  assert_param(IS_ADC_REGULAR_DISC_NUMBER(Number));

  /* Get the old register value */
  tmpreg1 = ADCx->CR1;
  /* Clear the old discontinuous mode channel count */
  tmpreg1 &= CR1_DISCNUM_RESET;
  /* Set the discontinuous mode channel count */
  tmpreg2 = Number - 1;
  tmpreg1 |= tmpreg2 << 13;
  /* Store the new register value */
  ADCx->CR1 = tmpreg1;
}

/**
  * @brief  Enables or disables the discontinuous mode on regular group
  *         channel for the specified ADC.
  * @param  ADCx: where x can be 1 to select the ADC1 peripheral.
  * @param  NewState: new state of the selected ADC discontinuous mode on regular 
  *         group channel.
  *         This parameter can be: ENABLE or DISABLE.
  * @retval None
  */
void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
{
  /* Check the parameters */
  assert_param(IS_ADC_ALL_PERIPH(ADCx));
  assert_param(IS_FUNCTIONAL_STATE(NewState));

  if (NewState != DISABLE)
  {
    /* Enable the selected ADC regular discontinuous mode */
    ADCx->CR1 |= (uint32_t)ADC_CR1_DISCEN;
  }
  else
  {
    /* Disable the selected ADC regular discontinuous mode */
    ADCx->CR1 &= (uint32_t)(~ADC_CR1_DISCEN);
  }
}

/**
  * @brief  Returns the last ADCx conversion result data for regular channel.
  * @param  ADCx: where x can be 1 to select the ADC1 peripheral.
  * @retval The Data conversion value.
  */
uint16_t ADC_GetConversionValue(ADC_TypeDef* ADCx)
{
  /* Check the parameters */
  assert_param(IS_ADC_ALL_PERIPH(ADCx));

  /* Return the selected ADC conversion value */
  return (uint16_t) ADCx->DR;
}

/**
  * @}
  */

/** @defgroup ADC_Group6 Regular Channels DMA Configuration functions
 *  @brief   Regular Channels DMA Configuration functions.
 *
@verbatim   
 ===============================================================================
          ##### Regular Channels DMA Configuration functions #####
 ===============================================================================
    [..] This section provides functions allowing to configure the DMA for ADC regular 
         channels.Since converted regular channel values are stored into a unique 
         data register, it is useful to use DMA for conversion of more than one 
         regular channel. This avoids the loss of the data already stored in the 
         ADC Data register.
         When the DMA mode is enabled (using the ADC_DMACmd() function), after each
         conversion of a regular channel, a DMA request is generated.
    [..] Depending on the "DMA disable selection" configuration (using the 
         ADC_DMARequestAfterLastTransferCmd() function), at the end of the last DMA 
         transfer, two possibilities are allowed:
         (+) No new DMA request is issued to the DMA controller (feature DISABLED).
         (+) Requests can continue to be generated (feature ENABLED).

@endverbatim
  * @{
  */

/**
  * @brief  Enables or disables the specified ADC DMA request.
  * @param  ADCx: where x can be 1 to select the ADC1 peripheral.
  * @param  NewState: new state of the selected ADC DMA transfer.
  *         This parameter can be: ENABLE or DISABLE.
  * @retval None
  */
void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState)
{
  /* Check the parameters */
  assert_param(IS_ADC_DMA_PERIPH(ADCx));
  assert_param(IS_FUNCTIONAL_STATE(NewState));

  if (NewState != DISABLE)
  {
    /* Enable the selected ADC DMA request */
    ADCx->CR2 |= (uint32_t)ADC_CR2_DMA;
  }
  else
  {
    /* Disable the selected ADC DMA request */
    ADCx->CR2 &= (uint32_t)(~ADC_CR2_DMA);
  }
}


/**
  * @brief  Enables or disables the ADC DMA request after last transfer (Single-ADC mode).
  * @param  ADCx: where x can be 1 to select the ADC1 peripheral.
  * @param  NewState: new state of the selected ADC EOC flag rising
  *         This parameter can be: ENABLE or DISABLE.
  * @retval None
  */
void ADC_DMARequestAfterLastTransferCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
{
  /* Check the parameters */
  assert_param(IS_ADC_ALL_PERIPH(ADCx));
  assert_param(IS_FUNCTIONAL_STATE(NewState));

  if (NewState != DISABLE)
  {
    /* Enable the selected ADC DMA request after last transfer */
    ADCx->CR2 |= ADC_CR2_DDS;
  }
  else
  {
    /* Disable the selected ADC DMA request after last transfer */
    ADCx->CR2 &= (uint32_t)~ADC_CR2_DDS;
  }
}

/**
  * @}
  */

/** @defgroup ADC_Group7 Injected channels Configuration functions
 *  @brief   Injected channels Configuration functions.
 *
@verbatim   
 ===============================================================================
            ##### Injected channels Configuration functions #####
 ===============================================================================
    [..] This section provide functions allowing to configure the ADC Injected channels,
         it is composed of 2 sub sections : 
         (#) Configuration functions for Injected channels: This subsection provides 
             functions allowing to configure the ADC injected channels :
             (++) Configure the rank in the injected group sequencer for each channel.
             (++) Configure the sampling time for each channel.
             (++) Activate the Auto injected Mode.
             (++) Activate the Discontinuous Mode.
             (++) scan mode activation.
             (++) External/software trigger source.
             (++) External trigger edge.
             (++) injected channels sequencer.
    
         (#) Get the Specified Injected channel conversion data: This subsection 
             provides an important function in the ADC peripheral since it returns 
             the converted data of the specific injected channel.

@endverbatim
  * @{
  */ 

/**
  * @brief  Configures for the selected ADC injected channel its corresponding
  *         rank in the sequencer and its sample time.
  * @param  ADCx: where x can be 1 to select the ADC1 peripheral.
  * @param  ADC_Channel: the ADC channel to configure.
  *   This parameter can be one of the following values:
  *     @arg ADC_Channel_0: ADC Channel0 selected
  *     @arg ADC_Channel_1: ADC Channel1 selected
  *     @arg ADC_Channel_2: ADC Channel2 selected
  *     @arg ADC_Channel_3: ADC Channel3 selected
  *     @arg ADC_Channel_4: ADC Channel4 selected
  *     @arg ADC_Channel_5: ADC Channel5 selected
  *     @arg ADC_Channel_6: ADC Channel6 selected
  *     @arg ADC_Channel_7: ADC Channel7 selected
  *     @arg ADC_Channel_8: ADC Channel8 selected
  *     @arg ADC_Channel_9: ADC Channel9 selected
  *     @arg ADC_Channel_10: ADC Channel10 selected
  *     @arg ADC_Channel_11: ADC Channel11 selected
  *     @arg ADC_Channel_12: ADC Channel12 selected
  *     @arg ADC_Channel_13: ADC Channel13 selected
  *     @arg ADC_Channel_14: ADC Channel14 selected
  *     @arg ADC_Channel_15: ADC Channel15 selected
  *     @arg ADC_Channel_16: ADC Channel16 selected
  *     @arg ADC_Channel_17: ADC Channel17 selected
  *     @arg ADC_Channel_18: ADC Channel18 selected 
  *     @arg ADC_Channel_19: ADC Channel19 selected
  *     @arg ADC_Channel_20: ADC Channel20 selected
  *     @arg ADC_Channel_21: ADC Channel21 selected
  *     @arg ADC_Channel_22: ADC Channel22 selected
  *     @arg ADC_Channel_23: ADC Channel23 selected
  *     @arg ADC_Channel_24: ADC Channel24 selected
  *     @arg ADC_Channel_25: ADC Channel25 selected
  *     @arg ADC_Channel_27: ADC Channel27 selected
  *     @arg ADC_Channel_28: ADC Channel28 selected
  *     @arg ADC_Channel_29: ADC Channel29 selected
  *     @arg ADC_Channel_30: ADC Channel30 selected
  *     @arg ADC_Channel_31: ADC Channel31 selected 
  *     @arg ADC_Channel_0b: ADC Channel0b selected
  *     @arg ADC_Channel_1b: ADC Channel1b selected
  *     @arg ADC_Channel_2b: ADC Channel2b selected
  *     @arg ADC_Channel_3b: ADC Channel3b selected
  *     @arg ADC_Channel_6b: ADC Channel6b selected
  *     @arg ADC_Channel_7b: ADC Channel7b selected
  *     @arg ADC_Channel_8b: ADC Channel8b selected
  *     @arg ADC_Channel_9b: ADC Channel9b selected
  *     @arg ADC_Channel_10b: ADC Channel10b selected
  *     @arg ADC_Channel_11b: ADC Channel11b selected
  *     @arg ADC_Channel_12b: ADC Channel12b selected   
  * @param  Rank: The rank in the injected group sequencer. This parameter
  *         must be between 1 to 4.
  * @param  ADC_SampleTime: The sample time value to be set for the selected 
  *         channel. This parameter can be one of the following values:
  *     @arg ADC_SampleTime_4Cycles: Sample time equal to 4 cycles
  *     @arg ADC_SampleTime_9Cycles: Sample time equal to 9 cycles
  *     @arg ADC_SampleTime_16Cycles: Sample time equal to 16 cycles
  *     @arg ADC_SampleTime_24Cycles: Sample time equal to 24 cycles	
  *     @arg ADC_SampleTime_48Cycles: Sample time equal to 48 cycles	
  *     @arg ADC_SampleTime_96Cycles: Sample time equal to 96 cycles	
  *     @arg ADC_SampleTime_192Cycles: Sample time equal to 192 cycles	
  *     @arg ADC_SampleTime_384Cycles: Sample time equal to 384 cycles	
  * @retval None
  */
void ADC_InjectedChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime)
{
  uint32_t tmpreg1 = 0, tmpreg2 = 0, tmpreg3 = 0;

  /* Check the parameters */
  assert_param(IS_ADC_ALL_PERIPH(ADCx));
  assert_param(IS_ADC_CHANNEL(ADC_Channel));
  assert_param(IS_ADC_INJECTED_RANK(Rank));
  assert_param(IS_ADC_SAMPLE_TIME(ADC_SampleTime));
  
  /* If ADC_Channel_30 or ADC_Channel_31 is selected */
  if (ADC_Channel > ADC_Channel_29)
  {
    /* Get the old register value */
    tmpreg1 = ADCx->SMPR0;
    /* Calculate the mask to clear */