📄 stm32l1xx_adc.h
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/**
******************************************************************************
* @file stm32l1xx_adc.h
* @author MCD Application Team
* @version V1.1.0
* @date 24-January-2012
* @brief This file contains all the functions prototypes for the ADC firmware
* library.
******************************************************************************
* @attention
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*
* FOR MORE INFORMATION PLEASE READ CAREFULLY THE LICENSE AGREEMENT FILE
* LOCATED IN THE ROOT DIRECTORY OF THIS FIRMWARE PACKAGE.
*
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L1xx_ADC_H
#define __STM32L1xx_ADC_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32l1xx.h"
/** @addtogroup STM32L1xx_StdPeriph_Driver
* @{
*/
/** @addtogroup ADC
* @{
*/
/* Exported types ------------------------------------------------------------*/
/**
* @brief ADC Init structure definition
*/
typedef struct
{
uint32_t ADC_Resolution; /*!< Selects the resolution of the conversion.
This parameter can be a value of @ref ADC_Resolution */
FunctionalState ADC_ScanConvMode; /*!< Specifies whether the conversion is performed in
Scan (multichannel) or Single (one channel) mode.
This parameter can be set to ENABLE or DISABLE */
FunctionalState ADC_ContinuousConvMode; /*!< Specifies whether the conversion is performed in
Continuous or Single mode.
This parameter can be set to ENABLE or DISABLE. */
uint32_t ADC_ExternalTrigConvEdge; /*!< Selects the external trigger Edge and enables the
trigger of a regular group. This parameter can be a value
of @ref ADC_external_trigger_edge_for_regular_channels_conversion */
uint32_t ADC_ExternalTrigConv; /*!< Defines the external trigger used to start the analog
to digital conversion of regular channels. This parameter
can be a value of @ref ADC_external_trigger_sources_for_regular_channels_conversion */
uint32_t ADC_DataAlign; /*!< Specifies whether the ADC data alignment is left or right.
This parameter can be a value of @ref ADC_data_align */
uint8_t ADC_NbrOfConversion; /*!< Specifies the number of ADC conversions that will be done
using the sequencer for regular channel group.
This parameter must range from 1 to 27. */
}ADC_InitTypeDef;
typedef struct
{
uint32_t ADC_Prescaler; /*!< Selects the ADC prescaler.
This parameter can be a value
of @ref ADC_Prescaler */
}ADC_CommonInitTypeDef;
/* Exported constants --------------------------------------------------------*/
/** @defgroup ADC_Exported_Constants
* @{
*/
#define IS_ADC_ALL_PERIPH(PERIPH) ((PERIPH) == ADC1)
#define IS_ADC_DMA_PERIPH(PERIPH) ((PERIPH) == ADC1)
/** @defgroup ADC_Power_down_during_Idle_and_or_Delay_phase
* @{
*/
#define ADC_PowerDown_Delay ((uint32_t)0x00010000)
#define ADC_PowerDown_Idle ((uint32_t)0x00020000)
#define ADC_PowerDown_Idle_Delay ((uint32_t)0x00030000)
#define IS_ADC_POWER_DOWN(DWON) (((DWON) == ADC_PowerDown_Delay) || \
((DWON) == ADC_PowerDown_Idle) || \
((DWON) == ADC_PowerDown_Idle_Delay))
/**
* @}
*/
/** @defgroup ADC_Prescaler
* @{
*/
#define ADC_Prescaler_Div1 ((uint32_t)0x00000000)
#define ADC_Prescaler_Div2 ((uint32_t)0x00010000)
#define ADC_Prescaler_Div4 ((uint32_t)0x00020000)
#define IS_ADC_PRESCALER(PRESCALER) (((PRESCALER) == ADC_Prescaler_Div1) || \
((PRESCALER) == ADC_Prescaler_Div2) || \
((PRESCALER) == ADC_Prescaler_Div4))
/**
* @}
*/
/** @defgroup ADC_Resolution
* @{
*/
#define ADC_Resolution_12b ((uint32_t)0x00000000)
#define ADC_Resolution_10b ((uint32_t)0x01000000)
#define ADC_Resolution_8b ((uint32_t)0x02000000)
#define ADC_Resolution_6b ((uint32_t)0x03000000)
#define IS_ADC_RESOLUTION(RESOLUTION) (((RESOLUTION) == ADC_Resolution_12b) || \
((RESOLUTION) == ADC_Resolution_10b) || \
((RESOLUTION) == ADC_Resolution_8b) || \
((RESOLUTION) == ADC_Resolution_6b))
/**
* @}
*/
/** @defgroup ADC_external_trigger_edge_for_regular_channels_conversion
* @{
*/
#define ADC_ExternalTrigConvEdge_None ((uint32_t)0x00000000)
#define ADC_ExternalTrigConvEdge_Rising ((uint32_t)0x10000000)
#define ADC_ExternalTrigConvEdge_Falling ((uint32_t)0x20000000)
#define ADC_ExternalTrigConvEdge_RisingFalling ((uint32_t)0x30000000)
#define IS_ADC_EXT_TRIG_EDGE(EDGE) (((EDGE) == ADC_ExternalTrigConvEdge_None) || \
((EDGE) == ADC_ExternalTrigConvEdge_Rising) || \
((EDGE) == ADC_ExternalTrigConvEdge_Falling) || \
((EDGE) == ADC_ExternalTrigConvEdge_RisingFalling))
/**
* @}
*/
/** @defgroup ADC_external_trigger_sources_for_regular_channels_conversion
* @{
*/
/* TIM2 */
#define ADC_ExternalTrigConv_T2_CC3 ((uint32_t)0x02000000)
#define ADC_ExternalTrigConv_T2_CC2 ((uint32_t)0x03000000)
#define ADC_ExternalTrigConv_T2_TRGO ((uint32_t)0x06000000)
/* TIM3 */
#define ADC_ExternalTrigConv_T3_CC1 ((uint32_t)0x07000000)
#define ADC_ExternalTrigConv_T3_CC3 ((uint32_t)0x08000000)
#define ADC_ExternalTrigConv_T3_TRGO ((uint32_t)0x04000000)
/* TIM4 */
#define ADC_ExternalTrigConv_T4_CC4 ((uint32_t)0x05000000)
#define ADC_ExternalTrigConv_T4_TRGO ((uint32_t)0x09000000)
/* TIM6 */
#define ADC_ExternalTrigConv_T6_TRGO ((uint32_t)0x0A000000)
/* TIM9 */
#define ADC_ExternalTrigConv_T9_CC2 ((uint32_t)0x00000000)
#define ADC_ExternalTrigConv_T9_TRGO ((uint32_t)0x01000000)
/* EXTI */
#define ADC_ExternalTrigConv_Ext_IT11 ((uint32_t)0x0F000000)
#define IS_ADC_EXT_TRIG(REGTRIG) (((REGTRIG) == ADC_ExternalTrigConv_T9_CC2) || \
((REGTRIG) == ADC_ExternalTrigConv_T9_TRGO) || \
((REGTRIG) == ADC_ExternalTrigConv_T2_CC3) || \
((REGTRIG) == ADC_ExternalTrigConv_T2_CC2) || \
((REGTRIG) == ADC_ExternalTrigConv_T3_TRGO) || \
((REGTRIG) == ADC_ExternalTrigConv_T4_CC4) || \
((REGTRIG) == ADC_ExternalTrigConv_T2_TRGO) || \
((REGTRIG) == ADC_ExternalTrigConv_T3_CC1) || \
((REGTRIG) == ADC_ExternalTrigConv_T3_CC3) || \
((REGTRIG) == ADC_ExternalTrigConv_T4_TRGO) || \
((REGTRIG) == ADC_ExternalTrigConv_T6_TRGO) || \
((REGTRIG) == ADC_ExternalTrigConv_Ext_IT11))
/**
* @}
*/
/** @defgroup ADC_data_align
* @{
*/
#define ADC_DataAlign_Right ((uint32_t)0x00000000)
#define ADC_DataAlign_Left ((uint32_t)0x00000800)
#define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DataAlign_Right) || \
((ALIGN) == ADC_DataAlign_Left))
/**
* @}
*/
/** @defgroup ADC_channels
* @{
*/
/* ADC Bank A Channels -------------------------------------------------------*/
#define ADC_Channel_0 ((uint8_t)0x00)
#define ADC_Channel_1 ((uint8_t)0x01)
#define ADC_Channel_2 ((uint8_t)0x02)
#define ADC_Channel_3 ((uint8_t)0x03)
#define ADC_Channel_6 ((uint8_t)0x06)
#define ADC_Channel_7 ((uint8_t)0x07)
#define ADC_Channel_8 ((uint8_t)0x08)
#define ADC_Channel_9 ((uint8_t)0x09)
#define ADC_Channel_10 ((uint8_t)0x0A)
#define ADC_Channel_11 ((uint8_t)0x0B)
#define ADC_Channel_12 ((uint8_t)0x0C)
/* ADC Bank B Channels -------------------------------------------------------*/
#define ADC_Channel_0b ADC_Channel_0
#define ADC_Channel_1b ADC_Channel_1
#define ADC_Channel_2b ADC_Channel_2
#define ADC_Channel_3b ADC_Channel_3
#define ADC_Channel_6b ADC_Channel_6
#define ADC_Channel_7b ADC_Channel_7
#define ADC_Channel_8b ADC_Channel_8
#define ADC_Channel_9b ADC_Channel_9
#define ADC_Channel_10b ADC_Channel_10
#define ADC_Channel_11b ADC_Channel_11
#define ADC_Channel_12b ADC_Channel_12
/* ADC Common Channels (ADC Bank A and B) ------------------------------------*/
#define ADC_Channel_4 ((uint8_t)0x04)
#define ADC_Channel_5 ((uint8_t)0x05)
#define ADC_Channel_13 ((uint8_t)0x0D)
#define ADC_Channel_14 ((uint8_t)0x0E)
#define ADC_Channel_15 ((uint8_t)0x0F)
#define ADC_Channel_16 ((uint8_t)0x10)
#define ADC_Channel_17 ((uint8_t)0x11)
#define ADC_Channel_18 ((uint8_t)0x12)
#define ADC_Channel_19 ((uint8_t)0x13)
#define ADC_Channel_20 ((uint8_t)0x14)
#define ADC_Channel_21 ((uint8_t)0x15)
#define ADC_Channel_22 ((uint8_t)0x16)
#define ADC_Channel_23 ((uint8_t)0x17)
#define ADC_Channel_24 ((uint8_t)0x18)
#define ADC_Channel_25 ((uint8_t)0x19)
#define ADC_Channel_27 ((uint8_t)0x1B)
#define ADC_Channel_28 ((uint8_t)0x1C)
#define ADC_Channel_29 ((uint8_t)0x1D)
#define ADC_Channel_30 ((uint8_t)0x1E)
#define ADC_Channel_31 ((uint8_t)0x1F)
#define ADC_Channel_TempSensor ((uint8_t)ADC_Channel_16)
#define ADC_Channel_Vrefint ((uint8_t)ADC_Channel_17)
#define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_Channel_0) || ((CHANNEL) == ADC_Channel_1) || \
((CHANNEL) == ADC_Channel_2) || ((CHANNEL) == ADC_Channel_3) || \
((CHANNEL) == ADC_Channel_4) || ((CHANNEL) == ADC_Channel_5) || \
((CHANNEL) == ADC_Channel_6) || ((CHANNEL) == ADC_Channel_7) || \
((CHANNEL) == ADC_Channel_8) || ((CHANNEL) == ADC_Channel_9) || \
((CHANNEL) == ADC_Channel_10) || ((CHANNEL) == ADC_Channel_11) || \
((CHANNEL) == ADC_Channel_12) || ((CHANNEL) == ADC_Channel_13) || \
((CHANNEL) == ADC_Channel_14) || ((CHANNEL) == ADC_Channel_15) || \
((CHANNEL) == ADC_Channel_16) || ((CHANNEL) == ADC_Channel_17) || \
((CHANNEL) == ADC_Channel_18) || ((CHANNEL) == ADC_Channel_19) || \
((CHANNEL) == ADC_Channel_20) || ((CHANNEL) == ADC_Channel_21) || \
((CHANNEL) == ADC_Channel_22) || ((CHANNEL) == ADC_Channel_23) || \
((CHANNEL) == ADC_Channel_24) || ((CHANNEL) == ADC_Channel_25) || \
((CHANNEL) == ADC_Channel_27) || ((CHANNEL) == ADC_Channel_28) || \
((CHANNEL) == ADC_Channel_29) || ((CHANNEL) == ADC_Channel_30) || \
((CHANNEL) == ADC_Channel_31))
/**
* @}
*/
/** @defgroup ADC_sampling_times
* @{
*/
#define ADC_SampleTime_4Cycles ((uint8_t)0x00)
#define ADC_SampleTime_9Cycles ((uint8_t)0x01)
#define ADC_SampleTime_16Cycles ((uint8_t)0x02)
#define ADC_SampleTime_24Cycles ((uint8_t)0x03)
#define ADC_SampleTime_48Cycles ((uint8_t)0x04)
#define ADC_SampleTime_96Cycles ((uint8_t)0x05)
#define ADC_SampleTime_192Cycles ((uint8_t)0x06)
#define ADC_SampleTime_384Cycles ((uint8_t)0x07)
#define IS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SampleTime_4Cycles) || \
((TIME) == ADC_SampleTime_9Cycles) || \
((TIME) == ADC_SampleTime_16Cycles) || \
((TIME) == ADC_SampleTime_24Cycles) || \
((TIME) == ADC_SampleTime_48Cycles) || \
((TIME) == ADC_SampleTime_96Cycles) || \
((TIME) == ADC_SampleTime_192Cycles) || \
((TIME) == ADC_SampleTime_384Cycles))
/**
* @}
*/
/** @defgroup ADC_Delay_length
* @{
*/
#define ADC_DelayLength_None ((uint8_t)0x00)
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