📄 stm32l1xx_syscfg.h
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((ROUTING) == RI_InputCaptureRouting_5) || \
((ROUTING) == RI_InputCaptureRouting_6) || \
((ROUTING) == RI_InputCaptureRouting_7) || \
((ROUTING) == RI_InputCaptureRouting_8) || \
((ROUTING) == RI_InputCaptureRouting_9) || \
((ROUTING) == RI_InputCaptureRouting_10) || \
((ROUTING) == RI_InputCaptureRouting_11) || \
((ROUTING) == RI_InputCaptureRouting_12) || \
((ROUTING) == RI_InputCaptureRouting_13) || \
((ROUTING) == RI_InputCaptureRouting_14) || \
((ROUTING) == RI_InputCaptureRouting_15))
/**
* @}
*/
/** @defgroup RI_IOSwitch
* @{
*/
/* ASCR1 I/O switch: bit 31 is set to '1' to indicate that the mask is in ASCR1 register */
#define RI_IOSwitch_CH0 ((uint32_t)0x80000001)
#define RI_IOSwitch_CH1 ((uint32_t)0x80000002)
#define RI_IOSwitch_CH2 ((uint32_t)0x80000004)
#define RI_IOSwitch_CH3 ((uint32_t)0x80000008)
#define RI_IOSwitch_CH4 ((uint32_t)0x80000010)
#define RI_IOSwitch_CH5 ((uint32_t)0x80000020)
#define RI_IOSwitch_CH6 ((uint32_t)0x80000040)
#define RI_IOSwitch_CH7 ((uint32_t)0x80000080)
#define RI_IOSwitch_CH8 ((uint32_t)0x80000100)
#define RI_IOSwitch_CH9 ((uint32_t)0x80000200)
#define RI_IOSwitch_CH10 ((uint32_t)0x80000400)
#define RI_IOSwitch_CH11 ((uint32_t)0x80000800)
#define RI_IOSwitch_CH12 ((uint32_t)0x80001000)
#define RI_IOSwitch_CH13 ((uint32_t)0x80002000)
#define RI_IOSwitch_CH14 ((uint32_t)0x80004000)
#define RI_IOSwitch_CH15 ((uint32_t)0x80008000)
#define RI_IOSwitch_CH31 ((uint32_t)0x80010000)
#define RI_IOSwitch_CH18 ((uint32_t)0x80040000)
#define RI_IOSwitch_CH19 ((uint32_t)0x80080000)
#define RI_IOSwitch_CH20 ((uint32_t)0x80100000)
#define RI_IOSwitch_CH21 ((uint32_t)0x80200000)
#define RI_IOSwitch_CH22 ((uint32_t)0x80400000)
#define RI_IOSwitch_CH23 ((uint32_t)0x80800000)
#define RI_IOSwitch_CH24 ((uint32_t)0x81000000)
#define RI_IOSwitch_CH25 ((uint32_t)0x82000000)
#define RI_IOSwitch_VCOMP ((uint32_t)0x84000000) /* VCOMP is an internal switch used to connect
selected channel to COMP1 non inverting input */
#define RI_IOSwitch_CH27 ((uint32_t)0x88000000)
#define RI_IOSwitch_CH28 ((uint32_t)0x90000000)
#define RI_IOSwitch_CH29 ((uint32_t)0xA0000000)
#define RI_IOSwitch_CH30 ((uint32_t)0xC0000000)
/* ASCR2 IO switch: bit 31 is set to '0' to indicate that the mask is in ASCR2 register */
#define RI_IOSwitch_GR10_1 ((uint32_t)0x00000001)
#define RI_IOSwitch_GR10_2 ((uint32_t)0x00000002)
#define RI_IOSwitch_GR10_3 ((uint32_t)0x00000004)
#define RI_IOSwitch_GR10_4 ((uint32_t)0x00000008)
#define RI_IOSwitch_GR6_1 ((uint32_t)0x00000010)
#define RI_IOSwitch_GR6_2 ((uint32_t)0x00000020)
#define RI_IOSwitch_GR5_1 ((uint32_t)0x00000040)
#define RI_IOSwitch_GR5_2 ((uint32_t)0x00000080)
#define RI_IOSwitch_GR5_3 ((uint32_t)0x00000100)
#define RI_IOSwitch_GR4_1 ((uint32_t)0x00000200)
#define RI_IOSwitch_GR4_2 ((uint32_t)0x00000400)
#define RI_IOSwitch_GR4_3 ((uint32_t)0x00000800)
#define RI_IOSwitch_GR4_4 ((uint32_t)0x00008000)
#define RI_IOSwitch_CH0b ((uint32_t)0x00010000)
#define RI_IOSwitch_CH1b ((uint32_t)0x00020000)
#define RI_IOSwitch_CH2b ((uint32_t)0x00040000)
#define RI_IOSwitch_CH3b ((uint32_t)0x00080000)
#define RI_IOSwitch_CH6b ((uint32_t)0x00100000)
#define RI_IOSwitch_CH7b ((uint32_t)0x00200000)
#define RI_IOSwitch_CH8b ((uint32_t)0x00400000)
#define RI_IOSwitch_CH9b ((uint32_t)0x00800000)
#define RI_IOSwitch_CH10b ((uint32_t)0x01000000)
#define RI_IOSwitch_CH11b ((uint32_t)0x02000000)
#define RI_IOSwitch_CH12b ((uint32_t)0x04000000)
#define RI_IOSwitch_GR6_3 ((uint32_t)0x08000000)
#define RI_IOSwitch_GR6_4 ((uint32_t)0x10000000)
#define RI_IOSwitch_GR5_4 ((uint32_t)0x20000000)
#define IS_RI_IOSWITCH(IOSWITCH) (((IOSWITCH) == RI_IOSwitch_CH0) || \
((IOSWITCH) == RI_IOSwitch_CH1) || \
((IOSWITCH) == RI_IOSwitch_CH2) || \
((IOSWITCH) == RI_IOSwitch_CH3) || \
((IOSWITCH) == RI_IOSwitch_CH4) || \
((IOSWITCH) == RI_IOSwitch_CH5) || \
((IOSWITCH) == RI_IOSwitch_CH6) || \
((IOSWITCH) == RI_IOSwitch_CH7) || \
((IOSWITCH) == RI_IOSwitch_CH8) || \
((IOSWITCH) == RI_IOSwitch_CH9) || \
((IOSWITCH) == RI_IOSwitch_CH10) || \
((IOSWITCH) == RI_IOSwitch_CH11) || \
((IOSWITCH) == RI_IOSwitch_CH12) || \
((IOSWITCH) == RI_IOSwitch_CH13) || \
((IOSWITCH) == RI_IOSwitch_CH14) || \
((IOSWITCH) == RI_IOSwitch_CH15) || \
((IOSWITCH) == RI_IOSwitch_CH18) || \
((IOSWITCH) == RI_IOSwitch_CH19) || \
((IOSWITCH) == RI_IOSwitch_CH20) || \
((IOSWITCH) == RI_IOSwitch_CH21) || \
((IOSWITCH) == RI_IOSwitch_CH22) || \
((IOSWITCH) == RI_IOSwitch_CH23) || \
((IOSWITCH) == RI_IOSwitch_CH24) || \
((IOSWITCH) == RI_IOSwitch_CH25) || \
((IOSWITCH) == RI_IOSwitch_VCOMP) || \
((IOSWITCH) == RI_IOSwitch_CH27) || \
((IOSWITCH) == RI_IOSwitch_CH28) || \
((IOSWITCH) == RI_IOSwitch_CH29) || \
((IOSWITCH) == RI_IOSwitch_CH30) || \
((IOSWITCH) == RI_IOSwitch_CH31) || \
((IOSWITCH) == RI_IOSwitch_GR10_1) || \
((IOSWITCH) == RI_IOSwitch_GR10_2) || \
((IOSWITCH) == RI_IOSwitch_GR10_3) || \
((IOSWITCH) == RI_IOSwitch_GR10_4) || \
((IOSWITCH) == RI_IOSwitch_GR6_1) || \
((IOSWITCH) == RI_IOSwitch_GR6_2) || \
((IOSWITCH) == RI_IOSwitch_GR6_3) || \
((IOSWITCH) == RI_IOSwitch_GR6_4) || \
((IOSWITCH) == RI_IOSwitch_GR5_1) || \
((IOSWITCH) == RI_IOSwitch_GR5_2) || \
((IOSWITCH) == RI_IOSwitch_GR5_3) || \
((IOSWITCH) == RI_IOSwitch_GR5_4) || \
((IOSWITCH) == RI_IOSwitch_GR4_1) || \
((IOSWITCH) == RI_IOSwitch_GR4_2) || \
((IOSWITCH) == RI_IOSwitch_GR4_3) || \
((IOSWITCH) == RI_IOSwitch_GR4_4) || \
((IOSWITCH) == RI_IOSwitch_CH0b) || \
((IOSWITCH) == RI_IOSwitch_CH1b) || \
((IOSWITCH) == RI_IOSwitch_CH2b) || \
((IOSWITCH) == RI_IOSwitch_CH3b) || \
((IOSWITCH) == RI_IOSwitch_CH6b) || \
((IOSWITCH) == RI_IOSwitch_CH7b) || \
((IOSWITCH) == RI_IOSwitch_CH8b) || \
((IOSWITCH) == RI_IOSwitch_CH9b) || \
((IOSWITCH) == RI_IOSwitch_CH10b) || \
((IOSWITCH) == RI_IOSwitch_CH11b) || \
((IOSWITCH) == RI_IOSwitch_CH12b))
/**
* @}
*/
/** @defgroup RI_Port
* @{
*/
#define RI_PortA ((uint8_t)0x01) /*!< GPIOA selected */
#define RI_PortB ((uint8_t)0x02) /*!< GPIOB selected */
#define RI_PortC ((uint8_t)0x03) /*!< GPIOC selected */
#define RI_PortD ((uint8_t)0x04) /*!< GPIOD selected */
#define RI_PortE ((uint8_t)0x05) /*!< GPIOE selected */
#define RI_PortF ((uint8_t)0x06) /*!< GPIOF selected */
#define RI_PortG ((uint8_t)0x07) /*!< GPIOG selected */
#define IS_RI_PORT(PORT) (((PORT) == RI_PortA) || \
((PORT) == RI_PortB) || \
((PORT) == RI_PortC) || \
((PORT) == RI_PortD) || \
((PORT) == RI_PortE) || \
((PORT) == RI_PortF) || \
((PORT) == RI_PortG))
/**
* @}
*/
/** @defgroup RI_Pin define
* @{
*/
#define RI_Pin_0 ((uint16_t)0x0001) /*!< Pin 0 selected */
#define RI_Pin_1 ((uint16_t)0x0002) /*!< Pin 1 selected */
#define RI_Pin_2 ((uint16_t)0x0004) /*!< Pin 2 selected */
#define RI_Pin_3 ((uint16_t)0x0008) /*!< Pin 3 selected */
#define RI_Pin_4 ((uint16_t)0x0010) /*!< Pin 4 selected */
#define RI_Pin_5 ((uint16_t)0x0020) /*!< Pin 5 selected */
#define RI_Pin_6 ((uint16_t)0x0040) /*!< Pin 6 selected */
#define RI_Pin_7 ((uint16_t)0x0080) /*!< Pin 7 selected */
#define RI_Pin_8 ((uint16_t)0x0100) /*!< Pin 8 selected */
#define RI_Pin_9 ((uint16_t)0x0200) /*!< Pin 9 selected */
#define RI_Pin_10 ((uint16_t)0x0400) /*!< Pin 10 selected */
#define RI_Pin_11 ((uint16_t)0x0800) /*!< Pin 11 selected */
#define RI_Pin_12 ((uint16_t)0x1000) /*!< Pin 12 selected */
#define RI_Pin_13 ((uint16_t)0x2000) /*!< Pin 13 selected */
#define RI_Pin_14 ((uint16_t)0x4000) /*!< Pin 14 selected */
#define RI_Pin_15 ((uint16_t)0x8000) /*!< Pin 15 selected */
#define RI_Pin_All ((uint16_t)0xFFFF) /*!< All pins selected */
#define IS_RI_PIN(PIN) ((PIN) != (uint16_t)0x00)
/**
* @}
*/
/**
* @}
*/
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
/* Function used to set the SYSCFG and RI configuration to the default reset state **/
void SYSCFG_DeInit(void);
void SYSCFG_RIDeInit(void);
/* SYSCFG Initialization and Configuration functions **************************/
void SYSCFG_MemoryRemapConfig(uint8_t SYSCFG_MemoryRemap);
uint32_t SYSCFG_GetBootMode(void);
void SYSCFG_USBPuCmd(FunctionalState NewState);
void SYSCFG_EXTILineConfig(uint8_t EXTI_PortSourceGPIOx, uint8_t EXTI_PinSourcex);
/* RI Initialization and Configuration functions ******************************/
void SYSCFG_RITIMSelect(uint32_t TIM_Select);
void SYSCFG_RITIMInputCaptureConfig(uint32_t RI_InputCapture, uint32_t RI_InputCaptureRouting);
void SYSCFG_RIResistorConfig(uint32_t RI_Resistor, FunctionalState NewState);
void SYSCFG_RIChannelSpeedConfig(uint32_t RI_Channel, uint32_t RI_ChannelSpeed);
void SYSCFG_RISwitchControlModeCmd(FunctionalState NewState);
void SYSCFG_RIIOSwitchConfig(uint32_t RI_IOSwitch, FunctionalState NewState);
void SYSCFG_RIHysteresisConfig(uint8_t RI_Port, uint16_t RI_Pin, FunctionalState NewState);
#ifdef __cplusplus
}
#endif
#endif /*__STM32L1xx_SYSCFG_H */
/**
* @}
*/
/**
* @}
*/
/******************* (C) COPYRIGHT 2012 STMicroelectronics *****END OF FILE****/
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