main.h

ucos-II 在英飞凌xc164的移植

#define ASC0_TIC_GPX                      ((T_Reg16 *) 0xFF6C)->bit8
#define ASC0_TIC_IE                       ((T_Reg16 *) 0xFF6C)->bit6
#define ASC0_TIC_IR                       ((T_Reg16 *) 0xFF6C)->bit7

// Transmit FIFO Control Register
#define ASC0_TXFCON            (*((uword volatile *) 0xF0C4))
#define ASC0_TXFCON_TXFEN                    ((T_Reg16 *) 0xF0C4)->bit0
#define ASC0_TXFCON_TXFFLU                   ((T_Reg16 *) 0xF0C4)->bit1
#define ASC0_TXFCON_TXTMEN                   ((T_Reg16 *) 0xF0C4)->bit2

// Register Bank Selection Register 0
#define BNKSEL0                (*((uword volatile *) 0xEC20))

// Register Bank Selection Register 1
#define BNKSEL1                (*((uword volatile *) 0xEC22))

// Register Bank Selection Register 2
#define BNKSEL2                (*((uword volatile *) 0xEC24))

// Register Bank Selection Register 3
#define BNKSEL3                (*((uword volatile *) 0xEC26))

// CAN Mode 0 Interrupt Control register
#define CAN_0IC                (*((uword volatile *) 0xF196))
#define CAN_0IC_GPX                      ((T_Reg16 *) 0xF196)->bit8
#define CAN_0IC_IE                       ((T_Reg16 *) 0xF196)->bit6
#define CAN_0IC_IR                       ((T_Reg16 *) 0xF196)->bit7

// CAN Mode 1 Interrupt Control register
#define CAN_1IC                (*((uword volatile *) 0xF142))
#define CAN_1IC_GPX                      ((T_Reg16 *) 0xF142)->bit8
#define CAN_1IC_IE                       ((T_Reg16 *) 0xF142)->bit6
#define CAN_1IC_IR                       ((T_Reg16 *) 0xF142)->bit7

// CAN Mode 2 Interrupt Control register
#define CAN_2IC                (*((uword volatile *) 0xF144))
#define CAN_2IC_GPX                      ((T_Reg16 *) 0xF144)->bit8
#define CAN_2IC_IE                       ((T_Reg16 *) 0xF144)->bit6
#define CAN_2IC_IR                       ((T_Reg16 *) 0xF144)->bit7

// CAN Mode 3 Interrupt Control register
#define CAN_3IC                (*((uword volatile *) 0xF146))
#define CAN_3IC_GPX                      ((T_Reg16 *) 0xF146)->bit8
#define CAN_3IC_IE                       ((T_Reg16 *) 0xF146)->bit6
#define CAN_3IC_IR                       ((T_Reg16 *) 0xF146)->bit7

// CAN Mode 4 Interrupt Control register
#define CAN_4IC                (*((uword volatile *) 0xF148))
#define CAN_4IC_GPX                      ((T_Reg16 *) 0xF148)->bit8
#define CAN_4IC_IE                       ((T_Reg16 *) 0xF148)->bit6
#define CAN_4IC_IR                       ((T_Reg16 *) 0xF148)->bit7

// CAN Mode 5 Interrupt Control register
#define CAN_5IC                (*((uword volatile *) 0xF14A))
#define CAN_5IC_GPX                      ((T_Reg16 *) 0xF14A)->bit8
#define CAN_5IC_IE                       ((T_Reg16 *) 0xF14A)->bit6
#define CAN_5IC_IR                       ((T_Reg16 *) 0xF14A)->bit7

// CAN Mode 6 Interrupt Control register
#define CAN_6IC                (*((uword volatile *) 0xF14C))
#define CAN_6IC_GPX                      ((T_Reg16 *) 0xF14C)->bit8
#define CAN_6IC_IE                       ((T_Reg16 *) 0xF14C)->bit6
#define CAN_6IC_IR                       ((T_Reg16 *) 0xF14C)->bit7

// CAN Mode 7 Interrupt Control register
#define CAN_7IC                (*((uword volatile *) 0xF14E))
#define CAN_7IC_GPX                      ((T_Reg16 *) 0xF14E)->bit8
#define CAN_7IC_IE                       ((T_Reg16 *) 0xF14E)->bit6
#define CAN_7IC_IR                       ((T_Reg16 *) 0xF14E)->bit7

// Node A Bit Timing Register High
#define CAN_ABTRH              (*((uword volatile far *) 0x20020E))
#define CAN_ABTRH_LBM                      0x0001

// Node A Bit Timing Register Low
#define CAN_ABTRL              (*((uword volatile far *) 0x20020C))
#define CAN_ABTRL_DIV8X                    0x8000

// Node A Control Register
#define CAN_ACR                (*((uword volatile far *) 0x200200))
#define CAN_ACR_CALM                     0x0080
#define CAN_ACR_CCE                      0x0040
#define CAN_ACR_EIE                      0x0008
#define CAN_ACR_INIT                     0x0001
#define CAN_ACR_LECIE                    0x0010
#define CAN_ACR_SIE                      0x0004

// Node A Error Counter Register High
#define CAN_AECNTH             (*((uword volatile far *) 0x200222))
#define CAN_AECNTH_LEINC                    0x0200
#define CAN_AECNTH_LETD                     0x0100

// Node A Error Counter Register Low
#define CAN_AECNTL             (*((uword volatile far *) 0x200220))

// Node A Frame Counter Register High
#define CAN_AFCRH              (*((uword volatile far *) 0x200216))
#define CAN_AFCRH_CFCIE                    0x0040
#define CAN_AFCRH_CFCOV                    0x0080

// Node A Frame Counter Register Low
#define CAN_AFCRL              (*((uword volatile far *) 0x200214))

// Node A Global Interrupt Node Pointer Register
#define CAN_AGINP              (*((uword volatile far *) 0x200210))

// Node A INTID Mask Register 4 Low
#define CAN_AIMR4              (*((uword volatile far *) 0x20021C))
#define CAN_AIMR4_IMC32                    0x0001
#define CAN_AIMR4_IMC33                    0x0002
#define CAN_AIMR4_IMC34                    0x0004

// Node A INTID Mask Register 0 High
#define CAN_AIMRH0             (*((uword volatile far *) 0x20021A))
#define CAN_AIMRH0_IMC16                    0x0001
#define CAN_AIMRH0_IMC17                    0x0002
#define CAN_AIMRH0_IMC18                    0x0004
#define CAN_AIMRH0_IMC19                    0x0008
#define CAN_AIMRH0_IMC20                    0x0010
#define CAN_AIMRH0_IMC21                    0x0020
#define CAN_AIMRH0_IMC22                    0x0040
#define CAN_AIMRH0_IMC23                    0x0080
#define CAN_AIMRH0_IMC24                    0x0100
#define CAN_AIMRH0_IMC25                    0x0200
#define CAN_AIMRH0_IMC26                    0x0400
#define CAN_AIMRH0_IMC27                    0x0800
#define CAN_AIMRH0_IMC28                    0x1000
#define CAN_AIMRH0_IMC29                    0x2000
#define CAN_AIMRH0_IMC30                    0x4000
#define CAN_AIMRH0_IMC31                    0x8000

// Node A INTID Mask Register 0 Low
#define CAN_AIMRL0             (*((uword volatile far *) 0x200218))
#define CAN_AIMRL0_IMC0                     0x0001
#define CAN_AIMRL0_IMC1                     0x0002
#define CAN_AIMRL0_IMC10                    0x0400
#define CAN_AIMRL0_IMC11                    0x0800
#define CAN_AIMRL0_IMC12                    0x1000
#define CAN_AIMRL0_IMC13                    0x2000
#define CAN_AIMRL0_IMC14                    0x4000
#define CAN_AIMRL0_IMC15                    0x8000
#define CAN_AIMRL0_IMC2                     0x0004
#define CAN_AIMRL0_IMC3                     0x0008
#define CAN_AIMRL0_IMC4                     0x0010
#define CAN_AIMRL0_IMC5                     0x0020
#define CAN_AIMRL0_IMC6                     0x0040
#define CAN_AIMRL0_IMC7                     0x0080
#define CAN_AIMRL0_IMC8                     0x0100
#define CAN_AIMRL0_IMC9                     0x0200

// Node A Interrupt Pending Register
#define CAN_AIR                (*((uword volatile far *) 0x200208))

// Node A Status Register
#define CAN_ASR                (*((uword volatile far *) 0x200204))
#define CAN_ASR_BOFF                     0x0080
#define CAN_ASR_EWRN                     0x0040
#define CAN_ASR_RXOK                     0x0010
#define CAN_ASR_TXOK                     0x0008

// Node B Bit Timing Register High
#define CAN_BBTRH              (*((uword volatile far *) 0x20024E))
#define CAN_BBTRH_LBM                      0x0001

// Node B Bit Timing Register Low
#define CAN_BBTRL              (*((uword volatile far *) 0x20024C))
#define CAN_BBTRL_DIV8X                    0x8000

// Node B Control Register
#define CAN_BCR                (*((uword volatile far *) 0x200240))
#define CAN_BCR_CALM                     0x0080
#define CAN_BCR_CCE                      0x0040
#define CAN_BCR_EIE                      0x0008
#define CAN_BCR_INIT                     0x0001
#define CAN_BCR_LECIE                    0x0010
#define CAN_BCR_SIE                      0x0004

// Node B Error Counter Register High
#define CAN_BECNTH             (*((uword volatile far *) 0x200262))
#define CAN_BECNTH_LEINC                    0x0200
#define CAN_BECNTH_LETD                     0x0100

// Node B Error Counter Register Low
#define CAN_BECNTL             (*((uword volatile far *) 0x200260))

// Node B Frame Counter Register High
#define CAN_BFCRH              (*((uword volatile far *) 0x200256))
#define CAN_BFCRH_CFCIE                    0x0040
#define CAN_BFCRH_CFCOV                    0x0080

// Node B Frame Counter Register Low
#define CAN_BFCRL              (*((uword volatile far *) 0x200254))

// Node B Global Interrupt Node Pointer Register
#define CAN_BGINP              (*((uword volatile far *) 0x200250))

// Node B INTID Mask Register 4 Low
#define CAN_BIMR4              (*((uword volatile far *) 0x20025C))
#define CAN_BIMR4_IMC32                    0x0001
#define CAN_BIMR4_IMC33                    0x0002
#define CAN_BIMR4_IMC34                    0x0004

// Node B INTID Mask Register 0 High
#define CAN_BIMRH0             (*((uword volatile far *) 0x20025A))
#define CAN_BIMRH0_IMC16                    0x0001
#define CAN_BIMRH0_IMC17                    0x0002
#define CAN_BIMRH0_IMC18                    0x0004
#define CAN_BIMRH0_IMC19                    0x0008
#define CAN_BIMRH0_IMC20                    0x0010
#define CAN_BIMRH0_IMC21                    0x0020
#define CAN_BIMRH0_IMC22                    0x0040
#define CAN_BIMRH0_IMC23                    0x0080
#define CAN_BIMRH0_IMC24                    0x0100
#define CAN_BIMRH0_IMC25                    0x0200
#define CAN_BIMRH0_IMC26                    0x0400
#define CAN_BIMRH0_IMC27                    0x0800
#define CAN_BIMRH0_IMC28                    0x1000
#define CAN_BIMRH0_IMC29                    0x2000
#define CAN_BIMRH0_IMC30                    0x4000
#define CAN_BIMRH0_IMC31                    0x8000

// Node B INTID Mask Register 0 Low
#define CAN_BIMRL0             (*((uword volatile far *) 0x200258))
#define CAN_BIMRL0_IMC0                     0x0001
#define CAN_BIMRL0_IMC1                     0x0002
#define CAN_BIMRL0_IMC10                    0x0400
#define CAN_BIMRL0_IMC11                    0x0800
#define CAN_BIMRL0_IMC12                    0x1000
#define CAN_BIMRL0_IMC13                    0x2000
#define CAN_BIMRL0_IMC14                    0x4000
#define CAN_BIMRL0_IMC15                    0x8000
#define CAN_BIMRL0_IMC2                     0x0004
#define CAN_BIMRL0_IMC3                     0x0008
#define CAN_BIMRL0_IMC4                     0x0010
#define CAN_BIMRL0_IMC5                     0x0020
#define CAN_BIMRL0_IMC6                     0x0040
#define CAN_BIMRL0_IMC7                     0x0080
#define CAN_BIMRL0_IMC8                     0x0100
#define CAN_BIMRL0_IMC9                     0x0200

// Node B Interrupt Pending Register
#define CAN_BIR                (*((uword volatile far *) 0x200248))

// Node B Status Register
#define CAN_BSR                (*((uword volatile far *) 0x200244))
#define CAN_BSR_BOFF                     0x0080
#define CAN_BSR_EWRN                     0x0040
#define CAN_BSR_RXOK                     0x0010
#define CAN_BSR_TXOK                     0x0008

// Message Object 0 Arbitration Mask Register High
#define CAN_MSGAMRH0           (*((uword volatile far *) 0x20030E))

// Message Object 1 Arbitration Mask Register High
#define CAN_MSGAMRH1           (*((uword volatile far *) 0x20032E))

// Message Object 10 Arbitration Mask Register High
#define CAN_MSGAMRH10          (*((uword volatile far *) 0x20044E))

// Message Object 11 Arbitration Mask Register High
#define CAN_MSGAMRH11          (*((uword volatile far *) 0x20046E))

// Message Object 12 Arbitration Mask Register High
#define CAN_MSGAMRH12          (*((uword volatile far *) 0x20048E))

// Message Object 13 Arbitration Mask Register High
#define CAN_MSGAMRH13          (*((uword volatile far *) 0x2004AE))

// Message Object 14 Arbitration Mask Register High
#define CAN_MSGAMRH14          (*((uword volatile far *) 0x2004CE))

// Message Object 15 Arbitration Mask Register High
#define CAN_MSGAMRH15          (*((uword volatile far *) 0x2004EE))

// Message Object 16 Arbitration Mask Register High
#define CAN_MSGAMRH16          (*((uword volatile far *) 0x20050E))

// Message Object 17 Arbitration Mask Register High
#define CAN_MSGAMRH17          (*((uword volatile far *) 0x20052E))

// Message Object 18 Arbitration Mask Register High
#define CAN_MSGAMRH18          (*((uword volatile far *) 0x20054E))

// Message Object 19 Arbitration Mask Register High
#define CAN_MSGAMRH19          (*((uword volatile far *) 0x20056E))

// Message Object 2 Arbitration Mask Register High
#define CAN_MSGAMRH2           (*((uword volatile far *) 0x20034E))

// Message Object 20 Arbitration Mask Register High
#define CAN_MSGAMRH20          (*((uword volatile far *) 0x20058E))

// Message Object 21 Arbitration Mask Register High
#define CAN_MSGAMRH21          (*((uword volatile far *) 0x2005AE))

// Message Object 22 Arbitration Mask Register High
#define CAN_MSGAMRH22          (*((uword volatile far *) 0x2005CE))